From 86ca63658b6a4ecd233211ed46f99ba78c850e48 Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Sat, 1 Nov 2014 12:25:27 +0000
Subject: [PATCH] Optimizes ARMv7 andi{s,}_rc implementations.

Cuts down from a 3 instruction max implementation down to 1 instruction if the immediate can fit in to the instruction encoding.
---
 .../Core/PowerPC/JitArm32/JitArm_Integer.cpp  | 22 ++++++++++++++-----
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp
index e3afe530f6..5c897227b3 100644
--- a/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp
+++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp
@@ -275,7 +275,7 @@ void JitArm::arith(UGeckoInstruction inst)
 				Imm[0] = gpr.GetImm(s);
 			}
 			isImm[1] = true;
-			Imm[1] = inst.UIMM << (shiftedImm ? 16 : 0);
+			Imm[1] = inst.UIMM;
 			Rc = true;
 		break;
 
@@ -364,7 +364,7 @@ void JitArm::arith(UGeckoInstruction inst)
 			break;
 			case 28:
 			case 29:
-				gpr.SetImmediate(a, And(Imm[0], Imm[1]));
+				gpr.SetImmediate(a, And(Imm[0], Imm[1] << (shiftedImm ? 16 : 0)));
 				dest = a;
 			break;
 			case 31: // addcx, addx, subfx
@@ -542,12 +542,22 @@ void JitArm::arith(UGeckoInstruction inst)
 		{
 			dest = a;
 			gpr.BindToRegister(a, s == a);
-			ARMReg rA = gpr.GetReg();
 			RS = gpr.R(s);
 			RA = gpr.R(a);
-			MOVI2R(rA, Imm[1]);
-			ANDS(RA, RS, rA);
-			gpr.Unlock(rA);
+
+			Operand2 imm_val;
+			if (TryMakeOperand2(Imm[1] << (shiftedImm ? 16 : 0), imm_val))
+			{
+				AND(RA, RS, imm_val);
+			}
+			else
+			{
+				ARMReg rA = gpr.GetReg();
+				MOVI2R(rA, Imm[1]);
+				Operand2 rotated_reg(rA, ST_ROR, shiftedImm ? 16 : 0);
+				AND(RA, RS, rotated_reg);
+				gpr.Unlock(rA);
+			}
 		}
 		break;
 		case 31: