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https://github.com/dolphin-emu/dolphin.git
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PowerPC: Remove rPS macro.
This commit is contained in:
parent
0cd4a226d2
commit
0f301829d2
@ -275,8 +275,8 @@ void RunCodeHandler()
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// Registers FPR0->13 are volatile
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for (int i = 0; i < 14; ++i)
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{
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PowerPC::HostWrite_U64(rPS(i).PS0AsU64(), SP + 24 + 2 * i * sizeof(u64));
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PowerPC::HostWrite_U64(rPS(i).PS1AsU64(), SP + 24 + (2 * i + 1) * sizeof(u64));
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PowerPC::HostWrite_U64(PowerPC::ppcState.ps[i].PS0AsU64(), SP + 24 + 2 * i * sizeof(u64));
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PowerPC::HostWrite_U64(PowerPC::ppcState.ps[i].PS1AsU64(), SP + 24 + (2 * i + 1) * sizeof(u64));
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}
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DEBUG_LOG_FMT(ACTIONREPLAY,
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"GeckoCodes: Initiating phantom branch-and-link. "
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@ -63,8 +63,8 @@ void GeckoReturnTrampoline()
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PowerPC::ppcState.cr.Set(PowerPC::HostRead_U32(SP + 20));
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for (int i = 0; i < 14; ++i)
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{
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rPS(i).SetBoth(PowerPC::HostRead_U64(SP + 24 + 2 * i * sizeof(u64)),
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PowerPC::HostRead_U64(SP + 24 + (2 * i + 1) * sizeof(u64)));
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PowerPC::ppcState.ps[i].SetBoth(PowerPC::HostRead_U64(SP + 24 + 2 * i * sizeof(u64)),
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PowerPC::HostRead_U64(SP + 24 + (2 * i + 1) * sizeof(u64)));
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}
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}
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} // namespace HLE_Misc
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@ -14,7 +14,7 @@ u32 HLE::SystemVABI::VAList::GetGPR(u32 gpr) const
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double HLE::SystemVABI::VAList::GetFPR(u32 fpr) const
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{
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return rPS(fpr).PS0AsDouble();
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return PowerPC::ppcState.ps[fpr].PS0AsDouble();
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}
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HLE::SystemVABI::VAListStruct::VAListStruct(u32 address)
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@ -252,9 +252,9 @@ void Expression::SynchronizeBindings(SynchronizeDirection dir) const
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break;
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case VarBindingType::FPR:
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if (dir == SynchronizeDirection::From)
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v->value = rPS(bind->index).PS0AsDouble();
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v->value = PowerPC::ppcState.ps[bind->index].PS0AsDouble();
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else
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rPS(bind->index).SetPS0(v->value);
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PowerPC::ppcState.ps[bind->index].SetPS0(v->value);
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break;
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case VarBindingType::SPR:
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if (dir == SynchronizeDirection::From)
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@ -414,7 +414,7 @@ static void ReadRegister()
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}
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else if (id >= 32 && id < 64)
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{
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wbe64hex(reply, rPS(id - 32).PS0AsU64());
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wbe64hex(reply, PowerPC::ppcState.ps[id - 32].PS0AsU64());
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}
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else if (id >= 71 && id < 87)
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{
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@ -626,7 +626,7 @@ static void WriteRegister()
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}
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else if (id >= 32 && id < 64)
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{
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rPS(id - 32).SetPS0(re64hex(bufptr));
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PowerPC::ppcState.ps[id - 32].SetPS0(re64hex(bufptr));
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}
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else if (id >= 71 && id < 87)
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{
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@ -37,7 +37,7 @@ void SetFI(UReg_FPSCR* fpscr, u32 FI)
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// The Programming Environments Manual for 32 and 64-bit Microprocessors
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void ConvertToInteger(UGeckoInstruction inst, RoundingMode rounding_mode)
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{
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const double b = rPS(inst.FB).PS0AsDouble();
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const double b = PowerPC::ppcState.ps[inst.FB].PS0AsDouble();
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u32 value;
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bool exception_occurred = false;
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@ -126,7 +126,7 @@ void ConvertToInteger(UGeckoInstruction inst, RoundingMode rounding_mode)
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if (value == 0 && std::signbit(b))
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result |= 0x100000000ull;
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rPS(inst.FD).SetPS0(result);
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PowerPC::ppcState.ps[inst.FD].SetPS0(result);
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}
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if (inst.Rc)
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@ -211,16 +211,16 @@ void Interpreter::Helper_FloatCompareUnordered(UGeckoInstruction inst, double fa
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void Interpreter::fcmpo(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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Helper_FloatCompareOrdered(inst, a.PS0AsDouble(), b.PS0AsDouble());
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}
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void Interpreter::fcmpu(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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Helper_FloatCompareUnordered(inst, a.PS0AsDouble(), b.PS0AsDouble());
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}
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@ -237,7 +237,7 @@ void Interpreter::fctiwzx(UGeckoInstruction inst)
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void Interpreter::fmrx(UGeckoInstruction inst)
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{
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rPS(inst.FD).SetPS0(rPS(inst.FB).PS0AsU64());
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PowerPC::ppcState.ps[inst.FD].SetPS0(PowerPC::ppcState.ps[inst.FB].PS0AsU64());
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// This is a binary instruction. Does not alter FPSCR
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if (inst.Rc)
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@ -246,7 +246,7 @@ void Interpreter::fmrx(UGeckoInstruction inst)
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void Interpreter::fabsx(UGeckoInstruction inst)
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{
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rPS(inst.FD).SetPS0(fabs(rPS(inst.FB).PS0AsDouble()));
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PowerPC::ppcState.ps[inst.FD].SetPS0(fabs(PowerPC::ppcState.ps[inst.FB].PS0AsDouble()));
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// This is a binary instruction. Does not alter FPSCR
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if (inst.Rc)
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@ -255,7 +255,8 @@ void Interpreter::fabsx(UGeckoInstruction inst)
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void Interpreter::fnabsx(UGeckoInstruction inst)
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{
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rPS(inst.FD).SetPS0(rPS(inst.FB).PS0AsU64() | (UINT64_C(1) << 63));
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PowerPC::ppcState.ps[inst.FD].SetPS0(PowerPC::ppcState.ps[inst.FB].PS0AsU64() |
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(UINT64_C(1) << 63));
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// This is a binary instruction. Does not alter FPSCR
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if (inst.Rc)
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@ -264,7 +265,8 @@ void Interpreter::fnabsx(UGeckoInstruction inst)
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void Interpreter::fnegx(UGeckoInstruction inst)
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{
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rPS(inst.FD).SetPS0(rPS(inst.FB).PS0AsU64() ^ (UINT64_C(1) << 63));
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PowerPC::ppcState.ps[inst.FD].SetPS0(PowerPC::ppcState.ps[inst.FB].PS0AsU64() ^
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(UINT64_C(1) << 63));
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// This is a binary instruction. Does not alter FPSCR
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if (inst.Rc)
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@ -273,11 +275,12 @@ void Interpreter::fnegx(UGeckoInstruction inst)
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void Interpreter::fselx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& c = rPS(inst.FC);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const auto& c = PowerPC::ppcState.ps[inst.FC];
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rPS(inst.FD).SetPS0((a.PS0AsDouble() >= -0.0) ? c.PS0AsDouble() : b.PS0AsDouble());
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PowerPC::ppcState.ps[inst.FD].SetPS0((a.PS0AsDouble() >= -0.0) ? c.PS0AsDouble() :
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b.PS0AsDouble());
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// This is a binary instruction. Does not alter FPSCR
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if (inst.Rc)
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@ -289,7 +292,7 @@ void Interpreter::fselx(UGeckoInstruction inst)
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// PS1 is said to be undefined
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void Interpreter::frspx(UGeckoInstruction inst) // round to single
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{
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const double b = rPS(inst.FB).PS0AsDouble();
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const double b = PowerPC::ppcState.ps[inst.FB].PS0AsDouble();
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const float rounded = ForceSingle(PowerPC::ppcState.fpscr, b);
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if (std::isnan(b))
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@ -301,7 +304,7 @@ void Interpreter::frspx(UGeckoInstruction inst) // round to single
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if (!is_snan || PowerPC::ppcState.fpscr.VE == 0)
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{
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rPS(inst.FD).Fill(rounded);
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PowerPC::ppcState.ps[inst.FD].Fill(rounded);
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PowerPC::UpdateFPRFSingle(rounded);
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}
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@ -312,7 +315,7 @@ void Interpreter::frspx(UGeckoInstruction inst) // round to single
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SetFI(&PowerPC::ppcState.fpscr, b != rounded);
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PowerPC::ppcState.fpscr.FR = fabs(rounded) > fabs(b);
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PowerPC::UpdateFPRFSingle(rounded);
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rPS(inst.FD).Fill(rounded);
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PowerPC::ppcState.ps[inst.FD].Fill(rounded);
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}
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if (inst.Rc)
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@ -321,8 +324,8 @@ void Interpreter::frspx(UGeckoInstruction inst) // round to single
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void Interpreter::fmulx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& c = rPS(inst.FC);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& c = PowerPC::ppcState.ps[inst.FC];
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const FPResult product = NI_mul(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), c.PS0AsDouble());
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@ -330,7 +333,7 @@ void Interpreter::fmulx(UGeckoInstruction inst)
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{
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const double result = ForceDouble(PowerPC::ppcState.fpscr, product.value);
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rPS(inst.FD).SetPS0(result);
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PowerPC::ppcState.ps[inst.FD].SetPS0(result);
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PowerPC::ppcState.fpscr.FI = 0; // are these flags important?
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PowerPC::ppcState.fpscr.FR = 0;
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PowerPC::UpdateFPRFDouble(result);
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@ -341,8 +344,8 @@ void Interpreter::fmulx(UGeckoInstruction inst)
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}
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void Interpreter::fmulsx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& c = rPS(inst.FC);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& c = PowerPC::ppcState.ps[inst.FC];
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const double c_value = Force25Bit(c.PS0AsDouble());
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const FPResult d_value = NI_mul(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), c_value);
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@ -351,7 +354,7 @@ void Interpreter::fmulsx(UGeckoInstruction inst)
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{
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const float result = ForceSingle(PowerPC::ppcState.fpscr, d_value.value);
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rPS(inst.FD).Fill(result);
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PowerPC::ppcState.ps[inst.FD].Fill(result);
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PowerPC::ppcState.fpscr.FI = 0;
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PowerPC::ppcState.fpscr.FR = 0;
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PowerPC::UpdateFPRFSingle(result);
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@ -363,16 +366,16 @@ void Interpreter::fmulsx(UGeckoInstruction inst)
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void Interpreter::fmaddx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& c = rPS(inst.FC);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const auto& c = PowerPC::ppcState.ps[inst.FC];
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const FPResult product =
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NI_madd(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), c.PS0AsDouble(), b.PS0AsDouble());
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if (PowerPC::ppcState.fpscr.VE == 0 || product.HasNoInvalidExceptions())
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{
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const double result = ForceDouble(PowerPC::ppcState.fpscr, product.value);
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rPS(inst.FD).SetPS0(result);
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PowerPC::ppcState.ps[inst.FD].SetPS0(result);
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PowerPC::UpdateFPRFDouble(result);
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}
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@ -382,9 +385,9 @@ void Interpreter::fmaddx(UGeckoInstruction inst)
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void Interpreter::fmaddsx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& c = rPS(inst.FC);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const auto& c = PowerPC::ppcState.ps[inst.FC];
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const double c_value = Force25Bit(c.PS0AsDouble());
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const FPResult d_value =
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@ -394,7 +397,7 @@ void Interpreter::fmaddsx(UGeckoInstruction inst)
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{
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const float result = ForceSingle(PowerPC::ppcState.fpscr, d_value.value);
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rPS(inst.FD).Fill(result);
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PowerPC::ppcState.ps[inst.FD].Fill(result);
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PowerPC::ppcState.fpscr.FI = d_value.value != result;
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PowerPC::ppcState.fpscr.FR = 0;
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PowerPC::UpdateFPRFSingle(result);
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@ -406,15 +409,15 @@ void Interpreter::fmaddsx(UGeckoInstruction inst)
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void Interpreter::faddx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const FPResult sum = NI_add(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS0AsDouble());
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if (PowerPC::ppcState.fpscr.VE == 0 || sum.HasNoInvalidExceptions())
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{
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const double result = ForceDouble(PowerPC::ppcState.fpscr, sum.value);
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rPS(inst.FD).SetPS0(result);
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PowerPC::ppcState.ps[inst.FD].SetPS0(result);
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PowerPC::UpdateFPRFDouble(result);
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}
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@ -423,15 +426,15 @@ void Interpreter::faddx(UGeckoInstruction inst)
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}
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void Interpreter::faddsx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const FPResult sum = NI_add(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS0AsDouble());
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if (PowerPC::ppcState.fpscr.VE == 0 || sum.HasNoInvalidExceptions())
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{
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const float result = ForceSingle(PowerPC::ppcState.fpscr, sum.value);
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rPS(inst.FD).Fill(result);
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PowerPC::ppcState.ps[inst.FD].Fill(result);
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PowerPC::UpdateFPRFSingle(result);
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}
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@ -441,8 +444,8 @@ void Interpreter::faddsx(UGeckoInstruction inst)
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void Interpreter::fdivx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const FPResult quotient = NI_div(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS0AsDouble());
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const bool not_divide_by_zero = PowerPC::ppcState.fpscr.ZE == 0 || quotient.exception != FPSCR_ZX;
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@ -451,7 +454,7 @@ void Interpreter::fdivx(UGeckoInstruction inst)
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if (not_divide_by_zero && not_invalid)
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{
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const double result = ForceDouble(PowerPC::ppcState.fpscr, quotient.value);
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rPS(inst.FD).SetPS0(result);
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PowerPC::ppcState.ps[inst.FD].SetPS0(result);
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PowerPC::UpdateFPRFDouble(result);
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}
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@ -461,8 +464,8 @@ void Interpreter::fdivx(UGeckoInstruction inst)
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}
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void Interpreter::fdivsx(UGeckoInstruction inst)
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{
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const auto& a = rPS(inst.FA);
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const auto& b = rPS(inst.FB);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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const auto& b = PowerPC::ppcState.ps[inst.FB];
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const FPResult quotient = NI_div(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS0AsDouble());
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const bool not_divide_by_zero = PowerPC::ppcState.fpscr.ZE == 0 || quotient.exception != FPSCR_ZX;
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@ -471,7 +474,7 @@ void Interpreter::fdivsx(UGeckoInstruction inst)
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if (not_divide_by_zero && not_invalid)
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{
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const float result = ForceSingle(PowerPC::ppcState.fpscr, quotient.value);
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rPS(inst.FD).Fill(result);
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PowerPC::ppcState.ps[inst.FD].Fill(result);
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PowerPC::UpdateFPRFSingle(result);
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}
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@ -482,11 +485,11 @@ void Interpreter::fdivsx(UGeckoInstruction inst)
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// Single precision only.
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void Interpreter::fresx(UGeckoInstruction inst)
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{
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const double b = rPS(inst.FB).PS0AsDouble();
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const double b = PowerPC::ppcState.ps[inst.FB].PS0AsDouble();
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const auto compute_result = [inst](double value) {
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const double result = Common::ApproximateReciprocal(value);
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rPS(inst.FD).Fill(result);
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PowerPC::ppcState.ps[inst.FD].Fill(result);
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PowerPC::UpdateFPRFSingle(float(result));
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};
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@ -520,11 +523,11 @@ void Interpreter::fresx(UGeckoInstruction inst)
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void Interpreter::frsqrtex(UGeckoInstruction inst)
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{
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const double b = rPS(inst.FB).PS0AsDouble();
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const double b = PowerPC::ppcState.ps[inst.FB].PS0AsDouble();
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const auto compute_result = [inst](double value) {
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const double result = Common::ApproximateReciprocalSquareRoot(value);
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rPS(inst.FD).SetPS0(result);
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PowerPC::ppcState.ps[inst.FD].SetPS0(result);
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PowerPC::UpdateFPRFDouble(result);
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};
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@ -566,9 +569,9 @@ void Interpreter::frsqrtex(UGeckoInstruction inst)
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|
||||
void Interpreter::fmsubx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const FPResult product =
|
||||
NI_msub(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), c.PS0AsDouble(), b.PS0AsDouble());
|
||||
@ -576,7 +579,7 @@ void Interpreter::fmsubx(UGeckoInstruction inst)
|
||||
if (PowerPC::ppcState.fpscr.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceDouble(PowerPC::ppcState.fpscr, product.value);
|
||||
rPS(inst.FD).SetPS0(result);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(result);
|
||||
PowerPC::UpdateFPRFDouble(result);
|
||||
}
|
||||
|
||||
@ -586,9 +589,9 @@ void Interpreter::fmsubx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fmsubsx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c_value = Force25Bit(c.PS0AsDouble());
|
||||
const FPResult product =
|
||||
@ -597,7 +600,7 @@ void Interpreter::fmsubsx(UGeckoInstruction inst)
|
||||
if (PowerPC::ppcState.fpscr.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const float result = ForceSingle(PowerPC::ppcState.fpscr, product.value);
|
||||
rPS(inst.FD).Fill(result);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(result);
|
||||
PowerPC::UpdateFPRFSingle(result);
|
||||
}
|
||||
|
||||
@ -607,9 +610,9 @@ void Interpreter::fmsubsx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fnmaddx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const FPResult product =
|
||||
NI_madd(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), c.PS0AsDouble(), b.PS0AsDouble());
|
||||
@ -619,7 +622,7 @@ void Interpreter::fnmaddx(UGeckoInstruction inst)
|
||||
const double tmp = ForceDouble(PowerPC::ppcState.fpscr, product.value);
|
||||
const double result = std::isnan(tmp) ? tmp : -tmp;
|
||||
|
||||
rPS(inst.FD).SetPS0(result);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(result);
|
||||
PowerPC::UpdateFPRFDouble(result);
|
||||
}
|
||||
|
||||
@ -629,9 +632,9 @@ void Interpreter::fnmaddx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fnmaddsx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c_value = Force25Bit(c.PS0AsDouble());
|
||||
const FPResult product =
|
||||
@ -642,7 +645,7 @@ void Interpreter::fnmaddsx(UGeckoInstruction inst)
|
||||
const float tmp = ForceSingle(PowerPC::ppcState.fpscr, product.value);
|
||||
const float result = std::isnan(tmp) ? tmp : -tmp;
|
||||
|
||||
rPS(inst.FD).Fill(result);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(result);
|
||||
PowerPC::UpdateFPRFSingle(result);
|
||||
}
|
||||
|
||||
@ -652,9 +655,9 @@ void Interpreter::fnmaddsx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fnmsubx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const FPResult product =
|
||||
NI_msub(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), c.PS0AsDouble(), b.PS0AsDouble());
|
||||
@ -664,7 +667,7 @@ void Interpreter::fnmsubx(UGeckoInstruction inst)
|
||||
const double tmp = ForceDouble(PowerPC::ppcState.fpscr, product.value);
|
||||
const double result = std::isnan(tmp) ? tmp : -tmp;
|
||||
|
||||
rPS(inst.FD).SetPS0(result);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(result);
|
||||
PowerPC::UpdateFPRFDouble(result);
|
||||
}
|
||||
|
||||
@ -674,9 +677,9 @@ void Interpreter::fnmsubx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fnmsubsx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c_value = Force25Bit(c.PS0AsDouble());
|
||||
const FPResult product =
|
||||
@ -687,7 +690,7 @@ void Interpreter::fnmsubsx(UGeckoInstruction inst)
|
||||
const float tmp = ForceSingle(PowerPC::ppcState.fpscr, product.value);
|
||||
const float result = std::isnan(tmp) ? tmp : -tmp;
|
||||
|
||||
rPS(inst.FD).Fill(result);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(result);
|
||||
PowerPC::UpdateFPRFSingle(result);
|
||||
}
|
||||
|
||||
@ -697,15 +700,15 @@ void Interpreter::fnmsubsx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fsubx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
const FPResult difference = NI_sub(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS0AsDouble());
|
||||
|
||||
if (PowerPC::ppcState.fpscr.VE == 0 || difference.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceDouble(PowerPC::ppcState.fpscr, difference.value);
|
||||
rPS(inst.FD).SetPS0(result);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(result);
|
||||
PowerPC::UpdateFPRFDouble(result);
|
||||
}
|
||||
|
||||
@ -715,15 +718,15 @@ void Interpreter::fsubx(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::fsubsx(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
const FPResult difference = NI_sub(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS0AsDouble());
|
||||
|
||||
if (PowerPC::ppcState.fpscr.VE == 0 || difference.HasNoInvalidExceptions())
|
||||
{
|
||||
const float result = ForceSingle(PowerPC::ppcState.fpscr, difference.value);
|
||||
rPS(inst.FD).Fill(result);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(result);
|
||||
PowerPC::UpdateFPRFSingle(result);
|
||||
}
|
||||
|
||||
|
@ -70,7 +70,7 @@ void Interpreter::lfd(UGeckoInstruction inst)
|
||||
const u64 temp = PowerPC::Read_U64(address);
|
||||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
rPS(inst.FD).SetPS0(temp);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(temp);
|
||||
}
|
||||
|
||||
void Interpreter::lfdu(UGeckoInstruction inst)
|
||||
@ -87,7 +87,7 @@ void Interpreter::lfdu(UGeckoInstruction inst)
|
||||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rPS(inst.FD).SetPS0(temp);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(temp);
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
@ -106,7 +106,7 @@ void Interpreter::lfdux(UGeckoInstruction inst)
|
||||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
rPS(inst.FD).SetPS0(temp);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(temp);
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
@ -124,7 +124,7 @@ void Interpreter::lfdx(UGeckoInstruction inst)
|
||||
const u64 temp = PowerPC::Read_U64(address);
|
||||
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
rPS(inst.FD).SetPS0(temp);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(temp);
|
||||
}
|
||||
|
||||
void Interpreter::lfs(UGeckoInstruction inst)
|
||||
@ -142,7 +142,7 @@ void Interpreter::lfs(UGeckoInstruction inst)
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
const u64 value = ConvertToDouble(temp);
|
||||
rPS(inst.FD).Fill(value);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(value);
|
||||
}
|
||||
}
|
||||
|
||||
@ -161,7 +161,7 @@ void Interpreter::lfsu(UGeckoInstruction inst)
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
const u64 value = ConvertToDouble(temp);
|
||||
rPS(inst.FD).Fill(value);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(value);
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
@ -181,7 +181,7 @@ void Interpreter::lfsux(UGeckoInstruction inst)
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
const u64 value = ConvertToDouble(temp);
|
||||
rPS(inst.FD).Fill(value);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(value);
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
}
|
||||
}
|
||||
@ -201,7 +201,7 @@ void Interpreter::lfsx(UGeckoInstruction inst)
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
const u64 value = ConvertToDouble(temp);
|
||||
rPS(inst.FD).Fill(value);
|
||||
PowerPC::ppcState.ps[inst.FD].Fill(value);
|
||||
}
|
||||
}
|
||||
|
||||
@ -349,7 +349,7 @@ void Interpreter::stfd(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U64(rPS(inst.FS).PS0AsU64(), address);
|
||||
PowerPC::Write_U64(PowerPC::ppcState.ps[inst.FS].PS0AsU64(), address);
|
||||
}
|
||||
|
||||
void Interpreter::stfdu(UGeckoInstruction inst)
|
||||
@ -362,7 +362,7 @@ void Interpreter::stfdu(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U64(rPS(inst.FS).PS0AsU64(), address);
|
||||
PowerPC::Write_U64(PowerPC::ppcState.ps[inst.FS].PS0AsU64(), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
@ -379,7 +379,7 @@ void Interpreter::stfs(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U32(ConvertToSingle(rPS(inst.FS).PS0AsU64()), address);
|
||||
PowerPC::Write_U32(ConvertToSingle(PowerPC::ppcState.ps[inst.FS].PS0AsU64()), address);
|
||||
}
|
||||
|
||||
void Interpreter::stfsu(UGeckoInstruction inst)
|
||||
@ -392,7 +392,7 @@ void Interpreter::stfsu(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U32(ConvertToSingle(rPS(inst.FS).PS0AsU64()), address);
|
||||
PowerPC::Write_U32(ConvertToSingle(PowerPC::ppcState.ps[inst.FS].PS0AsU64()), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
@ -765,7 +765,7 @@ void Interpreter::stfdux(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U64(rPS(inst.FS).PS0AsU64(), address);
|
||||
PowerPC::Write_U64(PowerPC::ppcState.ps[inst.FS].PS0AsU64(), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
@ -782,7 +782,7 @@ void Interpreter::stfdx(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U64(rPS(inst.FS).PS0AsU64(), address);
|
||||
PowerPC::Write_U64(PowerPC::ppcState.ps[inst.FS].PS0AsU64(), address);
|
||||
}
|
||||
|
||||
// Stores Floating points into Integers indeXed
|
||||
@ -796,7 +796,7 @@ void Interpreter::stfiwx(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U32(rPS(inst.FS).PS0AsU32(), address);
|
||||
PowerPC::Write_U32(PowerPC::ppcState.ps[inst.FS].PS0AsU32(), address);
|
||||
}
|
||||
|
||||
void Interpreter::stfsux(UGeckoInstruction inst)
|
||||
@ -809,7 +809,7 @@ void Interpreter::stfsux(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U32(ConvertToSingle(rPS(inst.FS).PS0AsU64()), address);
|
||||
PowerPC::Write_U32(ConvertToSingle(PowerPC::ppcState.ps[inst.FS].PS0AsU64()), address);
|
||||
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
|
||||
{
|
||||
PowerPC::ppcState.gpr[inst.RA] = address;
|
||||
@ -826,7 +826,7 @@ void Interpreter::stfsx(UGeckoInstruction inst)
|
||||
return;
|
||||
}
|
||||
|
||||
PowerPC::Write_U32(ConvertToSingle(rPS(inst.FS).PS0AsU64()), address);
|
||||
PowerPC::Write_U32(ConvertToSingle(PowerPC::ppcState.ps[inst.FS].PS0AsU64()), address);
|
||||
}
|
||||
|
||||
void Interpreter::sthbrx(UGeckoInstruction inst)
|
||||
|
@ -13,12 +13,13 @@
|
||||
// These "binary instructions" do not alter FPSCR.
|
||||
void Interpreter::ps_sel(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
rPS(inst.FD).SetBoth(a.PS0AsDouble() >= -0.0 ? c.PS0AsDouble() : b.PS0AsDouble(),
|
||||
a.PS1AsDouble() >= -0.0 ? c.PS1AsDouble() : b.PS1AsDouble());
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(a.PS0AsDouble() >= -0.0 ? c.PS0AsDouble() : b.PS0AsDouble(),
|
||||
a.PS1AsDouble() >= -0.0 ? c.PS1AsDouble() :
|
||||
b.PS1AsDouble());
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -26,9 +27,10 @@ void Interpreter::ps_sel(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_neg(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(b.PS0AsU64() ^ (UINT64_C(1) << 63), b.PS1AsU64() ^ (UINT64_C(1) << 63));
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(b.PS0AsU64() ^ (UINT64_C(1) << 63),
|
||||
b.PS1AsU64() ^ (UINT64_C(1) << 63));
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -36,7 +38,7 @@ void Interpreter::ps_neg(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_mr(UGeckoInstruction inst)
|
||||
{
|
||||
rPS(inst.FD) = rPS(inst.FB);
|
||||
PowerPC::ppcState.ps[inst.FD] = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -44,9 +46,10 @@ void Interpreter::ps_mr(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_nabs(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(b.PS0AsU64() | (UINT64_C(1) << 63), b.PS1AsU64() | (UINT64_C(1) << 63));
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(b.PS0AsU64() | (UINT64_C(1) << 63),
|
||||
b.PS1AsU64() | (UINT64_C(1) << 63));
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -54,9 +57,10 @@ void Interpreter::ps_nabs(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_abs(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(b.PS0AsU64() & ~(UINT64_C(1) << 63), b.PS1AsU64() & ~(UINT64_C(1) << 63));
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(b.PS0AsU64() & ~(UINT64_C(1) << 63),
|
||||
b.PS1AsU64() & ~(UINT64_C(1) << 63));
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -65,10 +69,10 @@ void Interpreter::ps_abs(UGeckoInstruction inst)
|
||||
// These are just moves, double is OK.
|
||||
void Interpreter::ps_merge00(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(a.PS0AsDouble(), b.PS0AsDouble());
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(a.PS0AsDouble(), b.PS0AsDouble());
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -76,10 +80,10 @@ void Interpreter::ps_merge00(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_merge01(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(a.PS0AsDouble(), b.PS1AsDouble());
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(a.PS0AsDouble(), b.PS1AsDouble());
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -87,10 +91,10 @@ void Interpreter::ps_merge01(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_merge10(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(a.PS1AsDouble(), b.PS0AsDouble());
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(a.PS1AsDouble(), b.PS0AsDouble());
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -98,10 +102,10 @@ void Interpreter::ps_merge10(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_merge11(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
rPS(inst.FD).SetBoth(a.PS1AsDouble(), b.PS1AsDouble());
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(a.PS1AsDouble(), b.PS1AsDouble());
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
@ -110,8 +114,8 @@ void Interpreter::ps_merge11(UGeckoInstruction inst)
|
||||
// From here on, the real deal.
|
||||
void Interpreter::ps_div(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
const float ps0 =
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
@ -120,7 +124,7 @@ void Interpreter::ps_div(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_div(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -130,8 +134,8 @@ void Interpreter::ps_div(UGeckoInstruction inst)
|
||||
void Interpreter::ps_res(UGeckoInstruction inst)
|
||||
{
|
||||
// this code is based on the real hardware tests
|
||||
const double a = rPS(inst.FB).PS0AsDouble();
|
||||
const double b = rPS(inst.FB).PS1AsDouble();
|
||||
const double a = PowerPC::ppcState.ps[inst.FB].PS0AsDouble();
|
||||
const double b = PowerPC::ppcState.ps[inst.FB].PS1AsDouble();
|
||||
|
||||
if (a == 0.0 || b == 0.0)
|
||||
{
|
||||
@ -148,7 +152,7 @@ void Interpreter::ps_res(UGeckoInstruction inst)
|
||||
const double ps0 = Common::ApproximateReciprocal(a);
|
||||
const double ps1 = Common::ApproximateReciprocal(b);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(float(ps0));
|
||||
|
||||
if (inst.Rc)
|
||||
@ -157,8 +161,8 @@ void Interpreter::ps_res(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_rsqrte(UGeckoInstruction inst)
|
||||
{
|
||||
const double ps0 = rPS(inst.FB).PS0AsDouble();
|
||||
const double ps1 = rPS(inst.FB).PS1AsDouble();
|
||||
const double ps0 = PowerPC::ppcState.ps[inst.FB].PS0AsDouble();
|
||||
const double ps1 = PowerPC::ppcState.ps[inst.FB].PS1AsDouble();
|
||||
|
||||
if (ps0 == 0.0 || ps1 == 0.0)
|
||||
{
|
||||
@ -183,7 +187,7 @@ void Interpreter::ps_rsqrte(UGeckoInstruction inst)
|
||||
const float dst_ps1 =
|
||||
ForceSingle(PowerPC::ppcState.fpscr, Common::ApproximateReciprocalSquareRoot(ps1));
|
||||
|
||||
rPS(inst.FD).SetBoth(dst_ps0, dst_ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(dst_ps0, dst_ps1);
|
||||
PowerPC::UpdateFPRFSingle(dst_ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -192,8 +196,8 @@ void Interpreter::ps_rsqrte(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_sub(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
const float ps0 =
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
@ -202,7 +206,7 @@ void Interpreter::ps_sub(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_sub(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -211,8 +215,8 @@ void Interpreter::ps_sub(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_add(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
const float ps0 =
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
@ -221,7 +225,7 @@ void Interpreter::ps_add(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_add(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -230,8 +234,8 @@ void Interpreter::ps_add(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_mul(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
@ -241,7 +245,7 @@ void Interpreter::ps_mul(UGeckoInstruction inst)
|
||||
const float ps1 = ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_mul(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c1).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -250,9 +254,9 @@ void Interpreter::ps_mul(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_msub(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
@ -264,7 +268,7 @@ void Interpreter::ps_msub(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_msub(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c1, b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -273,9 +277,9 @@ void Interpreter::ps_msub(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_madd(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
@ -287,7 +291,7 @@ void Interpreter::ps_madd(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_madd(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c1, b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -296,9 +300,9 @@ void Interpreter::ps_madd(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_nmsub(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
@ -313,7 +317,7 @@ void Interpreter::ps_nmsub(UGeckoInstruction inst)
|
||||
const float ps0 = std::isnan(tmp0) ? tmp0 : -tmp0;
|
||||
const float ps1 = std::isnan(tmp1) ? tmp1 : -tmp1;
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -322,9 +326,9 @@ void Interpreter::ps_nmsub(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_nmadd(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
@ -339,7 +343,7 @@ void Interpreter::ps_nmadd(UGeckoInstruction inst)
|
||||
const float ps0 = std::isnan(tmp0) ? tmp0 : -tmp0;
|
||||
const float ps1 = std::isnan(tmp1) ? tmp1 : -tmp1;
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -348,16 +352,16 @@ void Interpreter::ps_nmadd(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_sum0(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const float ps0 =
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_add(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS1AsDouble()).value);
|
||||
const float ps1 = ForceSingle(PowerPC::ppcState.fpscr, c.PS1AsDouble());
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -366,16 +370,16 @@ void Interpreter::ps_sum0(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_sum1(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const float ps0 = ForceSingle(PowerPC::ppcState.fpscr, c.PS0AsDouble());
|
||||
const float ps1 =
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_add(&PowerPC::ppcState.fpscr, a.PS0AsDouble(), b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps1);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -384,8 +388,8 @@ void Interpreter::ps_sum1(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_muls0(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const float ps0 = ForceSingle(PowerPC::ppcState.fpscr,
|
||||
@ -393,7 +397,7 @@ void Interpreter::ps_muls0(UGeckoInstruction inst)
|
||||
const float ps1 = ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_mul(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c0).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -402,8 +406,8 @@ void Interpreter::ps_muls0(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_muls1(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
const float ps0 = ForceSingle(PowerPC::ppcState.fpscr,
|
||||
@ -411,7 +415,7 @@ void Interpreter::ps_muls1(UGeckoInstruction inst)
|
||||
const float ps1 = ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_mul(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c1).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -420,9 +424,9 @@ void Interpreter::ps_muls1(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_madds0(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& c = rPS(inst.FC);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
|
||||
|
||||
const double c0 = Force25Bit(c.PS0AsDouble());
|
||||
const float ps0 =
|
||||
@ -432,7 +436,7 @@ void Interpreter::ps_madds0(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
|
||||
NI_madd(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c0, b.PS1AsDouble()).value);
|
||||
|
||||
rPS(inst.FD).SetBoth(ps0, ps1);
|
||||
PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
|
||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -441,9 +445,9 @@ void Interpreter::ps_madds0(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_madds1(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
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const auto& c = rPS(inst.FC);
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const auto& a = PowerPC::ppcState.ps[inst.FA];
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||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
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||||
const auto& c = PowerPC::ppcState.ps[inst.FC];
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||||
|
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const double c1 = Force25Bit(c.PS1AsDouble());
|
||||
const float ps0 =
|
||||
@ -453,7 +457,7 @@ void Interpreter::ps_madds1(UGeckoInstruction inst)
|
||||
ForceSingle(PowerPC::ppcState.fpscr,
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||||
NI_madd(&PowerPC::ppcState.fpscr, a.PS1AsDouble(), c1, b.PS1AsDouble()).value);
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||||
|
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rPS(inst.FD).SetBoth(ps0, ps1);
|
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PowerPC::ppcState.ps[inst.FD].SetBoth(ps0, ps1);
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||||
PowerPC::UpdateFPRFSingle(ps0);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -462,32 +466,32 @@ void Interpreter::ps_madds1(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::ps_cmpu0(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
Helper_FloatCompareUnordered(inst, a.PS0AsDouble(), b.PS0AsDouble());
|
||||
}
|
||||
|
||||
void Interpreter::ps_cmpo0(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
Helper_FloatCompareOrdered(inst, a.PS0AsDouble(), b.PS0AsDouble());
|
||||
}
|
||||
|
||||
void Interpreter::ps_cmpu1(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
Helper_FloatCompareUnordered(inst, a.PS1AsDouble(), b.PS1AsDouble());
|
||||
}
|
||||
|
||||
void Interpreter::ps_cmpo1(UGeckoInstruction inst)
|
||||
{
|
||||
const auto& a = rPS(inst.FA);
|
||||
const auto& b = rPS(inst.FB);
|
||||
const auto& a = PowerPC::ppcState.ps[inst.FA];
|
||||
const auto& b = PowerPC::ppcState.ps[inst.FB];
|
||||
|
||||
Helper_FloatCompareOrdered(inst, a.PS1AsDouble(), b.PS1AsDouble());
|
||||
}
|
||||
|
@ -85,8 +85,8 @@ void Interpreter::mtfsfx(UGeckoInstruction inst)
|
||||
m |= (0xFU << (i * 4));
|
||||
}
|
||||
|
||||
PowerPC::ppcState.fpscr =
|
||||
(PowerPC::ppcState.fpscr.Hex & ~m) | (static_cast<u32>(rPS(inst.FB).PS0AsU64()) & m);
|
||||
PowerPC::ppcState.fpscr = (PowerPC::ppcState.fpscr.Hex & ~m) |
|
||||
(static_cast<u32>(PowerPC::ppcState.ps[inst.FB].PS0AsU64()) & m);
|
||||
FPSCRUpdated(&PowerPC::ppcState.fpscr);
|
||||
|
||||
if (inst.Rc)
|
||||
@ -604,7 +604,7 @@ void Interpreter::mcrfs(UGeckoInstruction inst)
|
||||
|
||||
void Interpreter::mffsx(UGeckoInstruction inst)
|
||||
{
|
||||
rPS(inst.FD).SetPS0(UINT64_C(0xFFF8000000000000) | PowerPC::ppcState.fpscr.Hex);
|
||||
PowerPC::ppcState.ps[inst.FD].SetPS0(UINT64_C(0xFFF8000000000000) | PowerPC::ppcState.fpscr.Hex);
|
||||
|
||||
if (inst.Rc)
|
||||
PowerPC::ppcState.UpdateCR1();
|
||||
|
@ -259,8 +259,6 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
|
||||
#define TL PowerPC::ppcState.spr[SPR_TL]
|
||||
#define TU PowerPC::ppcState.spr[SPR_TU]
|
||||
|
||||
#define rPS(i) (PowerPC::ppcState.ps[(i)])
|
||||
|
||||
inline void SetCarry(u32 ca)
|
||||
{
|
||||
PowerPC::ppcState.xer_ca = ca;
|
||||
|
@ -319,12 +319,13 @@ void RegisterWidget::PopulateTable()
|
||||
|
||||
// Floating point registers (double)
|
||||
AddRegister(
|
||||
i, 2, RegisterType::fpr, "f" + std::to_string(i), [i] { return rPS(i).PS0AsU64(); },
|
||||
[i](u64 value) { rPS(i).SetPS0(value); });
|
||||
i, 2, RegisterType::fpr, "f" + std::to_string(i),
|
||||
[i] { return PowerPC::ppcState.ps[i].PS0AsU64(); },
|
||||
[i](u64 value) { PowerPC::ppcState.ps[i].SetPS0(value); });
|
||||
|
||||
AddRegister(
|
||||
i, 4, RegisterType::fpr, "", [i] { return rPS(i).PS1AsU64(); },
|
||||
[i](u64 value) { rPS(i).SetPS1(value); });
|
||||
i, 4, RegisterType::fpr, "", [i] { return PowerPC::ppcState.ps[i].PS1AsU64(); },
|
||||
[i](u64 value) { PowerPC::ppcState.ps[i].SetPS1(value); });
|
||||
}
|
||||
|
||||
// The IBAT and DBAT registers have a large gap between
|
||||
|
Loading…
x
Reference in New Issue
Block a user