From 10a14d17d3f31c9f4a8487bf293524ae1f6240cc Mon Sep 17 00:00:00 2001 From: nodchip Date: Sat, 21 Aug 2010 10:53:17 +0000 Subject: [PATCH] JitIL: Fixed a wrong implementation reported in r6111. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6115 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h | 1 + .../Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp | 11 +++++++++++ Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp | 2 +- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h index cabbec990b..9e5a37d380 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h @@ -168,6 +168,7 @@ public: void mftb(UGeckoInstruction inst); void mtcrf(UGeckoInstruction inst); void mfcr(UGeckoInstruction inst); + void mcrf(UGeckoInstruction inst); void crXX(UGeckoInstruction inst); void reg_imm(UGeckoInstruction inst); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp index 4ff1d6a29b..de7f72bc84 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp @@ -155,6 +155,17 @@ void JitIL::mtcrf(UGeckoInstruction inst) } } +void JitIL::mcrf(UGeckoInstruction inst) +{ + INSTRUCTION_START + JITDISABLE(SystemRegisters) + + if (inst.CRFS != inst.CRFD) + { + ibuild.EmitStoreCR(ibuild.EmitLoadCR(inst.CRFS), inst.CRFD); + } +} + void JitIL::crXX(UGeckoInstruction inst) { // Ported from Jit_SystemRegister.cpp diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp index 9024080402..b4712094fc 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp @@ -186,7 +186,7 @@ static GekkoOPTemplate table19[] = {193, &JitIL::crXX}, //"crxor", OPTYPE_CR, FL_EVIL}}, {150, &JitIL::DoNothing}, //"isync", OPTYPE_ICACHE, FL_EVIL}}, - {0, &JitIL::mfcr}, //"mcrf", OPTYPE_SYSTEM, FL_EVIL}}, + {0, &JitIL::mcrf}, //"mcrf", OPTYPE_SYSTEM, FL_EVIL}}, {50, &JitIL::rfi}, //"rfi", OPTYPE_SYSTEM, FL_ENDBLOCK | FL_CHECKEXCEPTIONS, 1}}, {18, &JitIL::Default}, //"rfid", OPTYPE_SYSTEM, FL_ENDBLOCK | FL_CHECKEXCEPTIONS}}