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Merge pull request #12900 from Sintendo/jitarm64-remove-temp-gpr

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JitArm64: Remove unused temp_gprs
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Tilka 2024-06-30 15:57:08 +01:00 committed by GitHub
commit 1421c2d9ff
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2 changed files with 0 additions and 8 deletions
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4
Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp
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@ -132,8 +132,6 @@ void JitArm64::fp_arith(UGeckoInstruction inst)
result_reg = reg_encoder(V1Q); result_reg = reg_encoder(V1Q);
} }
const ARM64Reg temp_gpr = m_accurate_nans && !single ? gpr.GetReg() : ARM64Reg::INVALID_REG;
switch (op5) switch (op5)
{ {
case 18: case 18:
@ -251,8 +249,6 @@ void JitArm64::fp_arith(UGeckoInstruction inst)
fpr.Unlock(V0Q); fpr.Unlock(V0Q);
if (V1Q != ARM64Reg::INVALID_REG) if (V1Q != ARM64Reg::INVALID_REG)
fpr.Unlock(V1Q); fpr.Unlock(V1Q);
if (temp_gpr != ARM64Reg::INVALID_REG)
gpr.Unlock(temp_gpr);
if (output_is_single) if (output_is_single)
{ {

4
Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp
View File

@ -141,8 +141,6 @@ void JitArm64::ps_arith(UGeckoInstruction inst)
result_reg = reg_encoder(V1Q); result_reg = reg_encoder(V1Q);
} }
const ARM64Reg temp_gpr = m_accurate_nans && !singles ? gpr.GetReg() : ARM64Reg::INVALID_REG;
if (m_accurate_nans) if (m_accurate_nans)
{ {
if (V0Q == ARM64Reg::INVALID_REG) if (V0Q == ARM64Reg::INVALID_REG)
@ -304,8 +302,6 @@ void JitArm64::ps_arith(UGeckoInstruction inst)
fpr.Unlock(V1Q); fpr.Unlock(V1Q);
if (V2Q != ARM64Reg::INVALID_REG) if (V2Q != ARM64Reg::INVALID_REG)
fpr.Unlock(V2Q); fpr.Unlock(V2Q);
if (temp_gpr != ARM64Reg::INVALID_REG)
gpr.Unlock(temp_gpr);
ASSERT_MSG(DYNA_REC, singles == singles_func(), ASSERT_MSG(DYNA_REC, singles == singles_func(),
"Register allocation turned singles into doubles in the middle of ps_arith"); "Register allocation turned singles into doubles in the middle of ps_arith");