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https://github.com/dolphin-emu/dolphin.git
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[AArch64] Adds backpatching routines.
Currently supports only integer loadstores. Floating point loadstores will come later. This system is semi based on the ARMv7 backpatching routine, where we need to initialize our backpatch routine sizes prior to actually using them so we know we won't be overwriting any memory.
This commit is contained in:
Ryan Houdek
parent
13b70c2fbd
commit
17a4208fe5
@ -223,6 +223,7 @@ elseif(_M_ARM_64)
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PowerPC/JitArm64/JitAsm.cpp
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PowerPC/JitArm64/JitArm64Cache.cpp
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PowerPC/JitArm64/JitArm64_RegCache.cpp
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PowerPC/JitArm64/JitArm64_BackPatch.cpp
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PowerPC/JitArm64/JitArm64_Branch.cpp
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PowerPC/JitArm64/JitArm64_Integer.cpp
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PowerPC/JitArm64/JitArm64_LoadStore.cpp
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@ -25,6 +25,7 @@ void JitArm64::Init()
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code_block.m_stats = &js.st;
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code_block.m_gpa = &js.gpa;
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code_block.m_fpa = &js.fpa;
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InitBackpatch();
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}
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void JitArm64::ClearCache()
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@ -278,6 +279,7 @@ const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitB
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js.next_inst = ops[i + 1].inst;
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js.next_compilerPC = ops[i + 1].address;
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}
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if (!ops[i].skip)
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{
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if (js.memcheck && (opinfo->flags & FL_USE_FPU))
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@ -4,6 +4,8 @@
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#pragma once
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#include <map>
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#include "Common/Arm64Emitter.h"
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#include "Core/PowerPC/CPUCoreBase.h"
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@ -11,6 +13,7 @@
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#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
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#include "Core/PowerPC/JitArm64/JitArm64Cache.h"
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#include "Core/PowerPC/JitArm64/JitAsm.h"
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#include "Core/PowerPC/JitArmCommon/BackPatch.h"
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#include "Core/PowerPC/JitCommon/JitBase.h"
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#define PPCSTATE_OFF(elem) ((s64)&PowerPC::ppcState.elem - (s64)&PowerPC::ppcState)
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@ -31,11 +34,9 @@ public:
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JitBaseBlockCache *GetBlockCache() { return &blocks; }
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const u8 *BackPatch(u8 *codePtr, u32 em_address, void *ctx) { return nullptr; }
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bool IsInCodeSpace(u8 *ptr) { return IsInSpace(ptr); }
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bool HandleFault(uintptr_t access_address, SContext* ctx) override { return false; }
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bool HandleFault(uintptr_t access_address, SContext* ctx) override;
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void ClearCache();
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@ -106,6 +107,14 @@ private:
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PPCAnalyst::CodeBuffer code_buffer;
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// The key is the backpatch flags
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std::map<u32, BackPatchInfo> m_backpatch_info;
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// Backpatching routines
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bool DisasmLoadStore(const u8* ptr, u32* flags, Arm64Gen::ARM64Reg* reg);
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void InitBackpatch();
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u32 EmitBackpatchRoutine(ARM64XEmitter* emit, u32 flags, bool fastmem, bool do_padding, Arm64Gen::ARM64Reg RS, Arm64Gen::ARM64Reg addr);
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const u8* DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlock *b);
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void DoDownCount();
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453
Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
Normal file
453
Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
Normal file
@ -0,0 +1,453 @@
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// Copyright 2014 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <string>
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#include "Common/CommonTypes.h"
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#include "Common/StringUtil.h"
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#include "Core/HW/Memmap.h"
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#include "Core/PowerPC/JitArm64/Jit.h"
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#include "Core/PowerPC/JitArmCommon/BackPatch.h"
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using namespace Arm64Gen;
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static void DoBacktrace(uintptr_t access_address, SContext* ctx)
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{
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for (int i = 0; i < 30; i += 2)
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ERROR_LOG(DYNA_REC, "R%d: 0x%016llx\tR%d: 0x%016llx", i, ctx->CTX_REG(i), i + 1, ctx->CTX_REG(i + 1));
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ERROR_LOG(DYNA_REC, "R30: 0x%016llx\tSP: 0x%016llx", ctx->CTX_REG(30), ctx->CTX_SP);
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ERROR_LOG(DYNA_REC, "Access Address: 0x%016lx", access_address);
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ERROR_LOG(DYNA_REC, "PC: 0x%016llx", ctx->CTX_PC);
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ERROR_LOG(DYNA_REC, "Memory Around PC");
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std::string pc_memory = "";
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for (u64 pc = (ctx->CTX_PC - 32); pc < (ctx->CTX_PC + 32); pc += 16)
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{
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pc_memory += StringFromFormat("%08x%08x%08x%08x",
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*(u32*)pc, *(u32*)(pc + 4), *(u32*)(pc + 8), *(u32*)(pc + 12));
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ERROR_LOG(DYNA_REC, "0x%016lx: %08x %08x %08x %08x",
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pc, *(u32*)pc, *(u32*)(pc + 4), *(u32*)(pc + 8), *(u32*)(pc + 12));
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}
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ERROR_LOG(DYNA_REC, "Full block: %s", pc_memory.c_str());
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}
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bool JitArm64::DisasmLoadStore(const u8* ptr, u32* flags, ARM64Reg* reg)
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{
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u32 inst = *(u32*)ptr;
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u32 prev_inst = *(u32*)(ptr - 4);
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u32 next_inst = *(u32*)(ptr + 4);
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u8 op = (inst >> 22) & 0xFF;
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u8 size = (inst >> 30) & 0x3;
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if (size == 0) // 8-bit
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*flags |= BackPatchInfo::FLAG_SIZE_8;
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else if (size == 1) // 16-bit
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*flags |= BackPatchInfo::FLAG_SIZE_16;
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else // 32-bit
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*flags |= BackPatchInfo::FLAG_SIZE_32;
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if (op == 0xE5) // Load
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{
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*flags |= BackPatchInfo::FLAG_LOAD;
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*reg = (ARM64Reg)(inst & 0x1F);
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if ((next_inst & 0x7FFFF000) != 0x5AC00000) // REV
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*flags |= BackPatchInfo::FLAG_REVERSE;
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if ((next_inst & 0x7F800000) == 0x13000000) // SXTH
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*flags |= BackPatchInfo::FLAG_EXTEND;
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return true;
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}
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else if (op == 0xE4) // Store
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{
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*flags |= BackPatchInfo::FLAG_STORE;
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if (size == 0) // 8-bit
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*reg = (ARM64Reg)(inst & 0x1F);
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else // 16-bit/32-bit register is in previous REV instruction
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*reg = (ARM64Reg)((prev_inst >> 5) & 0x1F);
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return true;
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}
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return false;
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}
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u32 JitArm64::EmitBackpatchRoutine(ARM64XEmitter* emit, u32 flags, bool fastmem, bool do_padding, ARM64Reg RS, ARM64Reg addr)
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{
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u32 trouble_offset = 0;
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const u8* code_base = emit->GetCodePtr();
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if (fastmem)
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{
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MOVK(addr, ((u64)Memory::base >> 32) & 0xFFFF, SHIFT_32);
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if (flags & BackPatchInfo::FLAG_STORE &&
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flags & (BackPatchInfo::FLAG_SIZE_F32 | BackPatchInfo::FLAG_SIZE_F64))
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{
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}
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else if (flags & BackPatchInfo::FLAG_LOAD &&
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flags & (BackPatchInfo::FLAG_SIZE_F32 | BackPatchInfo::FLAG_SIZE_F64))
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{
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}
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else if (flags & BackPatchInfo::FLAG_STORE)
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{
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ARM64Reg temp = W0;
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->REV32(temp, RS);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->REV16(temp, RS);
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trouble_offset = (emit->GetCodePtr() - code_base) / 4;
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->STR(INDEX_UNSIGNED, temp, addr, 0);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->STRH(INDEX_UNSIGNED, temp, addr, 0);
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else
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{
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emit->STRB(INDEX_UNSIGNED, RS, addr, 0);
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emit->HINT(HINT_NOP);
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}
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}
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else
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{
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trouble_offset = (emit->GetCodePtr() - code_base) / 4;
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->LDR(INDEX_UNSIGNED, RS, addr, 0);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->LDRH(INDEX_UNSIGNED, RS, addr, 0);
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else if (flags & BackPatchInfo::FLAG_SIZE_8)
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emit->LDRB(INDEX_UNSIGNED, RS, addr, 0);
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if (!(flags & BackPatchInfo::FLAG_REVERSE))
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{
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->REV32(RS, RS);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->REV16(RS, RS);
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}
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if (flags & BackPatchInfo::FLAG_EXTEND)
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emit->SXTH(RS, RS);
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}
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}
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else
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{
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if (flags & BackPatchInfo::FLAG_STORE &&
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flags & (BackPatchInfo::FLAG_SIZE_F32 | BackPatchInfo::FLAG_SIZE_F64))
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{
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}
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else if (flags & BackPatchInfo::FLAG_LOAD &&
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flags & (BackPatchInfo::FLAG_SIZE_F32 | BackPatchInfo::FLAG_SIZE_F64))
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{
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}
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else if (flags & BackPatchInfo::FLAG_STORE)
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{
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emit->MOV(W0, RS);
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->MOVI2R(X30, (u64)&Memory::Write_U32);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->MOVI2R(X30, (u64)&Memory::Write_U16);
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else
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emit->MOVI2R(X30, (u64)&Memory::Write_U8);
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emit->BLR(X30);
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}
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else
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{
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->MOVI2R(X30, (u64)&Memory::Read_U32);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->MOVI2R(X30, (u64)&Memory::Read_U16);
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else if (flags & BackPatchInfo::FLAG_SIZE_8)
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emit->MOVI2R(X30, (u64)&Memory::Read_U8);
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emit->BLR(X30);
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if (!(flags & BackPatchInfo::FLAG_REVERSE))
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{
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emit->MOV(RS, W0);
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}
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else
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{
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if (flags & BackPatchInfo::FLAG_SIZE_32)
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emit->REV32(RS, W0);
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else if (flags & BackPatchInfo::FLAG_SIZE_16)
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emit->REV16(RS, W0);
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}
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if (flags & BackPatchInfo::FLAG_EXTEND)
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emit->SXTH(RS, RS);
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}
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}
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if (do_padding)
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{
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BackPatchInfo& info = m_backpatch_info[flags];
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u32 num_insts_max = std::max(info.m_fastmem_size, info.m_slowmem_size);
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u32 code_size = emit->GetCodePtr() - code_base;
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code_size /= 4;
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for (u32 i = 0; i < (num_insts_max - code_size); ++i)
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emit->HINT(HINT_NOP);
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}
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return trouble_offset;
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}
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bool JitArm64::HandleFault(uintptr_t access_address, SContext* ctx)
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{
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if (access_address < (uintptr_t)Memory::base)
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{
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ERROR_LOG(DYNA_REC, "Exception handler - access below memory space. PC: 0x%016llx 0x%016lx < 0x%016lx", ctx->CTX_PC, access_address, (uintptr_t)Memory::base);
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DoBacktrace(access_address, ctx);
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return false;
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}
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if (!IsInSpace((u8*)ctx->CTX_PC))
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{
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ERROR_LOG(DYNA_REC, "Backpatch location not within codespace 0x%016llx(0x%08x)", ctx->CTX_PC, Common::swap32(*(u32*)ctx->CTX_PC));
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DoBacktrace(access_address, ctx);
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return false;
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}
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ARM64Reg reg = INVALID_REG;
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u32 flags = 0;
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if (!DisasmLoadStore((const u8*)ctx->CTX_PC, &flags, ®))
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{
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ERROR_LOG(DYNA_REC, "Error disassembling address 0x%016llx(0x%08x)", ctx->CTX_PC, Common::swap32(*(u32*)ctx->CTX_PC));
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DoBacktrace(access_address, ctx);
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return false;
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}
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BackPatchInfo& info = m_backpatch_info[flags];
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ARM64XEmitter emitter((u8*)(ctx->CTX_PC - info.m_fastmem_trouble_inst_offset * 4));
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u64 new_pc = (u64)emitter.GetCodePtr();
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// Slowmem routine doesn't need the address location
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// It is already in the correct location
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EmitBackpatchRoutine(&emitter, flags, false, true, reg, INVALID_REG);
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emitter.FlushIcache();
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ctx->CTX_PC = new_pc;
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// Wipe the top bits of the addr_register
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if (flags & BackPatchInfo::FLAG_STORE)
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ctx->CTX_REG(1) &= 0xFFFFFFFFUll;
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else
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ctx->CTX_REG(0) &= 0xFFFFFFFFUll;
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return true;
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}
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void JitArm64::InitBackpatch()
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{
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u32 flags = 0;
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BackPatchInfo info;
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u8* code_base = GetWritableCodePtr();
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u8* code_end;
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// Loads
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{
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// 8bit
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{
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flags =
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BackPatchInfo::FLAG_LOAD |
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BackPatchInfo::FLAG_SIZE_8;
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EmitBackpatchRoutine(this, flags, false, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_slowmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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info.m_fastmem_trouble_inst_offset =
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EmitBackpatchRoutine(this, flags, true, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_fastmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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m_backpatch_info[flags] = info;
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}
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// 16bit
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{
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flags =
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BackPatchInfo::FLAG_LOAD |
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BackPatchInfo::FLAG_SIZE_16;
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EmitBackpatchRoutine(this, flags, false, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_slowmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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info.m_fastmem_trouble_inst_offset =
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EmitBackpatchRoutine(this, flags, true, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_fastmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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m_backpatch_info[flags] = info;
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}
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// 32bit
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{
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flags =
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BackPatchInfo::FLAG_LOAD |
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BackPatchInfo::FLAG_SIZE_32;
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EmitBackpatchRoutine(this, flags, false, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_slowmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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info.m_fastmem_trouble_inst_offset =
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EmitBackpatchRoutine(this, flags, true, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_fastmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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m_backpatch_info[flags] = info;
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}
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// 16bit - Extend
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{
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flags =
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BackPatchInfo::FLAG_LOAD |
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BackPatchInfo::FLAG_SIZE_16 |
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BackPatchInfo::FLAG_EXTEND;
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EmitBackpatchRoutine(this, flags, false, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_slowmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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info.m_fastmem_trouble_inst_offset =
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EmitBackpatchRoutine(this, flags, true, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_fastmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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m_backpatch_info[flags] = info;
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}
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// 16bit - Reverse
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{
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flags =
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BackPatchInfo::FLAG_LOAD |
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BackPatchInfo::FLAG_SIZE_16 |
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BackPatchInfo::FLAG_REVERSE;
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EmitBackpatchRoutine(this, flags, false, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_slowmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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info.m_fastmem_trouble_inst_offset =
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EmitBackpatchRoutine(this, flags, true, false, W0, X1);
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code_end = GetWritableCodePtr();
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info.m_fastmem_size = (code_end - code_base) / 4;
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SetCodePtr(code_base);
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m_backpatch_info[flags] = info;
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}
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// 32bit - Reverse
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{
|
||||
flags =
|
||||
BackPatchInfo::FLAG_LOAD |
|
||||
BackPatchInfo::FLAG_SIZE_32 |
|
||||
BackPatchInfo::FLAG_REVERSE;
|
||||
EmitBackpatchRoutine(this, flags, false, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_slowmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
info.m_fastmem_trouble_inst_offset =
|
||||
EmitBackpatchRoutine(this, flags, true, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_fastmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
m_backpatch_info[flags] = info;
|
||||
}
|
||||
}
|
||||
|
||||
// Stores
|
||||
{
|
||||
// 8bit
|
||||
{
|
||||
flags =
|
||||
BackPatchInfo::FLAG_STORE |
|
||||
BackPatchInfo::FLAG_SIZE_8;
|
||||
EmitBackpatchRoutine(this, flags, false, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_slowmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
info.m_fastmem_trouble_inst_offset =
|
||||
EmitBackpatchRoutine(this, flags, true, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_fastmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
m_backpatch_info[flags] = info;
|
||||
}
|
||||
// 16bit
|
||||
{
|
||||
flags =
|
||||
BackPatchInfo::FLAG_STORE |
|
||||
BackPatchInfo::FLAG_SIZE_16;
|
||||
EmitBackpatchRoutine(this, flags, false, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_slowmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
info.m_fastmem_trouble_inst_offset =
|
||||
EmitBackpatchRoutine(this, flags, true, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_fastmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
m_backpatch_info[flags] = info;
|
||||
}
|
||||
// 32bit
|
||||
{
|
||||
flags =
|
||||
BackPatchInfo::FLAG_STORE |
|
||||
BackPatchInfo::FLAG_SIZE_32;
|
||||
EmitBackpatchRoutine(this, flags, false, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_slowmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
info.m_fastmem_trouble_inst_offset =
|
||||
EmitBackpatchRoutine(this, flags, true, false, W0, X1);
|
||||
code_end = GetWritableCodePtr();
|
||||
info.m_fastmem_size = (code_end - code_base) / 4;
|
||||
|
||||
SetCodePtr(code_base);
|
||||
|
||||
m_backpatch_info[flags] = info;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user