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JitArm64_Integer: subfex - Optimize InPPCState case for 0

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When the immediate is zero, we can load the carry flag from memory
directly to the destination register.

Before:
0x394bd3b8   ldrb   w24, [x29, #0x2f4]
0x2a1803f9   mov    w25, w24

After:
0x394bd3b9   ldrb   w25, [x29, #0x2f4]
This commit is contained in:
Sintendo 2024-12-28 18:15:44 +01:00
parent e54bfd6605
commit 18dd3f69f1
1 changed files with 11 additions and 3 deletions
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14
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -1219,6 +1219,7 @@ void JitArm64::subfex(UGeckoInstruction inst)
const u32 i = gpr.GetImm(a); const u32 i = gpr.GetImm(a);
const u32 j = mex ? -1 : gpr.GetImm(b); const u32 j = mex ? -1 : gpr.GetImm(b);
const u32 imm = ~i + j; const u32 imm = ~i + j;
const bool is_zero = imm == 0;
const bool is_all_ones = imm == 0xFFFFFFFF; const bool is_all_ones = imm == 0xFFFFFFFF;
switch (js.carryFlag) switch (js.carryFlag)
@ -1227,9 +1228,16 @@ void JitArm64::subfex(UGeckoInstruction inst)
{ {
gpr.BindToRegister(d, false); gpr.BindToRegister(d, false);
ARM64Reg RD = gpr.R(d); ARM64Reg RD = gpr.R(d);
auto WA = gpr.GetScopedReg(); if (is_zero)
LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca)); {
ADDI2R(RD, WA, imm, RD); LDRB(IndexType::Unsigned, RD, PPC_REG, PPCSTATE_OFF(xer_ca));
}
else
{
auto WA = gpr.GetScopedReg();
LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
ADDI2R(RD, WA, imm, RD);
}
break; break;
} }
case CarryFlag::InHostCarry: case CarryFlag::InHostCarry: