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Remove the UDSP union

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functions are passed by value rather than by reference
This is part of a bigger change so please report if it broke compile


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5228 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee
2010-03-24 05:05:25 +00:00
parent ed403c270c
commit 2e622c17dc
12 changed files with 721 additions and 719 deletions
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52
Source/Core/DSPCore/Src/DspIntMisc.cpp
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@ -29,10 +29,10 @@ namespace DSPInterpreter {
// 0001 11dd ddds ssss
// Move value from register $S to register $D.
// FIXME: Perform additional operation depending on destination register.
void mrr(const UDSPInstruction& opc)
void mrr(const UDSPInstruction opc)
{
u8 sreg = opc.hex & 0x1f;
u8 dreg = (opc.hex >> 5) & 0x1f;
u8 sreg = opc & 0x1f;
u8 dreg = (opc >> 5) & 0x1f;
u16 val = dsp_op_read_reg(sreg);
dsp_op_write_reg(dreg, val);
@ -49,9 +49,9 @@ void mrr(const UDSPInstruction& opc)
// register, has a different behaviour in S40 mode if loaded to AC0.M: The
// value gets sign extended to the whole accumulator! This does not happen in
// S16 mode.
void lri(const UDSPInstruction& opc)
void lri(const UDSPInstruction opc)
{
u8 reg = opc.hex & DSP_REG_MASK;
u8 reg = opc & DSP_REG_MASK;
u16 imm = dsp_fetch_code();
dsp_op_write_reg(reg, imm);
dsp_conditional_extend_accum(reg);
@ -61,10 +61,10 @@ void lri(const UDSPInstruction& opc)
// 0000 1ddd iiii iiii
// Load immediate value I (8-bit sign extended) to accumulator register.
// FIXME: Perform additional operation depending on destination register.
void lris(const UDSPInstruction& opc)
void lris(const UDSPInstruction opc)
{
u8 reg = ((opc.hex >> 8) & 0x7) + DSP_REG_AXL0;
u16 imm = (s8)opc.hex;
u8 reg = ((opc >> 8) & 0x7) + DSP_REG_AXL0;
u16 imm = (s8)opc;
dsp_op_write_reg(reg, imm);
dsp_conditional_extend_accum(reg);
}
@ -76,7 +76,7 @@ void lris(const UDSPInstruction& opc)
// No operation, but can be extended with extended opcode.
// This opcode is supposed to do nothing - it's used if you want to use
// an opcode extension but not do anything. At least according to duddie.
void nx(const UDSPInstruction& opc)
void nx(const UDSPInstruction opc)
{
zeroWriteBackLog();
}
@ -86,26 +86,26 @@ void nx(const UDSPInstruction& opc)
// DAR $arD
// 0000 0000 0000 01dd
// Decrement address register $arD.
void dar(const UDSPInstruction& opc)
void dar(const UDSPInstruction opc)
{
g_dsp.r[opc.hex & 0x3] = dsp_decrement_addr_reg(opc.hex & 0x3);
g_dsp.r[opc & 0x3] = dsp_decrement_addr_reg(opc & 0x3);
}
// IAR $arD
// 0000 0000 0000 10dd
// Increment address register $arD.
void iar(const UDSPInstruction& opc)
void iar(const UDSPInstruction opc)
{
g_dsp.r[opc.hex & 0x3] = dsp_increment_addr_reg(opc.hex & 0x3);
g_dsp.r[opc & 0x3] = dsp_increment_addr_reg(opc & 0x3);
}
// SUBARN $arD
// 0000 0000 0000 11dd
// Subtract indexing register $ixD from an addressing register $arD.
// used only in IPL-NTSC ucode
void subarn(const UDSPInstruction& opc)
void subarn(const UDSPInstruction opc)
{
u8 dreg = opc.hex & 0x3;
u8 dreg = opc & 0x3;
g_dsp.r[dreg] = dsp_decrease_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + dreg]);
}
@ -113,10 +113,10 @@ void subarn(const UDSPInstruction& opc)
// 0000 0000 0001 ssdd
// Adds indexing register $ixS to an addressing register $arD.
// It is critical for the Zelda ucode that this one wraps correctly.
void addarn(const UDSPInstruction& opc)
void addarn(const UDSPInstruction opc)
{
u8 dreg = opc.hex & 0x3;
u8 sreg = (opc.hex >> 2) & 0x3;
u8 dreg = opc & 0x3;
u8 sreg = (opc >> 2) & 0x3;
g_dsp.r[dreg] = dsp_increase_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]);
}
@ -126,9 +126,9 @@ void addarn(const UDSPInstruction& opc)
// 0001 0011 aaaa aiii
// bit of status register $sr. Bit number is calculated by adding 6 to
// immediate value I.
void sbclr(const UDSPInstruction& opc)
void sbclr(const UDSPInstruction opc)
{
u8 bit = (opc.hex & 0x7) + 6;
u8 bit = (opc & 0x7) + 6;
g_dsp.r[DSP_REG_SR] &= ~(1 << bit);
}
@ -136,18 +136,18 @@ void sbclr(const UDSPInstruction& opc)
// 0001 0010 aaaa aiii
// Set bit of status register $sr. Bit number is calculated by adding 6 to
// immediate value I.
void sbset(const UDSPInstruction& opc)
void sbset(const UDSPInstruction opc)
{
u8 bit = (opc.hex & 0x7) + 6;
u8 bit = (opc & 0x7) + 6;
g_dsp.r[DSP_REG_SR] |= (1 << bit);
}
// This is a bunch of flag setters, flipping bits in SR. So far so good,
// but it's harder to know exactly what effect they have.
void srbith(const UDSPInstruction& opc)
void srbith(const UDSPInstruction opc)
{
zeroWriteBackLog();
switch ((opc.hex >> 8) & 0xf)
switch ((opc >> 8) & 0xf)
{
// M0/M2 change the multiplier mode (it can multiply by 2 for free).
case 0xa: // M2
@ -183,9 +183,9 @@ void srbith(const UDSPInstruction& opc)
//----
void unknown(const UDSPInstruction& opc)
void unknown(const UDSPInstruction opc)
{
ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc.hex, g_dsp.pc);
ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc, g_dsp.pc);
}
} // namespace