From 318d1105fb56be7bd8906ccfc9b8c763661c7b54 Mon Sep 17 00:00:00 2001
From: magumagu9 <magumagu9@gmail.com>
Date: Tue, 10 Feb 2009 12:44:17 +0000
Subject: [PATCH] JitIL: Attempt to fix some 64-bit build errors.

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2204 8ced0084-cf51-0410-be5f-012b33b47a6e
---
 Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp     | 9 +++++++--
 Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.cpp | 8 ++++----
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp
index 16c3223f06..33c01909ed 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp
@@ -1010,8 +1010,13 @@ static OpArg regBuildMemAddress(RegInfo& RI, InstLoc I, InstLoc AI,
 		baseReg = regEnsureInReg(RI, AddrBase);
 	}
 
-	if (Profiled) {
-		return MDisp(baseReg, (u32)Memory::base + offset + ProfileOffset);
+	if (Profiled) {
+#ifdef _M_IX86
+		return MDisp(baseReg, (u32)Memory::base + offset + ProfileOffset);
+#else
+		// FIXME: TO IMPLEMENT (Profiled mode isn't the default,
+		// at least for the moment)
+#endif
 	}
 	return MDisp(baseReg, offset);
 }
diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.cpp
index 654feb0b41..906f3db494 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.cpp
@@ -254,7 +254,7 @@ void AsmRoutineManager::GenQuantizedStores() {
 
 	const u8* storePairedU8 = AlignCode4();
 	SHR(32, R(EAX), Imm8(6));
-	MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS));
+	MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
 	PUNPCKLDQ(XMM1, R(XMM1));
 	MULPS(XMM0, R(XMM1));
 	CVTPS2DQ(XMM0, R(XMM0));
@@ -271,7 +271,7 @@ void AsmRoutineManager::GenQuantizedStores() {
 
 	const u8* storePairedS8 = AlignCode4();
 	SHR(32, R(EAX), Imm8(6));
-	MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS));
+	MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
 	PUNPCKLDQ(XMM1, R(XMM1));
 	MULPS(XMM0, R(XMM1));
 	CVTPS2DQ(XMM0, R(XMM0));
@@ -288,7 +288,7 @@ void AsmRoutineManager::GenQuantizedStores() {
 
 	const u8* storePairedU16 = AlignCode4();
 	SHR(32, R(EAX), Imm8(6));
-	MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS));
+	MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
 	PUNPCKLDQ(XMM1, R(XMM1));
 	MULPS(XMM0, R(XMM1));
 	CVTPS2DQ(XMM0, R(XMM0));
@@ -309,7 +309,7 @@ void AsmRoutineManager::GenQuantizedStores() {
 
 	const u8* storePairedS16 = AlignCode4();
 	SHR(32, R(EAX), Imm8(6));
-	MOVSS(XMM1, MDisp(EAX, (u32)m_quantizeTableS));
+	MOVSS(XMM1, MDisp(EAX, (u32)(u64)m_quantizeTableS));
 	PUNPCKLDQ(XMM1, R(XMM1));
 	MULPS(XMM0, R(XMM1));
 	CVTPS2DQ(XMM0, R(XMM0));