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Merge pull request #10199 from Sintendo/jit64divwxnits
Jit64: divwx - One more micro-optimization
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commit
39ccdc1f98
@ -1494,22 +1494,28 @@ void Jit64::divwx(UGeckoInstruction inst)
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else if (divisor == 2 || divisor == -2)
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else if (divisor == 2 || divisor == -2)
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{
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{
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X64Reg tmp = RSCRATCH;
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X64Reg tmp = RSCRATCH;
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X64Reg sign = tmp;
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if (!Ra.IsSimpleReg())
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if (!Ra.IsSimpleReg())
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{
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{
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// Load dividend from memory
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MOV(32, R(tmp), Ra);
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MOV(32, R(tmp), Ra);
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MOV(32, Rd, R(tmp));
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MOV(32, Rd, R(tmp));
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}
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}
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else if (d == a)
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else if (d == a)
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{
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{
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// Make a copy of the dividend
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MOV(32, R(tmp), Ra);
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MOV(32, R(tmp), Ra);
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}
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}
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else
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else
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{
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{
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// Copy dividend directly into destination
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MOV(32, Rd, Ra);
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MOV(32, Rd, Ra);
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tmp = Ra.GetSimpleReg();
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tmp = Ra.GetSimpleReg();
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sign = Rd;
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}
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}
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SHR(32, Rd, Imm8(31));
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SHR(32, R(sign), Imm8(31));
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ADD(32, Rd, R(tmp));
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ADD(32, Rd, R(tmp));
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SAR(32, Rd, Imm8(1));
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SAR(32, Rd, Imm8(1));
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@ -1538,11 +1544,11 @@ void Jit64::divwx(UGeckoInstruction inst)
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else if (d == a)
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else if (d == a)
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{
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{
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// Rd holds the dividend, while RSCRATCH holds the sum
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// Rd holds the dividend, while RSCRATCH holds the sum
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// This is opposite of the other cases
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// This is the reverse of the other cases
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dividend = Rd;
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dividend = Rd;
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sum = RSCRATCH;
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sum = RSCRATCH;
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src = RSCRATCH;
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src = RSCRATCH;
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// Negate condition to compensate the swapped values
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// Negate condition to compensate for the swapped values
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cond = CC_S;
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cond = CC_S;
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}
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}
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else
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else
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