From 3b251dbb2acdd6a411a8f9d35279a88dfb62ed39 Mon Sep 17 00:00:00 2001
From: Sintendo <3380580+Sintendo@users.noreply.github.com>
Date: Sun, 23 Jun 2024 23:18:58 +0200
Subject: [PATCH] JitArm64_LoadStorePaired: Use ScopedARM64Reg

---
 .../Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
index 5d1e561eef..eb8b4d015c 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
@@ -173,20 +173,21 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
 
   const bool have_single = fpr.IsSingle(inst.RS);
 
-  ARM64Reg VS = fpr.R(inst.RS, have_single ? RegType::Single : RegType::Register);
+  Arm64FPRCache::ScopedARM64Reg VS =
+      fpr.R(inst.RS, have_single ? RegType::Single : RegType::Register);
 
   if (js.assumeNoPairedQuantize)
   {
     if (!have_single)
     {
-      const ARM64Reg single_reg = fpr.GetReg();
+      auto single_reg = fpr.GetScopedReg();
 
       if (w)
         m_float_emit.FCVT(32, 64, EncodeRegToDouble(single_reg), EncodeRegToDouble(VS));
       else
         m_float_emit.FCVTN(32, EncodeRegToDouble(single_reg), EncodeRegToDouble(VS));
 
-      VS = single_reg;
+      VS = std::move(single_reg);
     }
   }
   else
@@ -279,9 +280,6 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
     MOV(gpr.R(inst.RA), addr_reg);
   }
 
-  if (js.assumeNoPairedQuantize && !have_single)
-    fpr.Unlock(VS);
-
   gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
   fpr.Unlock(ARM64Reg::Q0);
   if (!js.assumeNoPairedQuantize || !jo.fastmem)