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https://github.com/dolphin-emu/dolphin.git
synced 2025-01-25 07:21:14 +01:00
Merge pull request #3100 from lioncash/printf
Get rid of some casts used with logging for size_t
This commit is contained in:
commit
43e60073d1
@ -788,7 +788,7 @@ bool RunCode(const ARCode &arcode)
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current_code = &arcode;
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current_code = &arcode;
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LogInfo("Code Name: %s", arcode.name.c_str());
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LogInfo("Code Name: %s", arcode.name.c_str());
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LogInfo("Number of codes: %i", arcode.ops.size());
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LogInfo("Number of codes: %zu", arcode.ops.size());
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for (const AREntry& entry : arcode.ops)
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for (const AREntry& entry : arcode.ops)
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{
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{
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@ -58,7 +58,7 @@ bool Disassemble(const std::vector<u16> &code, bool line_numbers, std::string &t
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bool Compare(const std::vector<u16> &code1, const std::vector<u16> &code2)
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bool Compare(const std::vector<u16> &code1, const std::vector<u16> &code2)
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{
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{
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if (code1.size() != code2.size())
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if (code1.size() != code2.size())
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printf("Size difference! 1=%i 2=%i\n", (int)code1.size(), (int)code2.size());
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printf("Size difference! 1=%zu 2=%zu\n", code1.size(), code2.size());
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u32 count_equal = 0;
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u32 count_equal = 0;
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const int min_size = std::min<int>((int)code1.size(), (int)code2.size());
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const int min_size = std::min<int>((int)code1.size(), (int)code2.size());
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@ -348,7 +348,7 @@ void DSPJitRegCache::FlushRegs()
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_assert_msg_(DSPLLE,
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_assert_msg_(DSPLLE,
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!regs[i].loc.IsSimpleReg(),
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!regs[i].loc.IsSimpleReg(),
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"register %u is still a simple reg", static_cast<u32>(i));
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"register %zu is still a simple reg", i);
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}
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}
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_assert_msg_(DSPLLE,
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_assert_msg_(DSPLLE,
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@ -434,7 +434,7 @@ void DSPJitRegCache::SaveRegs()
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_assert_msg_(DSPLLE,
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_assert_msg_(DSPLLE,
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!regs[i].loc.IsSimpleReg(),
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!regs[i].loc.IsSimpleReg(),
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"register %u is still a simple reg", static_cast<u32>(i));
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"register %zu is still a simple reg", i);
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}
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}
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emitter.MOV(64, R(RBP), M(&ebp_store));
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emitter.MOV(64, R(RBP), M(&ebp_store));
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@ -453,7 +453,7 @@ void DSPJitRegCache::PushRegs()
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_assert_msg_(DSPLLE,
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_assert_msg_(DSPLLE,
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!regs[i].loc.IsSimpleReg(),
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!regs[i].loc.IsSimpleReg(),
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"register %u is still a simple reg", static_cast<u32>(i));
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"register %zu is still a simple reg", i);
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}
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}
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int push_count = 0;
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int push_count = 0;
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@ -481,7 +481,7 @@ void DSPJitRegCache::PushRegs()
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_assert_msg_(DSPLLE,
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_assert_msg_(DSPLLE,
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xregs[i].guest_reg == DSP_REG_NONE ||
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xregs[i].guest_reg == DSP_REG_NONE ||
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xregs[i].guest_reg == DSP_REG_STATIC,
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xregs[i].guest_reg == DSP_REG_STATIC,
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"register %u is still used", static_cast<u32>(i));
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"register %zu is still used", i);
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}
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}
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emitter.MOV(64, R(RBP), M(&ebp_store));
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emitter.MOV(64, R(RBP), M(&ebp_store));
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@ -542,11 +542,11 @@ X64Reg DSPJitRegCache::MakeABICallSafe(X64Reg reg)
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void DSPJitRegCache::MovToHostReg(size_t reg, X64Reg host_reg, bool load)
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void DSPJitRegCache::MovToHostReg(size_t reg, X64Reg host_reg, bool load)
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{
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{
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_assert_msg_(DSPLLE, reg < regs.size(),
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_assert_msg_(DSPLLE, reg < regs.size(),
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"bad register name %u", static_cast<u32>(reg));
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"bad register name %zu", reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %u is proxy for %d", static_cast<u32>(reg), regs[reg].parentReg);
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"register %zu is proxy for %d", reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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_assert_msg_(DSPLLE, !regs[reg].used,
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"moving to host reg in use guest reg %u", static_cast<u32>(reg));
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"moving to host reg in use guest reg %zu", reg);
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X64Reg old_reg = regs[reg].loc.GetSimpleReg();
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X64Reg old_reg = regs[reg].loc.GetSimpleReg();
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if (old_reg == host_reg)
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if (old_reg == host_reg)
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{
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{
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@ -588,11 +588,11 @@ void DSPJitRegCache::MovToHostReg(size_t reg, X64Reg host_reg, bool load)
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void DSPJitRegCache::MovToHostReg(size_t reg, bool load)
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void DSPJitRegCache::MovToHostReg(size_t reg, bool load)
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{
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{
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_assert_msg_(DSPLLE, reg < regs.size(),
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_assert_msg_(DSPLLE, reg < regs.size(),
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"bad register name %u", static_cast<u32>(reg));
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"bad register name %zu", reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %u is proxy for %d", static_cast<u32>(reg), regs[reg].parentReg);
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"register %zu is proxy for %d", reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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_assert_msg_(DSPLLE, !regs[reg].used,
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"moving to host reg in use guest reg %u", static_cast<u32>(reg));
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"moving to host reg in use guest reg %zu", reg);
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if (regs[reg].loc.IsSimpleReg())
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if (regs[reg].loc.IsSimpleReg())
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{
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{
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@ -620,13 +620,13 @@ void DSPJitRegCache::MovToHostReg(size_t reg, bool load)
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void DSPJitRegCache::RotateHostReg(size_t reg, int shift, bool emit)
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void DSPJitRegCache::RotateHostReg(size_t reg, int shift, bool emit)
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{
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{
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_assert_msg_(DSPLLE, reg < regs.size(),
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_assert_msg_(DSPLLE, reg < regs.size(),
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"bad register name %u", static_cast<u32>(reg));
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"bad register name %zu", reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %u is proxy for %d", static_cast<u32>(reg), regs[reg].parentReg);
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"register %zu is proxy for %d", reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, regs[reg].loc.IsSimpleReg(),
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_assert_msg_(DSPLLE, regs[reg].loc.IsSimpleReg(),
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"register %u is not a simple reg", static_cast<u32>(reg));
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"register %zu is not a simple reg", reg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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_assert_msg_(DSPLLE, !regs[reg].used,
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"rotating in use guest reg %u", static_cast<u32>(reg));
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"rotating in use guest reg %zu", reg);
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if (shift > regs[reg].shift && emit)
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if (shift > regs[reg].shift && emit)
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{
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{
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@ -664,11 +664,11 @@ void DSPJitRegCache::RotateHostReg(size_t reg, int shift, bool emit)
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void DSPJitRegCache::MovToMemory(size_t reg)
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void DSPJitRegCache::MovToMemory(size_t reg)
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{
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{
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_assert_msg_(DSPLLE, reg < regs.size(),
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_assert_msg_(DSPLLE, reg < regs.size(),
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"bad register name %u", static_cast<u32>(reg));
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"bad register name %zu", reg);
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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_assert_msg_(DSPLLE, regs[reg].parentReg == DSP_REG_NONE,
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"register %u is proxy for %d", static_cast<u32>(reg), regs[reg].parentReg);
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"register %zu is proxy for %d", reg, regs[reg].parentReg);
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_assert_msg_(DSPLLE, !regs[reg].used,
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_assert_msg_(DSPLLE, !regs[reg].used,
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"moving to memory in use guest reg %u", static_cast<u32>(reg));
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"moving to memory in use guest reg %zu", reg);
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if (regs[reg].used)
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if (regs[reg].used)
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{
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{
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@ -125,8 +125,8 @@ static bool LoadDSPRom(u16* rom, const std::string& filename, u32 size_in_bytes)
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if (bytes.size() != size_in_bytes)
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if (bytes.size() != size_in_bytes)
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{
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{
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ERROR_LOG(DSPLLE, "%s has a wrong size (%u, expected %u)",
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ERROR_LOG(DSPLLE, "%s has a wrong size (%zu, expected %u)",
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filename.c_str(), (u32)bytes.size(), size_in_bytes);
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filename.c_str(), bytes.size(), size_in_bytes);
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return false;
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return false;
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}
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}
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@ -195,8 +195,8 @@ template <typename T>
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ReadHandlingMethod<T>* InvalidRead()
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ReadHandlingMethod<T>* InvalidRead()
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{
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{
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return ComplexRead<T>([](u32 addr) {
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return ComplexRead<T>([](u32 addr) {
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ERROR_LOG(MEMMAP, "Trying to read%d from an invalid MMIO (addr=%08x)",
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ERROR_LOG(MEMMAP, "Trying to read %zu bytes from an invalid MMIO (addr=%08x)",
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8 * (int)(sizeof (T)), addr);
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8 * sizeof(T), addr);
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return -1;
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return -1;
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});
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});
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}
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}
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@ -204,8 +204,8 @@ template <typename T>
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WriteHandlingMethod<T>* InvalidWrite()
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WriteHandlingMethod<T>* InvalidWrite()
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{
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{
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return ComplexWrite<T>([](u32 addr, T val) {
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return ComplexWrite<T>([](u32 addr, T val) {
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ERROR_LOG(MEMMAP, "Trying to write%d to an invalid MMIO (addr=%08x, val=%08x)",
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ERROR_LOG(MEMMAP, "Trying to write %zu bytes to an invalid MMIO (addr=%08x, val=%08x)",
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8 * (int)(sizeof (T)), addr, (u32)val);
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8 * sizeof(T), addr, (u32)val);
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});
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});
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}
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}
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@ -481,7 +481,7 @@ static void LoadFileStateData(const std::string& filename, std::vector<u8>& ret_
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if (!f.ReadBytes(&buffer[0], size))
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if (!f.ReadBytes(&buffer[0], size))
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{
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{
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PanicAlert("wtf? reading bytes: %i", (int)size);
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PanicAlert("wtf? reading bytes: %zu", size);
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return;
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return;
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}
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}
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}
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}
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