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[ARM] fmaddsx and fmaddx implementations.

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This commit is contained in:
Ryan Houdek 2013-09-14 05:52:09 +00:00
parent be4277e8a1
commit 53498dafeb
3 changed files with 56 additions and 2 deletions
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3
Source/Core/Core/Src/PowerPC/JitArm32/Jit.h
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@ -197,6 +197,9 @@ public:
void fmulsx(UGeckoInstruction _inst); void fmulsx(UGeckoInstruction _inst);
void fmulx(UGeckoInstruction _inst); void fmulx(UGeckoInstruction _inst);
void fmrx(UGeckoInstruction _inst); void fmrx(UGeckoInstruction _inst);
void fmaddsx(UGeckoInstruction _inst);
void fmaddx(UGeckoInstruction _inst);
// Floating point loadStore // Floating point loadStore
void lfs(UGeckoInstruction _inst); void lfs(UGeckoInstruction _inst);

51
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_FloatingPoint.cpp
View File

@ -173,3 +173,54 @@ void JitArm::fmrx(UGeckoInstruction inst)
if (inst.Rc) Helper_UpdateCR1(vD); if (inst.Rc) Helper_UpdateCR1(vD);
} }
void JitArm::fmaddsx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
ARMReg vA0 = fpr.R0(a);
ARMReg vB0 = fpr.R0(b);
ARMReg vC0 = fpr.R0(c);
ARMReg vD0 = fpr.R0(d, false);
ARMReg vD1 = fpr.R1(d, false);
ARMReg V0 = fpr.GetReg();
VMOV(V0, vB0);
VMLA(V0, vA0, vC0);
VMOV(vD0, V0);
VMOV(vD1, V0);
fpr.Unlock(V0);
if (inst.Rc) Helper_UpdateCR1(vD0);
}
void JitArm::fmaddx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
ARMReg vA0 = fpr.R0(a);
ARMReg vB0 = fpr.R0(b);
ARMReg vC0 = fpr.R0(c);
ARMReg vD0 = fpr.R0(d, false);
ARMReg V0 = fpr.GetReg();
VMOV(V0, vB0);
VMLA(V0, vA0, vC0);
VMOV(vD0, V0);
fpr.Unlock(V0);
if (inst.Rc) Helper_UpdateCR1(vD0);
}

4
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp
View File

@ -339,7 +339,7 @@ static GekkoOPTemplate table59[] =
{24, &JitArm::Default}, //"fresx", OPTYPE_FPU, FL_RC_BIT_F}}, {24, &JitArm::Default}, //"fresx", OPTYPE_FPU, FL_RC_BIT_F}},
{25, &JitArm::fmulsx}, //"fmulsx", OPTYPE_FPU, FL_RC_BIT_F}}, {25, &JitArm::fmulsx}, //"fmulsx", OPTYPE_FPU, FL_RC_BIT_F}},
{28, &JitArm::Default}, //"fmsubsx", OPTYPE_FPU, FL_RC_BIT_F}}, {28, &JitArm::Default}, //"fmsubsx", OPTYPE_FPU, FL_RC_BIT_F}},
{29, &JitArm::Default}, //"fmaddsx", OPTYPE_FPU, FL_RC_BIT_F}}, {29, &JitArm::fmaddsx}, //"fmaddsx", OPTYPE_FPU, FL_RC_BIT_F}},
{30, &JitArm::Default}, //"fnmsubsx", OPTYPE_FPU, FL_RC_BIT_F}}, {30, &JitArm::Default}, //"fnmsubsx", OPTYPE_FPU, FL_RC_BIT_F}},
{31, &JitArm::Default}, //"fnmaddsx", OPTYPE_FPU, FL_RC_BIT_F}}, {31, &JitArm::Default}, //"fnmaddsx", OPTYPE_FPU, FL_RC_BIT_F}},
}; };
@ -374,7 +374,7 @@ static GekkoOPTemplate table63_2[] =
{25, &JitArm::fmulx}, //"fmulx", OPTYPE_FPU, FL_RC_BIT_F}}, {25, &JitArm::fmulx}, //"fmulx", OPTYPE_FPU, FL_RC_BIT_F}},
{26, &JitArm::Default}, //"frsqrtex", OPTYPE_FPU, FL_RC_BIT_F}}, {26, &JitArm::Default}, //"frsqrtex", OPTYPE_FPU, FL_RC_BIT_F}},
{28, &JitArm::Default}, //"fmsubx", OPTYPE_FPU, FL_RC_BIT_F}}, {28, &JitArm::Default}, //"fmsubx", OPTYPE_FPU, FL_RC_BIT_F}},
{29, &JitArm::Default}, //"fmaddx", OPTYPE_FPU, FL_RC_BIT_F}}, {29, &JitArm::fmaddx}, //"fmaddx", OPTYPE_FPU, FL_RC_BIT_F}},
{30, &JitArm::Default}, //"fnmsubx", OPTYPE_FPU, FL_RC_BIT_F}}, {30, &JitArm::Default}, //"fnmsubx", OPTYPE_FPU, FL_RC_BIT_F}},
{31, &JitArm::Default}, //"fnmaddx", OPTYPE_FPU, FL_RC_BIT_F}}, {31, &JitArm::Default}, //"fnmaddx", OPTYPE_FPU, FL_RC_BIT_F}},
}; };