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Made fcmpx JIT64 set UN compare flag for NaN operands.
I think this is all thats needed to fix problematic games. This is untested since I don't have Dolphin setup yet :/ Set 'jo.fpAccurateFcmp' to 'false' to test. p.s. Yes its my first commit, and yes I'm drunk lol Note to Devs: The sNaN flag logic isn't implemented yet (and qNaN for fcmpo isn't either); I don't think games are going to be picky about that, but I might implement it later if games are still complaining (when I'm sober... xD) git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3970 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -208,57 +208,47 @@ void Jit64::fmrx(UGeckoInstruction inst)
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void Jit64::fcmpx(UGeckoInstruction inst)
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void Jit64::fcmpx(UGeckoInstruction inst)
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{
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{
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if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITFloatingPointOff)
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{Default(inst); return;} // turn off from debugger
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INSTRUCTION_START;
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INSTRUCTION_START;
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if (jo.fpAccurateFcmp)
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if(Core::g_CoreStartupParameter.bJITOff || jo.fpAccurateFcmp
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{
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|| Core::g_CoreStartupParameter.bJITFloatingPointOff) {
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Default(inst);
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Default(inst); return; // turn off from debugger
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return;
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}
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}
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bool ordered = inst.SUBOP10 == 32;
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/*
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double fa = rPS0(_inst.FA);
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double fb = rPS0(_inst.FB);
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u32 compareResult;
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if(IsNAN(fa) || IsNAN(fb)) compareResult = 1;
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//bool ordered = inst.SUBOP10 == 32;
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else if(fa < fb) compareResult = 8;
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int a = inst.FA;
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else if(fa > fb) compareResult = 4;
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int b = inst.FB;
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else compareResult = 2;
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int crf = inst.CRFD;
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FPSCR.FPRF = compareResult;
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CR = (CR & (~(0xf0000000 >> (_inst.CRFD * 4)))) | (compareResult << ((7 - _inst.CRFD) * 4));
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*/
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int a = inst.FA;
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int b = inst.FB;
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int crf = inst.CRFD;
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int shift = crf * 4;
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//FPSCR
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//XOR(32,R(EAX),R(EAX));
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fpr.Lock(a,b);
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fpr.Lock(a,b);
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if (a != b)
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if (a != b) fpr.LoadToX64(a, true);
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fpr.LoadToX64(a, true);
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// USES_CR
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// Are we masking sNaN invalid floating point exceptions? If not this could crash if we don't handle the exception?
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if (ordered)
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UCOMISD(fpr.R(a).GetSimpleReg(), fpr.R(b));
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COMISD(fpr.R(a).GetSimpleReg(), fpr.R(b));
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else
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FixupBranch pNaN = J_CC(CC_P);
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UCOMISD(fpr.R(a).GetSimpleReg(), fpr.R(b));
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FixupBranch pLesser = J_CC(CC_B);
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FixupBranch pLesser = J_CC(CC_B);
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FixupBranch pGreater = J_CC(CC_A);
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FixupBranch pGreater = J_CC(CC_A);
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// _x86Reg == 0
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// Equal
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2));
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2));
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FixupBranch continue1 = J();
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FixupBranch continue1 = J();
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// _x86Reg > 0
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// Greater Than
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SetJumpTarget(pGreater);
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SetJumpTarget(pGreater);
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x4));
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x4));
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FixupBranch continue2 = J();
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FixupBranch continue2 = J();
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// _x86Reg < 0
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// Less Than
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SetJumpTarget(pLesser);
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SetJumpTarget(pLesser);
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x8));
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x8));
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FixupBranch continue3 = J();
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// NAN
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SetJumpTarget(pNaN);
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MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x1));
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SetJumpTarget(continue1);
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SetJumpTarget(continue1);
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SetJumpTarget(continue2);
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SetJumpTarget(continue2);
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SetJumpTarget(continue3);
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fpr.UnlockAll();
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fpr.UnlockAll();
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}
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}
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