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Merge pull request #1050 from Sonicadvance1/AArch64-sign-extend
Add sign extending aliases to the ARM64Emitter.
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commit
581c81ce1c
@ -1081,6 +1081,20 @@ void ARM64XEmitter::UBFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms)
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{
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{
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EncodeBitfieldMOVInst(2, Rd, Rn, immr, imms);
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EncodeBitfieldMOVInst(2, Rd, Rn, immr, imms);
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}
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}
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void ARM64XEmitter::SXTB(ARM64Reg Rd, ARM64Reg Rn)
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{
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SBFM(Rd, Rn, 0, 7);
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}
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void ARM64XEmitter::SXTH(ARM64Reg Rd, ARM64Reg Rn)
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{
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SBFM(Rd, Rn, 0, 15);
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}
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void ARM64XEmitter::SXTW(ARM64Reg Rd, ARM64Reg Rn)
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{
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_assert_msg_(DYNA_REC, Is64Bit(Rd), "%s requires 64bit register as destination", __FUNCTION__);
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SBFM(Rd, Rn, 0, 31);
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}
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// Load Register (Literal)
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// Load Register (Literal)
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void ARM64XEmitter::LDR(ARM64Reg Rt, u32 imm)
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void ARM64XEmitter::LDR(ARM64Reg Rt, u32 imm)
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@ -477,6 +477,9 @@ public:
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void BFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);
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void BFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);
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void SBFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);
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void SBFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);
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void UBFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);
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void UBFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);
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void SXTB(ARM64Reg Rd, ARM64Reg Rn);
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void SXTH(ARM64Reg Rd, ARM64Reg Rn);
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void SXTW(ARM64Reg Rd, ARM64Reg Rn);
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// Load Register (Literal)
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// Load Register (Literal)
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void LDR(ARM64Reg Rt, u32 imm);
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void LDR(ARM64Reg Rt, u32 imm);
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