diff --git a/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp b/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp
index eba23ca1d0..1ed997ce4c 100644
--- a/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp
@@ -418,17 +418,17 @@ bool JitBlock::ContainsAddress(u32 em_address)
 		if (address & JIT_ICACHE_VMEM_BIT)
 		{
 			u32 cacheaddr = address & JIT_ICACHE_MASK;
-			memset(iCacheVMEM + cacheaddr, JIT_ICACHE_INVALID_BYTE, 96);
+			memset(iCacheVMEM + cacheaddr, JIT_ICACHE_INVALID_BYTE, 32);
 		}
 		else if (address & JIT_ICACHE_EXRAM_BIT)
 		{
 			u32 cacheaddr = address & JIT_ICACHEEX_MASK;
-			memset(iCacheEx + cacheaddr, JIT_ICACHE_INVALID_BYTE, 96);
+			memset(iCacheEx + cacheaddr, JIT_ICACHE_INVALID_BYTE, 32);
 		}
 		else
 		{
 			u32 cacheaddr = address & JIT_ICACHE_MASK;
-			memset(iCache + cacheaddr, JIT_ICACHE_INVALID_BYTE, 96);
+			memset(iCache + cacheaddr, JIT_ICACHE_INVALID_BYTE, 32);
 		}
 #endif
 	}
diff --git a/Source/Core/Core/Src/PowerPC/PPCCache.cpp b/Source/Core/Core/Src/PowerPC/PPCCache.cpp
index 540d4940f7..33ecc0ee88 100644
--- a/Source/Core/Core/Src/PowerPC/PPCCache.cpp
+++ b/Source/Core/Core/Src/PowerPC/PPCCache.cpp
@@ -134,8 +134,6 @@ namespace PowerPC
 #endif
 		if (t == 0xff) // load to the cache
 		{
-			if (jit)
-				jit->GetBlockCache()->InvalidateICache(addr);
 			if (HID0.ILOCK) // instruction cache is locked
 				return Memory::ReadUnchecked_U32(addr);
 			// select a way