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https://github.com/dolphin-emu/dolphin.git
synced 2025-06-15 06:58:37 +02:00
Fifo: Create a "Fifo" namespace.
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@ -223,7 +223,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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UCPCtrlReg tmp(val);
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m_CPCtrlReg.Hex = tmp.Hex;
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SetCpControlRegister();
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RunGpu();
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Fifo::RunGpu();
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})
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);
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@ -233,7 +233,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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UCPClearReg tmp(val);
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m_CPClearReg.Hex = tmp.Hex;
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SetCpClearRegister();
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RunGpu();
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Fifo::RunGpu();
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})
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);
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@ -265,17 +265,17 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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: MMIO::DirectRead<u16>(MMIO::Utils::HighPart(&fifo.CPReadWriteDistance)),
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MMIO::ComplexWrite<u16>([](u32, u16 val) {
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WriteHigh(fifo.CPReadWriteDistance, val);
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SyncGPU(SYNC_GPU_OTHER);
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Fifo::SyncGPU(Fifo::SYNC_GPU_OTHER);
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if (fifo.CPReadWriteDistance == 0)
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{
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GPFifo::ResetGatherPipe();
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ResetVideoBuffer();
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Fifo::ResetVideoBuffer();
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}
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else
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{
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ResetVideoBuffer();
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Fifo::ResetVideoBuffer();
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}
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RunGpu();
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Fifo::RunGpu();
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})
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);
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mmio->Register(base | FIFO_READ_POINTER_LO,
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@ -306,7 +306,7 @@ void GatherPipeBursted()
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// if we aren't linked, we don't care about gather pipe data
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if (!m_CPCtrlReg.GPLinkEnable)
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{
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if (IsOnThread() && !g_use_deterministic_gpu_thread)
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if (IsOnThread() && !Fifo::g_use_deterministic_gpu_thread)
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{
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// In multibuffer mode is not allowed write in the same FIFO attached to the GPU.
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// Fix Pokemon XD in DC mode.
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@ -314,10 +314,10 @@ void GatherPipeBursted()
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(ProcessorInterface::Fifo_CPUBase == fifo.CPBase) &&
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fifo.CPReadWriteDistance > 0)
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{
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FlushGpu();
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Fifo::FlushGpu();
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}
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}
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RunGpu();
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Fifo::RunGpu();
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return;
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}
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@ -340,7 +340,7 @@ void GatherPipeBursted()
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Common::AtomicAdd(fifo.CPReadWriteDistance, GATHER_PIPE_SIZE);
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RunGpu();
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Fifo::RunGpu();
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_assert_msg_(COMMANDPROCESSOR, fifo.CPReadWriteDistance <= fifo.CPEnd - fifo.CPBase,
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"FIFO is overflowed by GatherPipe !\nCPU thread is too fast!");
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@ -367,12 +367,12 @@ void UpdateInterrupts(u64 userdata)
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}
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CoreTiming::ForceExceptionCheck(0);
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s_interrupt_waiting.store(false);
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RunGpu();
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Fifo::RunGpu();
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}
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void UpdateInterruptsFromVideoBackend(u64 userdata)
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{
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if (!g_use_deterministic_gpu_thread)
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if (!Fifo::g_use_deterministic_gpu_thread)
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CoreTiming::ScheduleEvent_Threadsafe(0, et_UpdateInterrupts, userdata);
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}
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@ -494,7 +494,7 @@ void SetCpStatusRegister()
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// Here always there is one fifo attached to the GPU
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m_CPStatusReg.Breakpoint = fifo.bFF_Breakpoint;
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m_CPStatusReg.ReadIdle = !fifo.CPReadWriteDistance || (fifo.CPReadPointer == fifo.CPWritePointer);
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m_CPStatusReg.CommandIdle = !fifo.CPReadWriteDistance || AtBreakpoint() || !fifo.bFF_GPReadEnable;
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m_CPStatusReg.CommandIdle = !fifo.CPReadWriteDistance || Fifo::AtBreakpoint() || !fifo.bFF_GPReadEnable;
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m_CPStatusReg.UnderflowLoWatermark = fifo.bFF_LoWatermark;
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m_CPStatusReg.OverflowHiWatermark = fifo.bFF_HiWatermark;
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@ -519,7 +519,7 @@ void SetCpControlRegister()
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if (fifo.bFF_GPReadEnable && !m_CPCtrlReg.GPReadEnable)
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{
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fifo.bFF_GPReadEnable = m_CPCtrlReg.GPReadEnable;
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FlushGpu();
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Fifo::FlushGpu();
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}
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else
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{
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