Arm64Emitter: Make ShiftAmount enum an enum class

Reduces namespace pollution and makes the enum strongly typed.
This commit is contained in:
Lioncash 2020-12-30 20:29:57 -05:00
parent fab2053439
commit 6046a15267
3 changed files with 14 additions and 13 deletions

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@ -767,7 +767,8 @@ void ARM64XEmitter::EncodeMOVWideInst(u32 op, ARM64Reg Rd, u32 imm, ShiftAmount
ASSERT_MSG(DYNA_REC, !(imm & ~0xFFFF), "%s: immediate out of range: %d", __func__, imm); ASSERT_MSG(DYNA_REC, !(imm & ~0xFFFF), "%s: immediate out of range: %d", __func__, imm);
Rd = DecodeReg(Rd); Rd = DecodeReg(Rd);
Write32((b64Bit << 31) | (op << 29) | (0x25 << 23) | (pos << 21) | (imm << 5) | Rd); Write32((b64Bit << 31) | (op << 29) | (0x25 << 23) | (static_cast<u32>(pos) << 21) | (imm << 5) |
Rd);
} }
void ARM64XEmitter::EncodeBitfieldMOVInst(u32 op, ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms) void ARM64XEmitter::EncodeBitfieldMOVInst(u32 op, ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms)
@ -2004,7 +2005,7 @@ void ARM64XEmitter::MOVI2R(ARM64Reg Rd, u64 imm, bool optimize)
{ {
// Zero immediate, just clear the register. EOR is pointless when we have MOVZ, which looks // Zero immediate, just clear the register. EOR is pointless when we have MOVZ, which looks
// clearer in disasm too. // clearer in disasm too.
MOVZ(Rd, 0, SHIFT_0); MOVZ(Rd, 0, ShiftAmount::Shift0);
return; return;
} }
@ -2022,7 +2023,7 @@ void ARM64XEmitter::MOVI2R(ARM64Reg Rd, u64 imm, bool optimize)
// Small negative integer. Use MOVN // Small negative integer. Use MOVN
if (!Is64Bit(Rd) && (imm | 0xFFFF0000) == imm) if (!Is64Bit(Rd) && (imm | 0xFFFF0000) == imm)
{ {
MOVN(Rd, ~imm, SHIFT_0); MOVN(Rd, ~imm, ShiftAmount::Shift0);
return; return;
} }

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@ -302,12 +302,12 @@ enum IndexType
INDEX_SIGNED, // used in LDP/STP INDEX_SIGNED, // used in LDP/STP
}; };
enum ShiftAmount enum class ShiftAmount
{ {
SHIFT_0 = 0, Shift0,
SHIFT_16 = 1, Shift16,
SHIFT_32 = 2, Shift32,
SHIFT_48 = 3, Shift48,
}; };
enum class RoundingMode enum class RoundingMode
@ -737,9 +737,9 @@ public:
void CMP(ARM64Reg Rn, u32 imm, bool shift = false); void CMP(ARM64Reg Rn, u32 imm, bool shift = false);
// Data Processing (Immediate) // Data Processing (Immediate)
void MOVZ(ARM64Reg Rd, u32 imm, ShiftAmount pos = SHIFT_0); void MOVZ(ARM64Reg Rd, u32 imm, ShiftAmount pos = ShiftAmount::Shift0);
void MOVN(ARM64Reg Rd, u32 imm, ShiftAmount pos = SHIFT_0); void MOVN(ARM64Reg Rd, u32 imm, ShiftAmount pos = ShiftAmount::Shift0);
void MOVK(ARM64Reg Rd, u32 imm, ShiftAmount pos = SHIFT_0); void MOVK(ARM64Reg Rd, u32 imm, ShiftAmount pos = ShiftAmount::Shift0);
// Bitfield move // Bitfield move
void BFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms); void BFM(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms);

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@ -19,8 +19,8 @@ void JitArm64BlockCache::WriteLinkBlock(Arm64Gen::ARM64XEmitter& emit,
if (!dest) if (!dest)
{ {
// Use a fixed amount of instructions, so we can assume to use 3 instructions on patching. // Use a fixed amount of instructions, so we can assume to use 3 instructions on patching.
emit.MOVZ(DISPATCHER_PC, source.exitAddress & 0xFFFF, SHIFT_0); emit.MOVZ(DISPATCHER_PC, source.exitAddress & 0xFFFF, ShiftAmount::Shift0);
emit.MOVK(DISPATCHER_PC, source.exitAddress >> 16, SHIFT_16); emit.MOVK(DISPATCHER_PC, source.exitAddress >> 16, ShiftAmount::Shift16);
if (source.call) if (source.call)
emit.BL(m_jit.GetAsmRoutines()->dispatcher); emit.BL(m_jit.GetAsmRoutines()->dispatcher);