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SWG: Adds TEV stage output dumping. Fixes interrupt handling in the command processor. Some code cleanup and a few graphical fixes for rare cases.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4472 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
@ -21,6 +21,8 @@
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#include "EfbInterface.h"
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#include "TextureSampler.h"
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#include "Statistics.h"
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#include "VideoConfig.h"
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#include "DebugUtil.h"
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#include <math.h>
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@ -120,6 +122,11 @@ inline s16 Clamp255(s16 in)
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return in>255?255:(in<0?0:in);
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}
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inline s16 Clamp1024(s16 in)
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{
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return in>1023?1023:(in<-1024?-1024:in);
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}
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inline void Tev::SetRasColor(int colorChan, int swaptable)
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{
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switch(colorChan)
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@ -168,12 +175,7 @@ inline void Tev::SetRasColor(int colorChan, int swaptable)
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void Tev::DrawColorRegular(TevStageCombiner::ColorCombiner &cc)
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{
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struct {
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unsigned a : 8;
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unsigned b : 8;
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unsigned c : 8;
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signed d : 11;
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} InputReg;
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InputRegType InputReg;
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for (int i = 0; i < 3; i++)
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{
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@ -202,12 +204,7 @@ void Tev::DrawColorCompare(TevStageCombiner::ColorCombiner &cc)
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u32 a;
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u32 b;
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struct {
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unsigned a : 8;
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unsigned b : 8;
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unsigned c : 8;
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signed d : 11;
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} InputReg;
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InputRegType InputReg;
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switch(cmp) {
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case TEVCMP_R8_GT:
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@ -308,13 +305,7 @@ void Tev::DrawColorCompare(TevStageCombiner::ColorCombiner &cc)
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void Tev::DrawAlphaRegular(TevStageCombiner::AlphaCombiner &ac)
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{
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struct {
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unsigned a : 8;
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unsigned b : 8;
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unsigned c : 8;
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signed d : 11;
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} InputReg;
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InputRegType InputReg;
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InputReg.a = *m_AlphaInputLUT[ac.a];
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InputReg.b = *m_AlphaInputLUT[ac.b];
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@ -340,12 +331,7 @@ void Tev::DrawAlphaCompare(TevStageCombiner::AlphaCombiner &ac)
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u32 a;
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u32 b;
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struct {
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unsigned a : 8;
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unsigned b : 8;
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unsigned c : 8;
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signed d : 11;
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} InputReg;
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InputRegType InputReg;
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switch(cmp) {
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case TEVCMP_R8_GT:
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@ -641,7 +627,7 @@ void Tev::Draw()
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StageKonst[ALP_C] = *(m_KonstLUT[ka][ALP_C]);
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// set color
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SetRasColor(order.getColorChan(stageOdd), ac.rswap * 2);
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SetRasColor(order.getColorChan(stageOdd), ac.rswap * 2);
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// combine inputs
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if (cc.bias != 3)
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@ -655,6 +641,12 @@ void Tev::Draw()
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Reg[cc.dest][GRN_C] = Clamp255(Reg[cc.dest][GRN_C]);
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Reg[cc.dest][BLU_C] = Clamp255(Reg[cc.dest][BLU_C]);
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}
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else
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{
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Reg[cc.dest][RED_C] = Clamp1024(Reg[cc.dest][RED_C]);
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Reg[cc.dest][GRN_C] = Clamp1024(Reg[cc.dest][GRN_C]);
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Reg[cc.dest][BLU_C] = Clamp1024(Reg[cc.dest][BLU_C]);
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}
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if (ac.bias != 3)
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DrawAlphaRegular(ac);
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@ -663,7 +655,16 @@ void Tev::Draw()
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if (ac.clamp)
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Reg[ac.dest][ALP_C] = Clamp255(Reg[ac.dest][ALP_C]);
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else
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Reg[ac.dest][ALP_C] = Clamp1024(Reg[ac.dest][ALP_C]);
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#ifdef _DEBUG
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if (g_Config.bDumpTevStages)
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{
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u8 stage[4] = {(u8)Reg[0][0], (u8)Reg[0][1], (u8)Reg[0][2], (u8)Reg[0][3]};
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DebugUtil::DrawObjectBuffer(Position[0], Position[1], stage, stageNum, "Stage");
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}
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#endif
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}
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// convert to 8 bits per component
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@ -719,4 +720,4 @@ void Tev::SetRegColor(int reg, int comp, bool konst, s16 color)
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{
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Reg[reg][comp] = color;
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}
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}
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}
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