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PowerPC: Parametrize SRR0 macro.

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This commit is contained in:
Admiral H. Curtiss 2023-01-10 01:27:55 +01:00
parent 10dabd9975
commit 652113e6ba
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GPG Key ID: F051B4C4044F33FB
6 changed files with 14 additions and 14 deletions
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2
Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp
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@ -131,7 +131,7 @@ static void Trace(const UGeckoInstruction& inst)
DEBUG_LOG_FMT(POWERPC, DEBUG_LOG_FMT(POWERPC,
"INTER PC: {:08x} SRR0: {:08x} SRR1: {:08x} CRval: {:016x} " "INTER PC: {:08x} SRR0: {:08x} SRR1: {:08x} CRval: {:016x} "
"FPSCR: {:08x} MSR: {:08x} LR: {:08x} {} {:08x} {}", "FPSCR: {:08x} MSR: {:08x} LR: {:08x} {} {:08x} {}",
PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.cr.fields[0], PowerPC::ppcState.pc, SRR0(PowerPC::ppcState), SRR1, PowerPC::ppcState.cr.fields[0],
PowerPC::ppcState.fpscr.Hex, PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], PowerPC::ppcState.fpscr.Hex, PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8],
regs, inst.hex, ppc_inst); regs, inst.hex, ppc_inst);
} }

2
Source/Core/Core/PowerPC/Interpreter/Interpreter_Branch.cpp
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@ -118,7 +118,7 @@ void Interpreter::rfi(UGeckoInstruction inst)
// PowerPC::CheckExceptions(); // PowerPC::CheckExceptions();
// else // else
// set NPC to saved offset and resume // set NPC to saved offset and resume
PowerPC::ppcState.npc = SRR0; PowerPC::ppcState.npc = SRR0(PowerPC::ppcState);
m_end_block = true; m_end_block = true;
} }

2
Source/Core/Core/PowerPC/Jit64/Jit.cpp
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@ -759,7 +759,7 @@ void Jit64::Trace()
DEBUG_LOG_FMT(DYNA_REC, DEBUG_LOG_FMT(DYNA_REC,
"JIT64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} " "JIT64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} "
"MSR: {:08x} LR: {:08x} {} {}", "MSR: {:08x} LR: {:08x} {} {}",
PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.fpscr.Hex, PowerPC::ppcState.pc, SRR0(PowerPC::ppcState), SRR1, PowerPC::ppcState.fpscr.Hex,
PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], regs, fregs); PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], regs, fregs);
} }

2
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -705,7 +705,7 @@ void JitArm64::Trace()
DEBUG_LOG_FMT(DYNA_REC, DEBUG_LOG_FMT(DYNA_REC,
"JitArm64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} " "JitArm64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} "
"MSR: {:08x} LR: {:08x} {} {}", "MSR: {:08x} LR: {:08x} {} {}",
PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.fpscr.Hex, PowerPC::ppcState.pc, SRR0(PowerPC::ppcState), SRR1, PowerPC::ppcState.fpscr.Hex,
PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], regs, fregs); PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], regs, fregs);
} }

18
Source/Core/Core/PowerPC/PowerPC.cpp
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@ -489,7 +489,7 @@ void CheckExceptions()
if (exceptions & EXCEPTION_ISI) if (exceptions & EXCEPTION_ISI)
{ {
SRR0 = PowerPC::ppcState.npc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.npc;
// Page fault occurred // Page fault occurred
SRR1 = (PowerPC::ppcState.msr.Hex & 0x87C0FFFF) | (1 << 30); SRR1 = (PowerPC::ppcState.msr.Hex & 0x87C0FFFF) | (1 << 30);
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
@ -501,7 +501,7 @@ void CheckExceptions()
} }
else if (exceptions & EXCEPTION_PROGRAM) else if (exceptions & EXCEPTION_PROGRAM)
{ {
SRR0 = PowerPC::ppcState.pc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.pc;
// SRR1 was partially set by GenerateProgramException, so bitwise or is used here // SRR1 was partially set by GenerateProgramException, so bitwise or is used here
SRR1 |= PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 |= PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
@ -513,7 +513,7 @@ void CheckExceptions()
} }
else if (exceptions & EXCEPTION_SYSCALL) else if (exceptions & EXCEPTION_SYSCALL)
{ {
SRR0 = PowerPC::ppcState.npc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.npc;
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;
@ -525,7 +525,7 @@ void CheckExceptions()
else if (exceptions & EXCEPTION_FPU_UNAVAILABLE) else if (exceptions & EXCEPTION_FPU_UNAVAILABLE)
{ {
// This happens a lot - GameCube OS uses deferred FPU context switching // This happens a lot - GameCube OS uses deferred FPU context switching
SRR0 = PowerPC::ppcState.pc; // re-execute the instruction SRR0(PowerPC::ppcState) = PowerPC::ppcState.pc; // re-execute the instruction
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;
@ -540,7 +540,7 @@ void CheckExceptions()
} }
else if (exceptions & EXCEPTION_DSI) else if (exceptions & EXCEPTION_DSI)
{ {
SRR0 = PowerPC::ppcState.pc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.pc;
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;
@ -552,7 +552,7 @@ void CheckExceptions()
} }
else if (exceptions & EXCEPTION_ALIGNMENT) else if (exceptions & EXCEPTION_ALIGNMENT)
{ {
SRR0 = PowerPC::ppcState.pc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.pc;
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;
@ -582,7 +582,7 @@ void CheckExternalExceptions()
if (exceptions & EXCEPTION_EXTERNAL_INT) if (exceptions & EXCEPTION_EXTERNAL_INT)
{ {
// Pokemon gets this "too early", it hasn't a handler yet // Pokemon gets this "too early", it hasn't a handler yet
SRR0 = PowerPC::ppcState.npc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.npc;
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;
@ -595,7 +595,7 @@ void CheckExternalExceptions()
} }
else if (exceptions & EXCEPTION_PERFORMANCE_MONITOR) else if (exceptions & EXCEPTION_PERFORMANCE_MONITOR)
{ {
SRR0 = PowerPC::ppcState.npc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.npc;
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;
@ -606,7 +606,7 @@ void CheckExternalExceptions()
} }
else if (exceptions & EXCEPTION_DECREMENTER) else if (exceptions & EXCEPTION_DECREMENTER)
{ {
SRR0 = PowerPC::ppcState.npc; SRR0(PowerPC::ppcState) = PowerPC::ppcState.npc;
SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF; SRR1 = PowerPC::ppcState.msr.Hex & 0x87C0FFFF;
PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE; PowerPC::ppcState.msr.LE = PowerPC::ppcState.msr.ILE;
PowerPC::ppcState.msr.Hex &= ~0x04EF36; PowerPC::ppcState.msr.Hex &= ~0x04EF36;

2
Source/Core/Core/PowerPC/PowerPC.h
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@ -248,7 +248,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
#define LR(ppc_state) (ppc_state).spr[SPR_LR] #define LR(ppc_state) (ppc_state).spr[SPR_LR]
#define CTR(ppc_state) (ppc_state).spr[SPR_CTR] #define CTR(ppc_state) (ppc_state).spr[SPR_CTR]
#define SRR0 PowerPC::ppcState.spr[SPR_SRR0] #define SRR0(ppc_state) (ppc_state).spr[SPR_SRR0]
#define SRR1 PowerPC::ppcState.spr[SPR_SRR1] #define SRR1 PowerPC::ppcState.spr[SPR_SRR1]
#define SPRG0 PowerPC::ppcState.spr[SPR_SPRG0] #define SPRG0 PowerPC::ppcState.spr[SPR_SPRG0]
#define SPRG1 PowerPC::ppcState.spr[SPR_SPRG1] #define SPRG1 PowerPC::ppcState.spr[SPR_SPRG1]