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Merge pull request #8027 from MerryMage/MOVAPS
Jit64: Prefer MOVAPS where possible
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commit
68877c52d1
@ -2180,7 +2180,11 @@ void XEmitter::MOVAPS(X64Reg regOp, const OpArg& arg)
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}
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void XEmitter::MOVAPD(X64Reg regOp, const OpArg& arg)
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{
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WriteSSEOp(0x66, sseMOVAPfromRM, regOp, arg);
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// Prefer MOVAPS to MOVAPD as there is no reason to use MOVAPD over MOVAPS:
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// - They have equivalent functionality.
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// - There has never been a microarchitecture with separate single and double domains.
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// - MOVAPD is one byte longer than MOVAPS.
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MOVAPS(regOp, arg);
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}
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void XEmitter::MOVAPS(const OpArg& arg, X64Reg regOp)
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{
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@ -2188,7 +2192,7 @@ void XEmitter::MOVAPS(const OpArg& arg, X64Reg regOp)
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}
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void XEmitter::MOVAPD(const OpArg& arg, X64Reg regOp)
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{
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WriteSSEOp(0x66, sseMOVAPtoRM, regOp, arg);
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MOVAPS(arg, regOp);
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}
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void XEmitter::MOVUPS(X64Reg regOp, const OpArg& arg)
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@ -2425,8 +2429,14 @@ void XEmitter::MOVDDUP(X64Reg regOp, const OpArg& arg)
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}
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else
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{
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if (!arg.IsSimpleReg(regOp))
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if (!arg.IsSimpleReg())
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{
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MOVSD(regOp, arg);
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}
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else if (regOp != arg.GetSimpleReg())
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{
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MOVAPD(regOp, arg);
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}
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UNPCKLPD(regOp, R(regOp));
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}
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}
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@ -894,7 +894,7 @@ alignas(16) static const __m128i double_qnan_bit = _mm_set_epi64x(0xffffffffffff
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// unless the exponent is in the range of 874 to 896.
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void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
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{
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MOVSD(XMM1, R(src));
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MOVAPD(XMM1, R(src));
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// Grab Exponent
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PAND(XMM1, MConst(double_exponent));
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@ -914,7 +914,7 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
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PSUBQ(XMM0, R(XMM1));
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// xmm1 = fraction | 0x0010000000000000
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MOVSD(XMM1, R(src));
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MOVAPD(XMM1, R(src));
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PAND(XMM1, MConst(double_fraction));
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POR(XMM1, MConst(double_explicit_top_bit));
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@ -922,7 +922,7 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
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PSRLQ(XMM1, R(XMM0));
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// OR the sign bit in.
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MOVSD(XMM0, R(src));
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MOVAPD(XMM0, R(src));
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PAND(XMM0, MConst(double_sign_bit));
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PSRLQ(XMM0, 32);
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POR(XMM1, R(XMM0));
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@ -934,12 +934,12 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
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// Don't Denormalize
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// We want bits 0, 1
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MOVSD(XMM1, R(src));
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MOVAPD(XMM1, R(src));
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PAND(XMM1, MConst(double_top_two_bits));
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PSRLQ(XMM1, 32);
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// And 5 through to 34
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MOVSD(XMM0, R(src));
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MOVAPD(XMM0, R(src));
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PAND(XMM0, MConst(double_bottom_bits));
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PSRLQ(XMM0, 29);
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