diff --git a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp
index 213f84c9c3..0141482abc 100644
--- a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp
+++ b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp
@@ -117,7 +117,7 @@ void rfi(UGeckoInstruction _inst)
 	const int mask = 0x87C0FFFF;
 	MSR = (MSR & ~mask) | (SRR1 & mask);
 	//MSR[13] is set to 0.
-	MSR &= 0xFFFDFFFF;
+	MSR &= 0xFFFBFFFF;
 	// Here we should check if there are pending exceptions, and if their corresponding enable bits are set
 	// if above is true, we'd do:
 	//PowerPC::CheckExceptions();
diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp
index dd2fd15ff7..28c19cd14f 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp
@@ -66,7 +66,7 @@ void Jit64::rfi(UGeckoInstruction inst)
 	AND(32, R(ECX), Imm32(mask));
 	OR(32, R(EAX), R(ECX));       
 	// MSR &= 0xFFFDFFFF; //TODO: VERIFY
-	AND(32, R(EAX), Imm32(0xFFFDFFFF));
+	AND(32, R(EAX), Imm32(0xFFFBFFFF));
 	MOV(32, M(&MSR), R(EAX));
 	// NPC = SRR0; 
 	MOV(32, R(EAX), M(&SRR0));