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JitArm64: Correct negative overflow handling for divw

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This commit is contained in:
Lioncash 2018-05-22 12:32:20 -04:00
parent 5abe6c264a
commit 6a4f12d785
1 changed files with 6 additions and 8 deletions
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14
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -1164,17 +1164,17 @@ void JitArm64::divwx(UGeckoInstruction inst)
{ {
s32 imm_a = gpr.GetImm(a); s32 imm_a = gpr.GetImm(a);
s32 imm_b = gpr.GetImm(b); s32 imm_b = gpr.GetImm(b);
s32 imm_d; u32 imm_d;
if (imm_b == 0 || ((u32)imm_a == 0x80000000 && imm_b == -1)) if (imm_b == 0 || (static_cast<u32>(imm_a) == 0x80000000 && imm_b == -1))
{ {
if (((u32)imm_a & 0x80000000) && imm_b == 0) if (imm_a < 0)
imm_d = -1; imm_d = 0xFFFFFFFF;
else else
imm_d = 0; imm_d = 0;
} }
else else
{ {
imm_d = (u32)(imm_a / imm_b); imm_d = static_cast<u32>(imm_a / imm_b);
} }
gpr.SetImmediate(d, imm_d); gpr.SetImmediate(d, imm_d);
@ -1217,9 +1217,7 @@ void JitArm64::divwx(UGeckoInstruction inst)
SetJumpTarget(slow1); SetJumpTarget(slow1);
SetJumpTarget(slow2); SetJumpTarget(slow2);
CMP(RB, 0); ASR(RD, RA, 31);
CCMP(RA, 0, 0, CC_EQ);
CSETM(RD, CC_LT);
SetJumpTarget(done); SetJumpTarget(done);