From 71a996e33b16ec68331ae529f201ce6c6ac87402 Mon Sep 17 00:00:00 2001 From: merry Date: Fri, 1 Jan 2021 10:20:50 +0000 Subject: [PATCH] Jit_Integer: srawx: Handle a != b case with SARX Suggested by @Sintendo Co-authored-by: Sintendo --- Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index d12141099d..f7b45ca4b0 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -2052,17 +2052,21 @@ void Jit64::srawx(UGeckoInstruction inst) gpr.SetImmediate32(a, 0); FinalizeCarry(false); } - else if (cpu_info.bBMI2 && a != b) + else if (cpu_info.bBMI2) { RCX64Reg Ra = gpr.Bind(a, RCMode::Write); RCX64Reg Rb = gpr.Bind(b, RCMode::Read); - RCOpArg Rs = gpr.UseNoImm(s, RCMode::Read); + RCOpArg Rs = gpr.Use(s, RCMode::Read); RegCache::Realize(Ra, Rb, Rs); - if (a != s) - MOV(32, Ra, Rs); - SHL(64, Ra, Imm8(32)); - SARX(64, Ra, Ra, Rb); + X64Reg tmp = RSCRATCH; + if (a == s && a != b) + tmp = Ra; + else + MOV(32, R(tmp), Rs); + + SHL(64, R(tmp), Imm8(32)); + SARX(64, Ra, R(tmp), Rb); if (js.op->wantsCA) { MOV(32, R(RSCRATCH), Ra);