diff --git a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp index 9062e54e8d..395091df95 100644 --- a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp +++ b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.cpp @@ -21,20 +21,25 @@ #include "EXI_Device.h" #include "EXI_DeviceEthernet.h" -u32 ReadP, WriteP; +enum { + EXPECT_NONE = 0, + EXPECT_ID, +} ; +unsigned int Expecting; CEXIETHERNET::CEXIETHERNET() : m_uPosition(0), m_uCommand(0) { ID = 0x04020200; + Expecting = EXPECT_NONE; } void CEXIETHERNET::SetCS(int cs) { if (cs) { - ReadP = WriteP = INVALID_P; m_uPosition = 0; + Expecting = EXPECT_NONE; } } @@ -52,7 +57,7 @@ bool CEXIETHERNET::IsInterruptSet() return false; } -void CEXIETHERNET::TransferByte(u8& _byte) +void CEXIETHERNET::Transfer(u8& _byte) { //printf("%x %x POS: %d\n", _byte, m_uCommand, m_uPosition); //printf("%x %x \n", _byte, m_uCommand); @@ -64,8 +69,19 @@ void CEXIETHERNET::TransferByte(u8& _byte) { switch(m_uCommand) { + case CMD_ID: // ID + if (m_uPosition != 1) + _byte = (u8)(ID >> (24-(((m_uPosition-2) & 3) * 8))); + break; + case CMD_READ_REG: // Read from Register + // Size is 2 + // Todo, Actually read it + break; default: - printf("%x %x POS: %d Byte\n", _byte, m_uCommand, m_uPosition); + printf("Unknown CMD 0x%x\n", m_uCommand); + exit(0); + break; + } } m_uPosition++; @@ -75,93 +91,13 @@ bool isActivated() // Todo: Return actual check return true; } -#ifndef _WIN32 -inline u32 _rotl(u32 x, int shift) { - return (x << shift) | (x >> (32 - shift)); -} -#endif void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize) { + printf("IMM Write, size 0x%x, data 0x%x\n", _uSize, _uData); while (_uSize--) { u8 uByte = _uData >> 24; - if(WriteP != INVALID_P) - { - if(m_uPosition == 0) - m_uCommand = uByte; - else - { - switch(uByte) - { - case 0x0: - // Reads the ID in ImmRead after this// - break; - case 0x1: /* Network Control Register A, RW */ - // Taken from WhineCube // - #define RISE(flags) ((uByte & (flags)) && !(RegisterBlock[0x00] & (flags))) - if(RISE(BBA_NCRA_RESET)) { - printf("BBA Reset\n"); - } - if(RISE(BBA_NCRA_SR) && isActivated()) { - printf("BBA Start Recieve\n"); - //HWGLE(startRecv()); - } - if(RISE(BBA_NCRA_ST1)) { - printf("BBA Start Transmit\n"); - if(!mReadyToSend) - { - printf("Not ready to Send!\n"); - exit(0); - } - //HWGLE(sendPacket(mWriteBuffer.p(), mWriteBuffer.size())); - mReadyToSend = false; - } - //#define MAKE(type, arg) (*(type *)&(arg)) - RegisterBlock[0x00] = *(u8*)&uByte; - break; - case 0x42: - case 0x40: // Should be written - memcpy(RegisterBlock + WriteP, &uByte, _uSize); - WriteP = WriteP + _uSize; - break; - default: - printf("%x %x POS: %d Size: %x IMMW POS\n", uByte, m_uCommand, m_uPosition, _uSize); - exit(0); - break; - } - } - } - else if (_uSize == 2 && uByte == 0) - { - //printf("BBA device ID read\n"); - m_uCommand = uByte; - return; - } else if((_uSize == 4 && (_uData & 0xC0000000) == 0xC0000000) || - ( _uSize == 2 && (_uData & 0x4000) == 0x4000)) { //Write to BBA register - /* - inline DWORD makemaskw(int start, int end) { - return _rotl((2 << (end - start)) - 1, 31 - end); -} - inline DWORD getbitsw(DWORD dword, int start, int end) { - return (dword & makemaskw(start, end)) >> (31 - end); -}*/ - if( _uSize == 4) - WriteP = (u8)(_uData & (_rotl((2 << ( 23 - 16)) - 1, 23)) >> (31 - 23)); - //WriteP = (BYTE)getbitsw(data, 16, 23); - else //size == 2 - WriteP = (u8)((_uData & ~0x4000) & (_rotl((2 << ( 23 - 16)) - 1, 23)) >> (31 - 23)); - //WriteP = (BYTE)getbitsw(data & ~0x4000, 16, 23); //Dunno about this... - if(WriteP == 0x48) { - //mWriteBuffer.clear(); - //mExpectVariableLengthImmWrite = true; - printf("Prepared for variable length write to address 0x48\n"); - } else { - printf("BBA Write pointer set to 0x%0*X\n", _uSize, WriteP); - } - return; - } - //TransferByte(uByte); - m_uPosition++; + this->Transfer(uByte); _uData <<= 8; } } @@ -169,79 +105,24 @@ u32 CEXIETHERNET::ImmRead(u32 _uSize) { u32 uResult = 0; u32 uPosition = 0; + printf("IMM Read, size 0x%x\n", _uSize); while (_uSize--) { u8 uByte = 0; - switch(m_uCommand) - { - case 0x0: - { - switch(m_uPosition) - { - case 1: - _dbg_assert_(EXPANSIONINTERFACE, (uByte == 0x00)); - break; - default: - //Todo: Could just return the ID here - uByte = (u8)(ID >> (24-(((m_uPosition - 2) & 3) * 8))); - printf("Returned ID\n"); - break; - } - } - break; - default: - printf("%x %x POS: %d Size: %x IMMR\n", uByte, m_uCommand, m_uPosition, _uSize); - exit(0); - break; - } - //TransferByte(uByte); + this->Transfer(uByte); uResult |= uByte << (24-(uPosition++ * 8)); - m_uPosition++; } return uResult; } void CEXIETHERNET::DMAWrite(u32 _uAddr, u32 _uSize) { -// _dbg_assert_(EXPANSIONINTERFACE, 0); - while (_uSize--) - { - u8 uByte = Memory::Read_U8(_uAddr++); - if(m_uPosition == 0) - m_uCommand = uByte; - else - { - switch(m_uCommand) - { - default: - printf("%x %x POS: %d DMAW\n", uByte, m_uCommand, m_uPosition); - break; - } - } - //TransferByte(uByte); - m_uPosition++; - } + printf("DMAW\n"); + exit(0); } void CEXIETHERNET::DMARead(u32 _uAddr, u32 _uSize) { -// _dbg_assert_(EXPANSIONINTERFACE, 0); - while (_uSize--) - { - u8 uByte = 0; - if(m_uPosition == 0) - m_uCommand = uByte; - else - { - switch(m_uCommand) - { - default: - printf("%x %x POS: %d DMAR\n", uByte, m_uCommand, m_uPosition); - break; - } - } - //TransferByte(uByte); - m_uPosition++; - Memory::Write_U8(uByte, _uAddr++); - } + printf("DMAR\n"); + exit(0); }; diff --git a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h index 118916d107..c92b6cc028 100644 --- a/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h +++ b/Source/Core/Core/Src/HW/EXI_DeviceEthernet.h @@ -38,49 +38,11 @@ private: bool mReadyToSend; unsigned int ID; u8 RegisterBlock[0x1000]; + enum { + CMD_ID = 0x00, + CMD_READ_REG = 0x01, + }; - void TransferByte(u8& _uByte); + void Transfer(u8& _uByte); }; - -// From Whinecube // - -#define INVALID_P 0xFFFF - -#define BBA_NCRA 0x00 /* Network Control Register A, RW */ -#define BBA_NCRA_RESET (1<<0) /* RESET */ -#define BBA_NCRA_ST0 (1<<1) /* ST0, Start transmit command/status */ -#define BBA_NCRA_ST1 (1<<2) /* ST1, " */ -#define BBA_NCRA_SR (1<<3) /* SR, Start Receive */ - -#define BBA_NCRB 0x01 /* Network Control Register B, RW */ -#define BBA_NCRB_PR (1<<0) /* PR, Promiscuous Mode */ -#define BBA_NCRB_CA (1<<1) /* CA, Capture Effect Mode */ -#define BBA_NCRB_PM (1<<2) /* PM, Pass Multicast */ -#define BBA_NCRB_PB (1<<3) /* PB, Pass Bad Frame */ -#define BBA_NCRB_AB (1<<4) /* AB, Accept Broadcast */ -#define BBA_NCRB_HBD (1<<5) /* HBD, reserved */ -#define BBA_NCRB_RXINTC0 (1<<6) /* RXINTC, Receive Interrupt Counter */ -#define BBA_NCRB_RXINTC1 (1<<7) /* " */ -#define BBA_NCRB_1_PACKET_PER_INT (0<<6) /* 0 0 */ -#define BBA_NCRB_2_PACKETS_PER_INT (1<<6) /* 0 1 */ -#define BBA_NCRB_4_PACKETS_PER_INT (2<<6) /* 1 0 */ -#define BBA_NCRB_8_PACKETS_PER_INT (3<<6) /* 1 1 */ - -#define BBA_NWAYC 0x30 /* NWAY Configuration Register, RW, 84h */ -#define BBA_NWAYC_FD (1<<0) /* FD, Full Duplex Mode */ -#define BBA_NWAYC_PS100 (1<<1) /* PS100/10, Port Select 100/10 */ -#define BBA_NWAYC_ANE (1<<2) /* ANE, Autonegotiation Enable */ -#define BBA_NWAYC_ANS_RA (1<<3) /* ANS, Restart Autonegotiation */ -#define BBA_NWAYC_LTE (1<<7) /* LTE, Link Test Enable */ - -#define BBA_NWAYS 0x31 -#define BBA_NWAYS_LS10 (1<<0) -#define BBA_NWAYS_LS100 (1<<1) -#define BBA_NWAYS_LPNWAY (1<<2) -#define BBA_NWAYS_ANCLPT (1<<3) -#define BBA_NWAYS_100TXF (1<<4) -#define BBA_NWAYS_100TXH (1<<5) -#define BBA_NWAYS_10TXF (1<<6) -#define BBA_NWAYS_10TXH (1<<7) - #endif diff --git a/Source/Core/Core/Src/SConscript b/Source/Core/Core/Src/SConscript index 26a16eebf6..a05efbfb9c 100644 --- a/Source/Core/Core/Src/SConscript +++ b/Source/Core/Core/Src/SConscript @@ -38,6 +38,7 @@ files = ["Console.cpp", "HW/EXI_DeviceAD16.cpp", "HW/EXI_DeviceMemoryCard.cpp", "HW/EXI_DeviceMic.cpp", +# "HW/EXI_DeviceEthernet.cpp", "HW/GPFifo.cpp", "HW/HW.cpp", "HW/Memmap.cpp",