diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
index 02c7c75443..3d5efd80ae 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
@@ -609,12 +609,22 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
 		OR(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_ISI));
 
 		// Remove the invalid instruction from the icache, forcing a recompile
+#ifdef _M_IX86
 		if (js.compilerPC & JIT_ICACHE_VMEM_BIT)
 			MOV(32, M((jit->GetBlockCache()->GetICacheVMEM() + (js.compilerPC & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD));
 		else if (js.blockStart & JIT_ICACHE_EXRAM_BIT)
 			MOV(32, M((jit->GetBlockCache()->GetICacheEx() + (js.compilerPC & JIT_ICACHEEX_MASK))), Imm32(JIT_ICACHE_INVALID_WORD));
 		else
 			MOV(32, M((jit->GetBlockCache()->GetICache() + (js.compilerPC & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD));
+#else
+		if (js.compilerPC & JIT_ICACHE_VMEM_BIT)
+			MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheVMEM() + (js.compilerPC & JIT_ICACHE_MASK)));
+		else if (js.blockStart & JIT_ICACHE_EXRAM_BIT)
+			MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheEx() + (js.compilerPC & JIT_ICACHEEX_MASK)));
+		else
+			MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICache() + (js.compilerPC & JIT_ICACHE_MASK)));
+		MOV(32,MatR(RAX),Imm32(JIT_ICACHE_INVALID_WORD));
+#endif
 
 		WriteExceptionExit();
 	}
diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp
index 6050a27777..d8bb2bfc55 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp
@@ -1894,6 +1894,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
 			Jit->OR(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_ISI));
 
 			// Remove the invalid instruction from the icache, forcing a recompile
+#ifdef _M_IX86
 			if (InstLoc & JIT_ICACHE_VMEM_BIT)
 				Jit->MOV(32, M((jit->GetBlockCache()->GetICacheVMEM() + (InstLoc & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD));
 			else if (InstLoc & JIT_ICACHE_EXRAM_BIT)
@@ -1901,6 +1902,15 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
 			else
 				Jit->MOV(32, M((jit->GetBlockCache()->GetICache() + (InstLoc & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD));
 
+#else
+			if (InstLoc & JIT_ICACHE_VMEM_BIT)
+				Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheVMEM() + (InstLoc & JIT_ICACHE_MASK)));
+			else if (InstLoc & JIT_ICACHE_EXRAM_BIT)
+				Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheEx() + (InstLoc & JIT_ICACHEEX_MASK)));
+			else
+				Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICache() + (InstLoc & JIT_ICACHE_MASK)));
+			Jit->MOV(32, MatR(RAX), Imm32(JIT_ICACHE_INVALID_WORD));
+#endif
 			Jit->WriteExceptionExit();
 			break;
 		}