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Jit: Further improve flushing for skipped instructions

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Now we no longer have to wait until we've compiled the next instruction
after a skipped instruction before we can flush registers.

This commit is easier to read using "Ignore whitespace".
This commit is contained in:
JosJuice 2024-05-29 22:07:15 +02:00
parent c04d8415b3
commit 7dddc39068
2 changed files with 348 additions and 337 deletions
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25
Source/Core/Core/PowerPC/Jit64/Jit.cpp
View File

@ -979,6 +979,12 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
js.isLastInstruction = true; js.isLastInstruction = true;
} }
if (js.skipInstructions != 0)
{
js.skipInstructions--;
}
else
{
if (i != 0) if (i != 0)
{ {
// Gather pipe writes using a non-immediate address are discovered by profiling. // Gather pipe writes using a non-immediate address are discovered by profiling.
@ -1161,6 +1167,16 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
gpr.Commit(); gpr.Commit();
fpr.Commit(); fpr.Commit();
if (opinfo->flags & FL_LOADSTORE)
++js.numLoadStoreInst;
if (opinfo->flags & FL_USE_FPU)
++js.numFloatingPointInst;
}
}
js.fpr_is_store_safe = op.fprIsStoreSafeAfterInst;
// If we have a register that will never be used again, discard or flush it. // If we have a register that will never be used again, discard or flush it.
if (!bJITRegisterCacheOff) if (!bJITRegisterCacheOff)
{ {
@ -1173,13 +1189,6 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
previous_gpr_in_use = op.gprInUse; previous_gpr_in_use = op.gprInUse;
previous_fpr_in_use = op.fprInUse; previous_fpr_in_use = op.fprInUse;
if (opinfo->flags & FL_LOADSTORE)
++js.numLoadStoreInst;
if (opinfo->flags & FL_USE_FPU)
++js.numFloatingPointInst;
}
#if defined(_DEBUG) || defined(DEBUGFAST) #if defined(_DEBUG) || defined(DEBUGFAST)
if (!gpr.SanityCheck() || !fpr.SanityCheck()) if (!gpr.SanityCheck() || !fpr.SanityCheck())
{ {
@ -1187,8 +1196,6 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
NOTICE_LOG_FMT(DYNA_REC, "Unflushed register: {}", ppc_inst); NOTICE_LOG_FMT(DYNA_REC, "Unflushed register: {}", ppc_inst);
} }
#endif #endif
i += js.skipInstructions;
js.skipInstructions = 0;
} }
if (code_block.m_broken) if (code_block.m_broken)

24
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
View File

@ -1188,6 +1188,12 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
js.downcountAmount += opinfo->num_cycles; js.downcountAmount += opinfo->num_cycles;
js.isLastInstruction = i == (code_block.m_num_instructions - 1); js.isLastInstruction = i == (code_block.m_num_instructions - 1);
if (js.skipInstructions != 0)
{
js.skipInstructions--;
}
else
{
// Skip calling UpdateLastUsed for lmw/stmw - it usually hurts more than it helps // Skip calling UpdateLastUsed for lmw/stmw - it usually hurts more than it helps
if (op.inst.OPCD != 46 && op.inst.OPCD != 47) if (op.inst.OPCD != 46 && op.inst.OPCD != 47)
gpr.UpdateLastUsed(op.regsIn | op.regsOut); gpr.UpdateLastUsed(op.regsIn | op.regsOut);
@ -1346,6 +1352,14 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
CompileInstruction(op); CompileInstruction(op);
if (opinfo->flags & FL_LOADSTORE)
++js.numLoadStoreInst;
if (opinfo->flags & FL_USE_FPU)
++js.numFloatingPointInst;
}
}
js.fpr_is_store_safe = op.fprIsStoreSafeAfterInst; js.fpr_is_store_safe = op.fprIsStoreSafeAfterInst;
if (!CanMergeNextInstructions(1) || js.op[1].opinfo->type != ::OpType::Integer) if (!CanMergeNextInstructions(1) || js.op[1].opinfo->type != ::OpType::Integer)
@ -1365,16 +1379,6 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
previous_gpr_in_use = op.gprInUse; previous_gpr_in_use = op.gprInUse;
previous_fpr_in_use = op.fprInUse; previous_fpr_in_use = op.fprInUse;
previous_cr_in_use = op.crInUse; previous_cr_in_use = op.crInUse;
if (opinfo->flags & FL_LOADSTORE)
++js.numLoadStoreInst;
if (opinfo->flags & FL_USE_FPU)
++js.numFloatingPointInst;
}
i += js.skipInstructions;
js.skipInstructions = 0;
} }
if (code_block.m_broken) if (code_block.m_broken)