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JitArm64: Optimize creqv setting eq/gt bit
For the eq and gt bits specifically, setting negate_result is one instruction shorter than not setting it.
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@ -635,8 +635,11 @@ void JitArm64::crXXX(UGeckoInstruction inst)
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// crnor or crnand
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const bool negate_result = inst.SUBOP10 == 33 || inst.SUBOP10 == 225;
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const u32 crbd_bit = 3 - (inst.CRBD & 3);
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// crnor, crnand and sometimes creqv
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const bool negate_result =
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inst.SUBOP10 == 33 || inst.SUBOP10 == 225 ||
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(inst.SUBOP10 == 289 && (crbd_bit == PowerPC::CR_EQ_BIT || crbd_bit == PowerPC::CR_GT_BIT));
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bool bits_1_to_31_are_set = false;
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auto WA = gpr.GetScopedReg();
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@ -666,8 +669,17 @@ void JitArm64::crXXX(UGeckoInstruction inst)
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break;
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case 289: // creqv: ~(A ^ B) = A ^ ~B
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EON(WA, WA, WB);
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bits_1_to_31_are_set = true;
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// Both of these two implementations are equally correct, but which one is more efficient
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// depends on which bit we're going to set in CRBD
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if (negate_result)
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{
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ORR(XA, XA, XB);
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}
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else
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{
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EON(WA, WA, WB);
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bits_1_to_31_are_set = true;
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}
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break;
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case 33: // crnor: ~(A || B)
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