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JitArm64: Optimize creqv setting eq/gt bit

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For the eq and gt bits specifically, setting negate_result is one
instruction shorter than not setting it.
This commit is contained in:
JosJuice 2025-01-06 09:56:07 +01:00
parent c04ef2eed3
commit 82695ea6f4
1 changed files with 16 additions and 4 deletions
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20
Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
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@ -635,8 +635,11 @@ void JitArm64::crXXX(UGeckoInstruction inst)
} }
} }
// crnor or crnand const u32 crbd_bit = 3 - (inst.CRBD & 3);
const bool negate_result = inst.SUBOP10 == 33 || inst.SUBOP10 == 225; // crnor, crnand and sometimes creqv
const bool negate_result =
inst.SUBOP10 == 33 || inst.SUBOP10 == 225 ||
(inst.SUBOP10 == 289 && (crbd_bit == PowerPC::CR_EQ_BIT || crbd_bit == PowerPC::CR_GT_BIT));
bool bits_1_to_31_are_set = false; bool bits_1_to_31_are_set = false;
auto WA = gpr.GetScopedReg(); auto WA = gpr.GetScopedReg();
@ -666,8 +669,17 @@ void JitArm64::crXXX(UGeckoInstruction inst)
break; break;
case 289: // creqv: ~(A ^ B) = A ^ ~B case 289: // creqv: ~(A ^ B) = A ^ ~B
EON(WA, WA, WB); // Both of these two implementations are equally correct, but which one is more efficient
bits_1_to_31_are_set = true; // depends on which bit we're going to set in CRBD
if (negate_result)
{
ORR(XA, XA, XB);
}
else
{
EON(WA, WA, WB);
bits_1_to_31_are_set = true;
}
break; break;
case 33: // crnor: ~(A || B) case 33: // crnor: ~(A || B)