mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-01-10 08:09:26 +01:00
HW/MemoryInterface: Refactor to class.
This commit is contained in:
parent
bf95d4012f
commit
84542d915d
@ -48,7 +48,7 @@ void Init(const Sram* override_sram)
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system.GetHSP().Init();
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system.GetMemory().Init(); // Needs to be initialized before AddressSpace
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AddressSpace::Init();
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MemoryInterface::Init();
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system.GetMemoryInterface().Init();
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system.GetDSP().Init(Config::Get(Config::MAIN_DSP_HLE));
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system.GetDVDInterface().Init();
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system.GetGPFifo().Init();
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@ -74,7 +74,7 @@ void Shutdown()
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system.GetCPU().Shutdown();
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system.GetDVDInterface().Shutdown();
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system.GetDSP().Shutdown();
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MemoryInterface::Shutdown();
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system.GetMemoryInterface().Shutdown();
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AddressSpace::Shutdown();
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system.GetMemory().Shutdown();
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system.GetHSP().Shutdown();
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@ -91,7 +91,7 @@ void DoState(PointerWrap& p)
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auto& system = Core::System::GetInstance();
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system.GetMemory().DoState(p);
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p.DoMarker("Memory");
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MemoryInterface::DoState(p);
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system.GetMemoryInterface().DoState(p);
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p.DoMarker("MemoryInterface");
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VideoInterface::DoState(p);
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p.DoMarker("VideoInterface");
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@ -53,7 +53,7 @@ void MemoryManager::InitMMIO(bool is_wii)
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system.GetPixelEngine().RegisterMMIO(m_mmio_mapping.get(), 0x0C001000);
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VideoInterface::RegisterMMIO(m_mmio_mapping.get(), 0x0C002000);
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system.GetProcessorInterface().RegisterMMIO(m_mmio_mapping.get(), 0x0C003000);
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MemoryInterface::RegisterMMIO(m_mmio_mapping.get(), 0x0C004000);
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system.GetMemoryInterface().RegisterMMIO(m_mmio_mapping.get(), 0x0C004000);
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system.GetDSP().RegisterMMIO(m_mmio_mapping.get(), 0x0C005000);
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system.GetDVDInterface().RegisterMMIO(m_mmio_mapping.get(), 0x0C006000, false);
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SerialInterface::RegisterMMIO(m_mmio_mapping.get(), 0x0C006400);
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@ -11,7 +11,6 @@
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#include "Common/ChunkFile.h"
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#include "Common/CommonTypes.h"
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#include "Core/HW/MMIO.h"
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#include "Core/System.h"
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namespace MemoryInterface
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{
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@ -55,166 +54,75 @@ enum
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MI_UNKNOWN2 = 0x05A,
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};
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union MIRegion
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{
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u32 hex = 0;
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struct
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{
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u16 first_page;
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u16 last_page;
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};
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};
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MemoryInterfaceManager::MemoryInterfaceManager() = default;
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union MIProtType
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MemoryInterfaceManager::~MemoryInterfaceManager() = default;
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void MemoryInterfaceManager::Init()
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{
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u16 hex = 0;
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BitField<0, 2, u16> reg0;
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BitField<2, 2, u16> reg1;
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BitField<4, 2, u16> reg2;
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BitField<6, 2, u16> reg3;
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BitField<8, 8, u16> reserved;
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};
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union MIIRQMask
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{
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u16 hex = 0;
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BitField<0, 1, u16> reg0;
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BitField<1, 1, u16> reg1;
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BitField<2, 1, u16> reg2;
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BitField<3, 1, u16> reg3;
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BitField<4, 1, u16> all_regs;
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BitField<5, 11, u16> reserved;
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};
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union MIIRQFlag
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{
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u16 hex = 0;
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BitField<0, 1, u16> reg0;
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BitField<1, 1, u16> reg1;
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BitField<2, 1, u16> reg2;
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BitField<3, 1, u16> reg3;
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BitField<4, 1, u16> all_regs;
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BitField<5, 11, u16> reserved;
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};
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union MIProtAddr
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{
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u32 hex = 0;
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struct
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{
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u16 lo;
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u16 hi;
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};
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BitField<0, 5, u32> reserved_1;
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BitField<5, 25, u32> addr;
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BitField<30, 2, u32> reserved_2;
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};
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union MITimer
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{
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u32 hex = 0;
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struct
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{
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u16 lo;
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u16 hi;
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};
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};
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struct MIMemStruct
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{
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std::array<MIRegion, 4> regions;
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MIProtType prot_type;
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MIIRQMask irq_mask;
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MIIRQFlag irq_flag;
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u16 unknown1 = 0;
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MIProtAddr prot_addr;
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std::array<MITimer, 10> timers;
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u16 unknown2 = 0;
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};
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struct MemoryInterfaceState::Data
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{
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MIMemStruct mi_mem;
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};
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MemoryInterfaceState::MemoryInterfaceState() : m_data(std::make_unique<Data>())
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{
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}
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MemoryInterfaceState::~MemoryInterfaceState() = default;
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void Init()
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{
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auto& state = Core::System::GetInstance().GetMemoryInterfaceState().GetData();
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static_assert(std::is_trivially_copyable_v<MIMemStruct>);
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#ifdef __GNUC__
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wclass-memaccess"
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#endif
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std::memset(&state.mi_mem, 0, sizeof(MIMemStruct));
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std::memset(&m_mi_mem, 0, sizeof(MIMemStruct));
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#ifdef __GNUC__
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#pragma GCC diagnostic pop
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#endif
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}
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void Shutdown()
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void MemoryInterfaceManager::Shutdown()
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{
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Init();
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}
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void DoState(PointerWrap& p)
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void MemoryInterfaceManager::DoState(PointerWrap& p)
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{
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auto& state = Core::System::GetInstance().GetMemoryInterfaceState().GetData();
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p.Do(state.mi_mem);
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p.Do(m_mi_mem);
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}
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void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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void MemoryInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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{
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auto& state = Core::System::GetInstance().GetMemoryInterfaceState().GetData();
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for (u32 i = MI_REGION0_FIRST; i <= MI_REGION3_LAST; i += 4)
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{
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auto& region = state.mi_mem.regions[i / 4];
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auto& region = m_mi_mem.regions[i / 4];
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mmio->Register(base | i, MMIO::DirectRead<u16>(®ion.first_page),
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MMIO::DirectWrite<u16>(®ion.first_page));
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mmio->Register(base | (i + 2), MMIO::DirectRead<u16>(®ion.last_page),
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MMIO::DirectWrite<u16>(®ion.last_page));
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}
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mmio->Register(base | MI_PROT_TYPE, MMIO::DirectRead<u16>(&state.mi_mem.prot_type.hex),
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MMIO::DirectWrite<u16>(&state.mi_mem.prot_type.hex));
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mmio->Register(base | MI_PROT_TYPE, MMIO::DirectRead<u16>(&m_mi_mem.prot_type.hex),
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MMIO::DirectWrite<u16>(&m_mi_mem.prot_type.hex));
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mmio->Register(base | MI_IRQMASK, MMIO::DirectRead<u16>(&state.mi_mem.irq_mask.hex),
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MMIO::DirectWrite<u16>(&state.mi_mem.irq_mask.hex));
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mmio->Register(base | MI_IRQMASK, MMIO::DirectRead<u16>(&m_mi_mem.irq_mask.hex),
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MMIO::DirectWrite<u16>(&m_mi_mem.irq_mask.hex));
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mmio->Register(base | MI_IRQFLAG, MMIO::DirectRead<u16>(&state.mi_mem.irq_flag.hex),
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MMIO::DirectWrite<u16>(&state.mi_mem.irq_flag.hex));
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mmio->Register(base | MI_IRQFLAG, MMIO::DirectRead<u16>(&m_mi_mem.irq_flag.hex),
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MMIO::DirectWrite<u16>(&m_mi_mem.irq_flag.hex));
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mmio->Register(base | MI_UNKNOWN1, MMIO::DirectRead<u16>(&state.mi_mem.unknown1),
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MMIO::DirectWrite<u16>(&state.mi_mem.unknown1));
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mmio->Register(base | MI_UNKNOWN1, MMIO::DirectRead<u16>(&m_mi_mem.unknown1),
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MMIO::DirectWrite<u16>(&m_mi_mem.unknown1));
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// The naming is confusing here: the register contains the lower part of
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// the address (hence MI_..._LO but this is still the high part of the
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// overall register.
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mmio->Register(base | MI_PROT_ADDR_LO, MMIO::DirectRead<u16>(&state.mi_mem.prot_addr.hi),
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MMIO::DirectWrite<u16>(&state.mi_mem.prot_addr.hi));
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mmio->Register(base | MI_PROT_ADDR_HI, MMIO::DirectRead<u16>(&state.mi_mem.prot_addr.lo),
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MMIO::DirectWrite<u16>(&state.mi_mem.prot_addr.lo));
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mmio->Register(base | MI_PROT_ADDR_LO, MMIO::DirectRead<u16>(&m_mi_mem.prot_addr.hi),
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MMIO::DirectWrite<u16>(&m_mi_mem.prot_addr.hi));
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mmio->Register(base | MI_PROT_ADDR_HI, MMIO::DirectRead<u16>(&m_mi_mem.prot_addr.lo),
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MMIO::DirectWrite<u16>(&m_mi_mem.prot_addr.lo));
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for (u32 i = 0; i < state.mi_mem.timers.size(); ++i)
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for (u32 i = 0; i < m_mi_mem.timers.size(); ++i)
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{
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auto& timer = state.mi_mem.timers[i];
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auto& timer = m_mi_mem.timers[i];
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mmio->Register(base | (MI_TIMER0_HI + 4 * i), MMIO::DirectRead<u16>(&timer.hi),
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MMIO::DirectWrite<u16>(&timer.hi));
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mmio->Register(base | (MI_TIMER0_LO + 4 * i), MMIO::DirectRead<u16>(&timer.lo),
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MMIO::DirectWrite<u16>(&timer.lo));
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}
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mmio->Register(base | MI_UNKNOWN2, MMIO::DirectRead<u16>(&state.mi_mem.unknown2),
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MMIO::DirectWrite<u16>(&state.mi_mem.unknown2));
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mmio->Register(base | MI_UNKNOWN2, MMIO::DirectRead<u16>(&m_mi_mem.unknown2),
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MMIO::DirectWrite<u16>(&m_mi_mem.unknown2));
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for (u32 i = 0; i < 0x1000; i += 4)
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{
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@ -3,10 +3,16 @@
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#pragma once
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#include <array>
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#include <memory>
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#include "Common/BitField.h"
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#include "Common/CommonTypes.h"
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namespace Core
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{
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class System;
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}
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namespace MMIO
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{
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class Mapping;
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@ -15,26 +21,103 @@ class PointerWrap;
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namespace MemoryInterface
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{
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class MemoryInterfaceState
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class MemoryInterfaceManager
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{
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public:
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MemoryInterfaceState();
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MemoryInterfaceState(const MemoryInterfaceState&) = delete;
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MemoryInterfaceState(MemoryInterfaceState&&) = delete;
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MemoryInterfaceState& operator=(const MemoryInterfaceState&) = delete;
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MemoryInterfaceState& operator=(MemoryInterfaceState&&) = delete;
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~MemoryInterfaceState();
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struct Data;
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Data& GetData() { return *m_data; }
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private:
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std::unique_ptr<Data> m_data;
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};
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MemoryInterfaceManager();
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MemoryInterfaceManager(const MemoryInterfaceManager&) = delete;
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MemoryInterfaceManager(MemoryInterfaceManager&&) = delete;
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MemoryInterfaceManager& operator=(const MemoryInterfaceManager&) = delete;
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MemoryInterfaceManager& operator=(MemoryInterfaceManager&&) = delete;
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~MemoryInterfaceManager();
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void Init();
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void Shutdown();
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void DoState(PointerWrap& p);
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void RegisterMMIO(MMIO::Mapping* mmio, u32 base);
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private:
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union MIRegion
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{
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u32 hex = 0;
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struct
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{
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u16 first_page;
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u16 last_page;
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};
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};
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union MIProtType
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{
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u16 hex = 0;
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BitField<0, 2, u16> reg0;
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BitField<2, 2, u16> reg1;
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BitField<4, 2, u16> reg2;
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BitField<6, 2, u16> reg3;
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BitField<8, 8, u16> reserved;
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};
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union MIIRQMask
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{
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u16 hex = 0;
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BitField<0, 1, u16> reg0;
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BitField<1, 1, u16> reg1;
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BitField<2, 1, u16> reg2;
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BitField<3, 1, u16> reg3;
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BitField<4, 1, u16> all_regs;
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BitField<5, 11, u16> reserved;
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};
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union MIIRQFlag
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{
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u16 hex = 0;
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BitField<0, 1, u16> reg0;
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BitField<1, 1, u16> reg1;
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BitField<2, 1, u16> reg2;
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BitField<3, 1, u16> reg3;
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BitField<4, 1, u16> all_regs;
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BitField<5, 11, u16> reserved;
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};
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union MIProtAddr
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{
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u32 hex = 0;
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struct
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{
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u16 lo;
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u16 hi;
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};
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BitField<0, 5, u32> reserved_1;
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BitField<5, 25, u32> addr;
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BitField<30, 2, u32> reserved_2;
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};
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union MITimer
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{
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u32 hex = 0;
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struct
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{
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u16 lo;
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u16 hi;
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};
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};
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struct MIMemStruct
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{
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std::array<MIRegion, 4> regions;
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MIProtType prot_type;
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MIIRQMask irq_mask;
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MIIRQFlag irq_flag;
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u16 unknown1 = 0;
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MIProtAddr prot_addr;
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std::array<MITimer, 10> timers;
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u16 unknown2 = 0;
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};
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MIMemStruct m_mi_mem;
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};
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} // namespace MemoryInterface
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@ -60,7 +60,7 @@ struct System::Impl
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HSP::HSPManager m_hsp;
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IOS::HLE::USB::SkylanderPortal m_skylander_portal;
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Memory::MemoryManager m_memory;
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MemoryInterface::MemoryInterfaceState m_memory_interface_state;
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MemoryInterface::MemoryInterfaceManager m_memory_interface;
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PixelEngine::PixelEngineManager m_pixel_engine;
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PixelShaderManager m_pixel_shader_manager;
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PowerPC::PowerPCState& m_ppc_state;
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@ -184,9 +184,9 @@ Memory::MemoryManager& System::GetMemory() const
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return m_impl->m_memory;
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}
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MemoryInterface::MemoryInterfaceState& System::GetMemoryInterfaceState() const
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MemoryInterface::MemoryInterfaceManager& System::GetMemoryInterface() const
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{
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return m_impl->m_memory_interface_state;
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return m_impl->m_memory_interface;
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}
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PixelEngine::PixelEngineManager& System::GetPixelEngine() const
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@ -62,7 +62,7 @@ class MemoryManager;
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};
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namespace MemoryInterface
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{
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class MemoryInterfaceState;
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class MemoryInterfaceManager;
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};
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namespace PixelEngine
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{
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@ -133,7 +133,7 @@ public:
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HSP::HSPManager& GetHSP() const;
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IOS::HLE::USB::SkylanderPortal& GetSkylanderPortal() const;
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Memory::MemoryManager& GetMemory() const;
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MemoryInterface::MemoryInterfaceState& GetMemoryInterfaceState() const;
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MemoryInterface::MemoryInterfaceManager& GetMemoryInterface() const;
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PixelEngine::PixelEngineManager& GetPixelEngine() const;
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PixelShaderManager& GetPixelShaderManager() const;
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PowerPC::PowerPCState& GetPPCState() const;
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