mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-02-13 07:49:19 +01:00
x64Emitter: Adjust position of reference and pointer indicators
Matches the coding style.
This commit is contained in:
Lioncash
parent
68d6f07b5c
commit
84ed196c14
@ -76,17 +76,17 @@ enum NormalSSEOps
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};
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void XEmitter::SetCodePtr(u8 *ptr)
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void XEmitter::SetCodePtr(u8* ptr)
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{
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code = ptr;
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}
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const u8 *XEmitter::GetCodePtr() const
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const u8* XEmitter::GetCodePtr() const
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{
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return code;
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}
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u8 *XEmitter::GetWritableCodePtr()
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u8* XEmitter::GetWritableCodePtr()
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{
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return code;
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}
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@ -97,7 +97,7 @@ void XEmitter::ReserveCodeSpace(int bytes)
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*code++ = 0xCC;
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}
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const u8 *XEmitter::AlignCode4()
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const u8* XEmitter::AlignCode4()
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{
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int c = int((u64)code & 3);
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if (c)
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@ -105,7 +105,7 @@ const u8 *XEmitter::AlignCode4()
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return code;
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}
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const u8 *XEmitter::AlignCode16()
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const u8* XEmitter::AlignCode16()
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{
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int c = int((u64)code & 15);
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if (c)
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@ -113,7 +113,7 @@ const u8 *XEmitter::AlignCode16()
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return code;
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}
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const u8 *XEmitter::AlignCodePage()
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const u8* XEmitter::AlignCodePage()
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{
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int c = int((u64)code & 4095);
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if (c)
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@ -139,7 +139,7 @@ void XEmitter::WriteSIB(int scale, int index, int base)
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Write8((u8)((scale << 6) | ((index & 7) << 3) | (base & 7)));
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}
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void OpArg::WriteREX(XEmitter *emit, int opBits, int bits, int customOp) const
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void OpArg::WriteREX(XEmitter* emit, int opBits, int bits, int customOp) const
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{
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if (customOp == -1) customOp = operandReg;
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u8 op = 0x40;
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@ -189,7 +189,7 @@ void OpArg::WriteVEX(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp
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}
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}
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void OpArg::WriteRest(XEmitter *emit, int extraBytes, X64Reg _operandReg,
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void OpArg::WriteRest(XEmitter* emit, int extraBytes, X64Reg _operandReg,
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bool warn_64bit_offset) const
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{
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if (_operandReg == INVALID_REG)
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@ -335,7 +335,7 @@ void XEmitter::Rex(int w, int r, int x, int b)
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Write8(rx);
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}
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void XEmitter::JMP(const u8 *addr, bool force5Bytes)
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void XEmitter::JMP(const u8* addr, bool force5Bytes)
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{
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u64 fn = (u64)addr;
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if (!force5Bytes)
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@ -359,7 +359,7 @@ void XEmitter::JMP(const u8 *addr, bool force5Bytes)
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}
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}
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void XEmitter::JMPptr(const OpArg &arg2)
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void XEmitter::JMPptr(const OpArg& arg2)
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{
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OpArg arg = arg2;
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if (arg.IsImm()) _assert_msg_(DYNA_REC, 0, "JMPptr - Imm argument");
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@ -386,7 +386,7 @@ void XEmitter::CALLptr(OpArg arg)
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arg.WriteRest(this);
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}
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void XEmitter::CALL(const void *fnptr)
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void XEmitter::CALL(const void* fnptr)
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{
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u64 distance = u64(fnptr) - (u64(code) + 5);
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_assert_msg_(DYNA_REC,
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@ -457,7 +457,7 @@ void XEmitter::J_CC(CCFlags conditionCode, const u8* addr)
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}
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}
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void XEmitter::SetJumpTarget(const FixupBranch &branch)
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void XEmitter::SetJumpTarget(const FixupBranch& branch)
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{
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if (branch.type == 0)
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{
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@ -628,7 +628,7 @@ void XEmitter::CBW(int bits)
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void XEmitter::PUSH(X64Reg reg) {WriteSimple1Byte(32, 0x50, reg);}
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void XEmitter::POP(X64Reg reg) {WriteSimple1Byte(32, 0x58, reg);}
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void XEmitter::PUSH(int bits, const OpArg ®)
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void XEmitter::PUSH(int bits, const OpArg& reg)
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{
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if (reg.IsSimpleReg())
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PUSH(reg.GetSimpleReg());
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@ -664,7 +664,7 @@ void XEmitter::PUSH(int bits, const OpArg ®)
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}
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}
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void XEmitter::POP(int /*bits*/, const OpArg ®)
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void XEmitter::POP(int /*bits*/, const OpArg& reg)
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{
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if (reg.IsSimpleReg())
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POP(reg.GetSimpleReg());
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@ -925,7 +925,7 @@ void XEmitter::LEA(int bits, X64Reg dest, OpArg src)
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}
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//shift can be either imm8 or cl
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void XEmitter::WriteShift(int bits, OpArg dest, OpArg &shift, int ext)
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void XEmitter::WriteShift(int bits, OpArg dest, OpArg& shift, int ext)
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{
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CheckFlags();
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bool writeImm = false;
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@ -975,7 +975,7 @@ void XEmitter::SHR(int bits, OpArg dest, OpArg shift) {WriteShift(bits, dest, sh
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void XEmitter::SAR(int bits, OpArg dest, OpArg shift) {WriteShift(bits, dest, shift, 7);}
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// index can be either imm8 or register, don't use memory destination because it's slow
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void XEmitter::WriteBitTest(int bits, OpArg &dest, OpArg &index, int ext)
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void XEmitter::WriteBitTest(int bits, OpArg& dest, OpArg& index, int ext)
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{
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CheckFlags();
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if (dest.IsImm())
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@ -1074,7 +1074,7 @@ void XEmitter::SHLD(int bits, OpArg dest, OpArg src, OpArg shift)
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}
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}
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void OpArg::WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg _operandReg, int bits)
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void OpArg::WriteSingleByteOp(XEmitter* emit, u8 op, X64Reg _operandReg, int bits)
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{
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if (bits == 16)
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emit->Write8(0x66);
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@ -1086,7 +1086,7 @@ void OpArg::WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg _operandReg, int bit
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}
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//operand can either be immediate or register
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void OpArg::WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const
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void OpArg::WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& operand, int bits) const
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{
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X64Reg _operandReg;
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if (IsImm())
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@ -1232,7 +1232,7 @@ void OpArg::WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &o
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}
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}
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void XEmitter::WriteNormalOp(int bits, NormalOp op, const OpArg &a1, const OpArg &a2)
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void XEmitter::WriteNormalOp(int bits, NormalOp op, const OpArg& a1, const OpArg& a2)
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{
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if (a1.IsImm())
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{
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@ -1258,23 +1258,23 @@ void XEmitter::WriteNormalOp(int bits, NormalOp op, const OpArg &a1, const OpArg
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}
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}
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void XEmitter::ADD (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmADD, a1, a2);}
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void XEmitter::ADC (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmADC, a1, a2);}
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void XEmitter::SUB (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmSUB, a1, a2);}
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void XEmitter::SBB (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmSBB, a1, a2);}
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void XEmitter::AND (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmAND, a1, a2);}
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void XEmitter::OR (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmOR , a1, a2);}
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void XEmitter::XOR (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmXOR, a1, a2);}
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void XEmitter::MOV (int bits, const OpArg &a1, const OpArg &a2)
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void XEmitter::ADD (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmADD, a1, a2);}
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void XEmitter::ADC (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmADC, a1, a2);}
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void XEmitter::SUB (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmSUB, a1, a2);}
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void XEmitter::SBB (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmSBB, a1, a2);}
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void XEmitter::AND (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmAND, a1, a2);}
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void XEmitter::OR (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmOR , a1, a2);}
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void XEmitter::XOR (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmXOR, a1, a2);}
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void XEmitter::MOV (int bits, const OpArg& a1, const OpArg& a2)
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{
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if (a1.IsSimpleReg() && a2.IsSimpleReg() && a1.GetSimpleReg() == a2.GetSimpleReg())
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ERROR_LOG(DYNA_REC, "Redundant MOV @ %p - bug in JIT?", code);
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WriteNormalOp(bits, nrmMOV, a1, a2);
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}
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void XEmitter::TEST(int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmTEST, a1, a2);}
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void XEmitter::CMP (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmCMP, a1, a2);}
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void XEmitter::XCHG(int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(bits, nrmXCHG, a1, a2);}
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void XEmitter::CMP_or_TEST(int bits, const OpArg &a1, const OpArg &a2)
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void XEmitter::TEST(int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmTEST, a1, a2);}
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void XEmitter::CMP (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmCMP, a1, a2);}
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void XEmitter::XCHG(int bits, const OpArg& a1, const OpArg& a2) {WriteNormalOp(bits, nrmXCHG, a1, a2);}
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void XEmitter::CMP_or_TEST(int bits, const OpArg& a1, const OpArg& a2)
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{
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CheckFlags();
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if (a1.IsSimpleReg() && a2.IsImm() && a2.offset == 0) // turn 'CMP reg, 0' into shorter 'TEST reg, reg'
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@ -1460,8 +1460,8 @@ void XEmitter::WriteBMI2Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg
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WriteBMIOp(size, opPrefix, op, regOp1, regOp2, arg, extrabytes);
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}
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void XEmitter::MOVD_xmm(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x6E, dest, arg, 0);}
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void XEmitter::MOVD_xmm(const OpArg &arg, X64Reg src) {WriteSSEOp(0x66, 0x7E, src, arg, 0);}
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void XEmitter::MOVD_xmm(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x6E, dest, arg, 0);}
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void XEmitter::MOVD_xmm(const OpArg& arg, X64Reg src) {WriteSSEOp(0x66, 0x7E, src, arg, 0);}
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void XEmitter::MOVQ_xmm(X64Reg dest, OpArg arg)
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{
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@ -1658,10 +1658,10 @@ void XEmitter::PACKSSDW(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x6B, dest, ar
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void XEmitter::PACKSSWB(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x63, dest, arg);}
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void XEmitter::PACKUSWB(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x67, dest, arg);}
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void XEmitter::PUNPCKLBW(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x60, dest, arg);}
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void XEmitter::PUNPCKLWD(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x61, dest, arg);}
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void XEmitter::PUNPCKLDQ(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x62, dest, arg);}
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void XEmitter::PUNPCKLQDQ(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x6C, dest, arg);}
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void XEmitter::PUNPCKLBW(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x60, dest, arg);}
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void XEmitter::PUNPCKLWD(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x61, dest, arg);}
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void XEmitter::PUNPCKLDQ(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x62, dest, arg);}
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void XEmitter::PUNPCKLQDQ(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x6C, dest, arg);}
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void XEmitter::PSRLW(X64Reg reg, int shift)
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{
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@ -145,11 +145,11 @@ struct OpArg
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return operandReg == b.operandReg && scale == b.scale && offsetOrBaseReg == b.offsetOrBaseReg &&
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indexReg == b.indexReg && offset == b.offset;
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}
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void WriteREX(XEmitter *emit, int opBits, int bits, int customOp = -1) const;
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void WriteREX(XEmitter* emit, int opBits, int bits, int customOp = -1) const;
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void WriteVEX(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const;
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void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
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void WriteFloatModRM(XEmitter *emit, FloatOp op);
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void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits);
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void WriteRest(XEmitter* emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
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void WriteFloatModRM(XEmitter* emit, FloatOp op);
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void WriteSingleByteOp(XEmitter* emit, u8 op, X64Reg operandReg, int bits);
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u64 Imm64() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM64); return (u64)offset; }
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u32 Imm32() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM32); return (u32)offset; }
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@ -161,7 +161,7 @@ struct OpArg
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s16 SImm16() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM16); return (s16)offset; }
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s8 SImm8() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM8); return (s8)offset; }
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void WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const;
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void WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& operand, int bits) const;
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bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;}
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bool IsSimpleReg() const {return scale == SCALE_NONE;}
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bool IsSimpleReg(X64Reg reg) const
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@ -171,7 +171,7 @@ struct OpArg
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return GetSimpleReg() == reg;
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}
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bool CanDoOpWith(const OpArg &other) const
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bool CanDoOpWith(const OpArg& other) const
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{
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if (IsSimpleReg()) return true;
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if (!IsSimpleReg() && !other.IsSimpleReg() && !other.IsImm()) return false;
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@ -214,7 +214,7 @@ private:
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};
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template <typename T>
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inline OpArg M(const T *ptr) {return OpArg((u64)(const void *)ptr, (int)SCALE_RIP);}
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inline OpArg M(const T* ptr) {return OpArg((u64)(const void*)ptr, (int)SCALE_RIP);}
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inline OpArg R(X64Reg value) {return OpArg(0, SCALE_NONE, value);}
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inline OpArg MatR(X64Reg value) {return OpArg(0, SCALE_ATREG, value);}
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@ -275,7 +275,7 @@ inline u32 PtrOffset(const void* ptr, const void* base)
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struct FixupBranch
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{
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u8 *ptr;
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u8* ptr;
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int type; //0 = 8bit 1 = 32bit
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};
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@ -297,7 +297,7 @@ class XEmitter
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{
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friend struct OpArg; // for Write8 etc
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private:
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u8 *code;
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u8* code;
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bool flags_locked;
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void CheckFlags();
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@ -307,8 +307,8 @@ private:
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void WriteSimple2Byte(int bits, u8 byte1, u8 byte2, X64Reg reg);
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void WriteMulDivType(int bits, OpArg src, int ext);
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void WriteBitSearchType(int bits, X64Reg dest, OpArg src, u8 byte2, bool rep = false);
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void WriteShift(int bits, OpArg dest, OpArg &shift, int ext);
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void WriteBitTest(int bits, OpArg &dest, OpArg &index, int ext);
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void WriteShift(int bits, OpArg dest, OpArg& shift, int ext);
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void WriteBitTest(int bits, OpArg& dest, OpArg& index, int ext);
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void WriteMXCSR(OpArg arg, int ext);
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void WriteSSEOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
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void WriteSSSE3Op(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
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@ -323,7 +323,7 @@ private:
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void WriteBMI2Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes = 0);
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void WriteMOVBE(int bits, u8 op, X64Reg regOp, OpArg arg);
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void WriteFloatLoadStore(int bits, FloatOp op, FloatOp op_80b, OpArg arg);
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void WriteNormalOp(int bits, NormalOp op, const OpArg &a1, const OpArg &a2);
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void WriteNormalOp(int bits, NormalOp op, const OpArg& a1, const OpArg& a2);
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void ABI_CalculateFrameSize(BitSet32 mask, size_t rsp_alignment, size_t needed_frame_size, size_t* shadowp, size_t* subtractionp, size_t* xmm_offsetp);
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@ -335,19 +335,19 @@ protected:
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public:
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XEmitter() { code = nullptr; flags_locked = false; }
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XEmitter(u8 *code_ptr) { code = code_ptr; flags_locked = false; }
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XEmitter(u8* code_ptr) { code = code_ptr; flags_locked = false; }
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virtual ~XEmitter() {}
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void WriteModRM(int mod, int rm, int reg);
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void WriteSIB(int scale, int index, int base);
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void SetCodePtr(u8 *ptr);
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void SetCodePtr(u8* ptr);
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void ReserveCodeSpace(int bytes);
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const u8 *AlignCode4();
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const u8 *AlignCode16();
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const u8 *AlignCodePage();
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const u8 *GetCodePtr() const;
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u8 *GetWritableCodePtr();
|
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const u8* AlignCode4();
|
||||
const u8* AlignCode16();
|
||||
const u8* AlignCodePage();
|
||||
const u8* GetCodePtr() const;
|
||||
u8* GetWritableCodePtr();
|
||||
|
||||
void LockFlags() { flags_locked = true; }
|
||||
void UnlockFlags() { flags_locked = false; }
|
||||
@ -380,8 +380,8 @@ public:
|
||||
// Stack control
|
||||
void PUSH(X64Reg reg);
|
||||
void POP(X64Reg reg);
|
||||
void PUSH(int bits, const OpArg ®);
|
||||
void POP(int bits, const OpArg ®);
|
||||
void PUSH(int bits, const OpArg& reg);
|
||||
void POP(int bits, const OpArg& reg);
|
||||
void PUSHF();
|
||||
void POPF();
|
||||
|
||||
@ -391,20 +391,20 @@ public:
|
||||
void UD2();
|
||||
FixupBranch J(bool force5bytes = false);
|
||||
|
||||
void JMP(const u8 * addr, bool force5Bytes = false);
|
||||
void JMPptr(const OpArg &arg);
|
||||
void JMP(const u8* addr, bool force5Bytes = false);
|
||||
void JMPptr(const OpArg& arg);
|
||||
void JMPself(); //infinite loop!
|
||||
#ifdef CALL
|
||||
#undef CALL
|
||||
#endif
|
||||
void CALL(const void *fnptr);
|
||||
void CALL(const void* fnptr);
|
||||
void CALLptr(OpArg arg);
|
||||
|
||||
FixupBranch J_CC(CCFlags conditionCode, bool force5bytes = false);
|
||||
//void J_CC(CCFlags conditionCode, JumpTarget target);
|
||||
void J_CC(CCFlags conditionCode, const u8* addr);
|
||||
|
||||
void SetJumpTarget(const FixupBranch &branch);
|
||||
void SetJumpTarget(const FixupBranch& branch);
|
||||
|
||||
void SETcc(CCFlags flag, OpArg dest);
|
||||
// Note: CMOV brings small if any benefit on current CPUs.
|
||||
@ -473,24 +473,24 @@ public:
|
||||
|
||||
// Integer arithmetic
|
||||
void NEG (int bits, OpArg src);
|
||||
void ADD (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void ADC (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void SUB (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void SBB (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void AND (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void CMP (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void ADD (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void ADC (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void SUB (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void SBB (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void AND (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void CMP (int bits, const OpArg& a1, const OpArg& a2);
|
||||
|
||||
// Bit operations
|
||||
void NOT (int bits, OpArg src);
|
||||
void OR (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void XOR (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void MOV (int bits, const OpArg &a1, const OpArg &a2);
|
||||
void TEST(int bits, const OpArg &a1, const OpArg &a2);
|
||||
void OR (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void XOR (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void MOV (int bits, const OpArg& a1, const OpArg& a2);
|
||||
void TEST(int bits, const OpArg& a1, const OpArg& a2);
|
||||
|
||||
void CMP_or_TEST(int bits, const OpArg &a1, const OpArg &a2);
|
||||
void CMP_or_TEST(int bits, const OpArg& a1, const OpArg& a2);
|
||||
|
||||
// Are these useful at all? Consider removing.
|
||||
void XCHG(int bits, const OpArg &a1, const OpArg &a2);
|
||||
void XCHG(int bits, const OpArg& a1, const OpArg& a2);
|
||||
void XCHG_AHAL();
|
||||
|
||||
// Byte swapping (32 and 64-bit only).
|
||||
@ -661,9 +661,9 @@ public:
|
||||
// one is the xmm reg.
|
||||
// ie: "MOVD_xmm(eax, R(xmm1))" generates incorrect code (movd xmm0, rcx)
|
||||
// use "MOVD_xmm(R(eax), xmm1)" instead.
|
||||
void MOVD_xmm(X64Reg dest, const OpArg &arg);
|
||||
void MOVD_xmm(X64Reg dest, const OpArg& arg);
|
||||
void MOVQ_xmm(X64Reg dest, OpArg arg);
|
||||
void MOVD_xmm(const OpArg &arg, X64Reg src);
|
||||
void MOVD_xmm(const OpArg& arg, X64Reg src);
|
||||
void MOVQ_xmm(OpArg arg, X64Reg src);
|
||||
|
||||
// SSE/SSE2: Generates a mask from the high bits of the components of the packed register in question.
|
||||
@ -701,10 +701,10 @@ public:
|
||||
void PACKUSDW(X64Reg dest, OpArg arg);
|
||||
void PACKUSWB(X64Reg dest, OpArg arg);
|
||||
|
||||
void PUNPCKLBW(X64Reg dest, const OpArg &arg);
|
||||
void PUNPCKLWD(X64Reg dest, const OpArg &arg);
|
||||
void PUNPCKLDQ(X64Reg dest, const OpArg &arg);
|
||||
void PUNPCKLQDQ(X64Reg dest, const OpArg &arg);
|
||||
void PUNPCKLBW(X64Reg dest, const OpArg& arg);
|
||||
void PUNPCKLWD(X64Reg dest, const OpArg& arg);
|
||||
void PUNPCKLDQ(X64Reg dest, const OpArg& arg);
|
||||
void PUNPCKLQDQ(X64Reg dest, const OpArg& arg);
|
||||
|
||||
void PTEST(X64Reg dest, OpArg arg);
|
||||
void PAND(X64Reg dest, OpArg arg);
|
||||
@ -908,27 +908,27 @@ public:
|
||||
// Utility functions
|
||||
// The difference between this and CALL is that this aligns the stack
|
||||
// where appropriate.
|
||||
void ABI_CallFunction(const void *func);
|
||||
void ABI_CallFunction(const void* func);
|
||||
|
||||
void ABI_CallFunctionC16(const void *func, u16 param1);
|
||||
void ABI_CallFunctionCC16(const void *func, u32 param1, u16 param2);
|
||||
void ABI_CallFunctionC16(const void* func, u16 param1);
|
||||
void ABI_CallFunctionCC16(const void* func, u32 param1, u16 param2);
|
||||
|
||||
// These only support u32 parameters, but that's enough for a lot of uses.
|
||||
// These will destroy the 1 or 2 first "parameter regs".
|
||||
void ABI_CallFunctionC(const void *func, u32 param1);
|
||||
void ABI_CallFunctionCC(const void *func, u32 param1, u32 param2);
|
||||
void ABI_CallFunctionCP(const void *func, u32 param1, void *param2);
|
||||
void ABI_CallFunctionCCC(const void *func, u32 param1, u32 param2, u32 param3);
|
||||
void ABI_CallFunctionCCP(const void *func, u32 param1, u32 param2, void *param3);
|
||||
void ABI_CallFunctionCCCP(const void *func, u32 param1, u32 param2,u32 param3, void *param4);
|
||||
void ABI_CallFunctionPC(const void *func, void *param1, u32 param2);
|
||||
void ABI_CallFunctionPPC(const void *func, void *param1, void *param2, u32 param3);
|
||||
void ABI_CallFunctionAC(int bits, const void *func, const OpArg &arg1, u32 param2);
|
||||
void ABI_CallFunctionA(int bits, const void *func, const OpArg &arg1);
|
||||
void ABI_CallFunctionC(const void* func, u32 param1);
|
||||
void ABI_CallFunctionCC(const void* func, u32 param1, u32 param2);
|
||||
void ABI_CallFunctionCP(const void* func, u32 param1, void* param2);
|
||||
void ABI_CallFunctionCCC(const void* func, u32 param1, u32 param2, u32 param3);
|
||||
void ABI_CallFunctionCCP(const void* func, u32 param1, u32 param2, void* param3);
|
||||
void ABI_CallFunctionCCCP(const void* func, u32 param1, u32 param2,u32 param3, void* param4);
|
||||
void ABI_CallFunctionPC(const void* func, void* param1, u32 param2);
|
||||
void ABI_CallFunctionPPC(const void* func, void* param1, void* param2, u32 param3);
|
||||
void ABI_CallFunctionAC(int bits, const void* func, const OpArg& arg1, u32 param2);
|
||||
void ABI_CallFunctionA(int bits, const void* func, const OpArg& arg1);
|
||||
|
||||
// Pass a register as a parameter.
|
||||
void ABI_CallFunctionR(const void *func, X64Reg reg1);
|
||||
void ABI_CallFunctionRR(const void *func, X64Reg reg1, X64Reg reg2);
|
||||
void ABI_CallFunctionR(const void* func, X64Reg reg1);
|
||||
void ABI_CallFunctionRR(const void* func, X64Reg reg1, X64Reg reg2);
|
||||
|
||||
// Helper method for the above, or can be used separately.
|
||||
void MOVTwo(int bits, Gen::X64Reg dst1, Gen::X64Reg src1, s32 offset, Gen::X64Reg dst2, Gen::X64Reg src2);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user