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Jit64: Recompile asm routines on cache clear
This is needed so that the checks added in the previous commit will be reevaluated if the value of m_enable_dcache changes. JitArm64 was already recompiling its asm routines on cache clear by necessity. It doesn't have the same setup as Jit64 where the asm routines are in a separate region, so clearing the JitArm64 cache results in the asm routines being cleared too.
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@ -82,9 +82,14 @@ public:
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}
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bool IsInSpace(const u8* ptr) const { return ptr >= region && ptr < (region + region_size); }
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// Cannot currently be undone. Will write protect the entire code region.
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// Start over if you need to change the code (call FreeCodeSpace(), AllocCodeSpace()).
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void WriteProtect() { Common::WriteProtectMemory(region, region_size, true); }
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void WriteProtect(bool allow_execute)
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{
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Common::WriteProtectMemory(region, region_size, allow_execute);
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}
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void UnWriteProtect(bool allow_execute)
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{
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Common::UnWriteProtectMemory(region, region_size, allow_execute);
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}
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void ResetCodePtr() { T::SetCodePtr(region, region + region_size); }
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size_t GetSpaceLeft() const
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{
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@ -305,6 +305,7 @@ void Jit64::ClearCache()
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ClearCodeSpace();
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Clear();
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RefreshConfig(InitFastmemArena::No);
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asm_routines.Regenerate();
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ResetFreeMemoryRanges();
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}
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@ -32,7 +32,15 @@ void Jit64AsmRoutineManager::Init()
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{
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m_const_pool.Init(AllocChildCodeSpace(4096), 4096);
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Generate();
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WriteProtect();
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WriteProtect(true);
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}
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void Jit64AsmRoutineManager::Regenerate()
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{
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UnWriteProtect(false);
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ResetCodePtr();
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Generate();
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WriteProtect(true);
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}
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// PLAN: no more block numbers - crazy opcodes just contain offset within
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@ -35,6 +35,7 @@ public:
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explicit Jit64AsmRoutineManager(Jit64& jit);
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void Init();
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void Regenerate();
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void ResetStack(Gen::X64CodeBlock& emitter);
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@ -56,7 +56,7 @@ VertexLoaderARM64::VertexLoaderARM64(const TVtxDesc& vtx_desc, const VAT& vtx_at
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const Common::ScopedJITPageWriteAndNoExecute enable_jit_page_writes;
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ClearCodeSpace();
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GenerateVertexLoader();
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WriteProtect();
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WriteProtect(true);
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}
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// Returns the register to use as the base and an offset from that register.
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@ -49,7 +49,7 @@ VertexLoaderX64::VertexLoaderX64(const TVtxDesc& vtx_desc, const VAT& vtx_att)
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AllocCodeSpace(4096);
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ClearCodeSpace();
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GenerateVertexLoader();
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WriteProtect();
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WriteProtect(true);
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Common::JitRegister::Register(region, GetCodePtr(), "VertexLoaderX64\nVtx desc: \n{}\nVAT:\n{}",
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vtx_desc, vtx_att);
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