From 8b4f16a310334911480a3ef1ae444d8794b426f3 Mon Sep 17 00:00:00 2001 From: JosJuice Date: Fri, 7 Aug 2020 22:44:04 +0200 Subject: [PATCH] JitArm64: Avoid double rounding in fctiwzx FCVT doesn't necessarily round to zero, so the result might be inaccurate if we use it. To ensure correct rounding, we use FCVTS from double FPR to 32-bit GPR. Unfortunately, FCVTS can't do double FPR to single FPR. --- .../Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp index 5aa776c506..9d75268042 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp @@ -339,8 +339,12 @@ void JitArm64::fctiwzx(UGeckoInstruction inst) } else { - m_float_emit.FCVT(32, 64, EncodeRegToDouble(VD), EncodeRegToDouble(VB)); - m_float_emit.FCVTS(EncodeRegToSingle(VD), EncodeRegToSingle(VD), ROUND_Z); + ARM64Reg V1 = gpr.GetReg(); + + m_float_emit.FCVTS(V1, EncodeRegToDouble(VB), ROUND_Z); + m_float_emit.FMOV(EncodeRegToSingle(VD), V1); + + gpr.Unlock(V1); } m_float_emit.ORR(EncodeRegToDouble(VD), EncodeRegToDouble(VD), EncodeRegToDouble(V0)); fpr.Unlock(V0);