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Merge pull request #6197 from degasus/GP
Jit: Optimize gather pipe usage.
This commit is contained in:
commit
9178a6e636
@ -13,6 +13,7 @@
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#include "Core/HW/Memmap.h"
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#include "Core/HW/Memmap.h"
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#include "Core/HW/ProcessorInterface.h"
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#include "Core/HW/ProcessorInterface.h"
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#include "Core/PowerPC/JitInterface.h"
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#include "Core/PowerPC/JitInterface.h"
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#include "Core/PowerPC/PowerPC.h"
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#include "VideoCommon/CommandProcessor.h"
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#include "VideoCommon/CommandProcessor.h"
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namespace GPFifo
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namespace GPFifo
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@ -31,17 +32,14 @@ namespace GPFifo
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// More room for the fastmodes
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// More room for the fastmodes
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alignas(32) static u8 s_gather_pipe[GATHER_PIPE_SIZE * 16];
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alignas(32) static u8 s_gather_pipe[GATHER_PIPE_SIZE * 16];
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// pipe pointer
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u8* g_gather_pipe_ptr = s_gather_pipe;
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static size_t GetGatherPipeCount()
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static size_t GetGatherPipeCount()
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{
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{
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return g_gather_pipe_ptr - s_gather_pipe;
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return PowerPC::ppcState.gather_pipe_ptr - s_gather_pipe;
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}
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}
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static void SetGatherPipeCount(size_t size)
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static void SetGatherPipeCount(size_t size)
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{
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{
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g_gather_pipe_ptr = s_gather_pipe + size;
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PowerPC::ppcState.gather_pipe_ptr = s_gather_pipe + size;
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}
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}
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void DoState(PointerWrap& p)
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void DoState(PointerWrap& p)
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@ -55,6 +53,7 @@ void DoState(PointerWrap& p)
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void Init()
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void Init()
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{
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{
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ResetGatherPipe();
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ResetGatherPipe();
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PowerPC::ppcState.gather_pipe_base_ptr = s_gather_pipe;
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memset(s_gather_pipe, 0, sizeof(s_gather_pipe));
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memset(s_gather_pipe, 0, sizeof(s_gather_pipe));
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}
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}
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@ -68,7 +67,7 @@ void ResetGatherPipe()
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SetGatherPipeCount(0);
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SetGatherPipeCount(0);
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}
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}
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static void UpdateGatherPipe()
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void UpdateGatherPipe()
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{
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{
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size_t pipe_count = GetGatherPipeCount();
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size_t pipe_count = GetGatherPipeCount();
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size_t processed;
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size_t processed;
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@ -144,29 +143,29 @@ void Write64(const u64 value)
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void FastWrite8(const u8 value)
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void FastWrite8(const u8 value)
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{
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{
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*g_gather_pipe_ptr = value;
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*PowerPC::ppcState.gather_pipe_ptr = value;
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g_gather_pipe_ptr += sizeof(u8);
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PowerPC::ppcState.gather_pipe_ptr += sizeof(u8);
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}
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}
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void FastWrite16(u16 value)
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void FastWrite16(u16 value)
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{
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{
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value = Common::swap16(value);
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value = Common::swap16(value);
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std::memcpy(g_gather_pipe_ptr, &value, sizeof(u16));
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std::memcpy(PowerPC::ppcState.gather_pipe_ptr, &value, sizeof(u16));
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g_gather_pipe_ptr += sizeof(u16);
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PowerPC::ppcState.gather_pipe_ptr += sizeof(u16);
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}
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}
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void FastWrite32(u32 value)
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void FastWrite32(u32 value)
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{
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{
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value = Common::swap32(value);
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value = Common::swap32(value);
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std::memcpy(g_gather_pipe_ptr, &value, sizeof(u32));
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std::memcpy(PowerPC::ppcState.gather_pipe_ptr, &value, sizeof(u32));
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g_gather_pipe_ptr += sizeof(u32);
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PowerPC::ppcState.gather_pipe_ptr += sizeof(u32);
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}
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}
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void FastWrite64(u64 value)
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void FastWrite64(u64 value)
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{
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{
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value = Common::swap64(value);
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value = Common::swap64(value);
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std::memcpy(g_gather_pipe_ptr, &value, sizeof(u64));
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std::memcpy(PowerPC::ppcState.gather_pipe_ptr, &value, sizeof(u64));
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g_gather_pipe_ptr += sizeof(u64);
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PowerPC::ppcState.gather_pipe_ptr += sizeof(u64);
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}
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}
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} // end of namespace GPFifo
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} // end of namespace GPFifo
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@ -15,15 +15,13 @@ enum
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GATHER_PIPE_SIZE = 32
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GATHER_PIPE_SIZE = 32
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};
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};
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// pipe pointer for JIT access
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extern u8* g_gather_pipe_ptr;
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// Init
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// Init
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void Init();
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void Init();
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void DoState(PointerWrap& p);
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void DoState(PointerWrap& p);
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// ResetGatherPipe
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// ResetGatherPipe
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void ResetGatherPipe();
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void ResetGatherPipe();
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void UpdateGatherPipe();
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void CheckGatherPipe();
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void CheckGatherPipe();
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void FastCheckGatherPipe();
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void FastCheckGatherPipe();
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@ -355,9 +355,14 @@ bool Jit64::Cleanup()
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if (jo.optimizeGatherPipe && js.fifoBytesSinceCheck > 0)
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if (jo.optimizeGatherPipe && js.fifoBytesSinceCheck > 0)
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{
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{
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MOV(64, R(RSCRATCH), PPCSTATE(gather_pipe_ptr));
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SUB(64, R(RSCRATCH), PPCSTATE(gather_pipe_base_ptr));
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CMP(64, R(RSCRATCH), Imm32(GPFifo::GATHER_PIPE_SIZE));
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FixupBranch exit = J_CC(CC_L);
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ABI_PushRegistersAndAdjustStack({}, 0);
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ABI_PushRegistersAndAdjustStack({}, 0);
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ABI_CallFunction(GPFifo::FastCheckGatherPipe);
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ABI_CallFunction(GPFifo::UpdateGatherPipe);
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ABI_PopRegistersAndAdjustStack({}, 0);
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ABI_PopRegistersAndAdjustStack({}, 0);
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SetJumpTarget(exit);
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did_something = true;
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did_something = true;
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}
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}
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@ -222,14 +222,6 @@ void Jit64AsmRoutineManager::ResetStack(X64CodeBlock& emitter)
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void Jit64AsmRoutineManager::GenerateCommon()
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void Jit64AsmRoutineManager::GenerateCommon()
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{
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{
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fifoDirectWrite8 = AlignCode4();
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GenFifoWrite(8);
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fifoDirectWrite16 = AlignCode4();
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GenFifoWrite(16);
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fifoDirectWrite32 = AlignCode4();
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GenFifoWrite(32);
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fifoDirectWrite64 = AlignCode4();
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GenFifoWrite(64);
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frsqrte = AlignCode4();
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frsqrte = AlignCode4();
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GenFrsqrte();
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GenFrsqrte();
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fres = AlignCode4();
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fres = AlignCode4();
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@ -203,28 +203,6 @@ bool EmuCodeBlock::UnsafeLoadToReg(X64Reg reg_value, OpArg opAddress, int access
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return offsetAddedToAddress;
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return offsetAddedToAddress;
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}
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}
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void EmuCodeBlock::UnsafeWriteGatherPipe(int accessSize)
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{
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// No need to protect these, they don't touch any state
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// question - should we inline them instead? Pro: Lose a CALL Con: Code bloat
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switch (accessSize)
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{
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case 8:
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CALL(g_jit->GetAsmRoutines()->fifoDirectWrite8);
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break;
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case 16:
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CALL(g_jit->GetAsmRoutines()->fifoDirectWrite16);
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break;
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case 32:
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CALL(g_jit->GetAsmRoutines()->fifoDirectWrite32);
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break;
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case 64:
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CALL(g_jit->GetAsmRoutines()->fifoDirectWrite64);
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break;
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}
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g_jit->js.fifoBytesSinceCheck += accessSize >> 3;
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}
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// Visitor that generates code to read a MMIO value.
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// Visitor that generates code to read a MMIO value.
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template <typename T>
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template <typename T>
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class MMIOReadCodeGenerator : public MMIO::ReadHandlingMethodVisitor<T>
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class MMIOReadCodeGenerator : public MMIO::ReadHandlingMethodVisitor<T>
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@ -622,10 +600,22 @@ bool EmuCodeBlock::WriteToConstAddress(int accessSize, OpArg arg, u32 address,
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// fun tricks...
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// fun tricks...
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if (g_jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(address))
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if (g_jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(address))
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{
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{
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if (!arg.IsSimpleReg(RSCRATCH))
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X64Reg arg_reg = RSCRATCH;
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MOV(accessSize, R(RSCRATCH), arg);
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UnsafeWriteGatherPipe(accessSize);
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// With movbe, we can store inplace without temporary register
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if (arg.IsSimpleReg() && cpu_info.bMOVBE)
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arg_reg = arg.GetSimpleReg();
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if (!arg.IsSimpleReg(arg_reg))
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MOV(accessSize, R(arg_reg), arg);
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// And store it in the gather pipe
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MOV(64, R(RSCRATCH2), PPCSTATE(gather_pipe_ptr));
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SwapAndStore(accessSize, MatR(RSCRATCH2), arg_reg);
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ADD(64, R(RSCRATCH2), Imm8(accessSize >> 3));
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MOV(64, PPCSTATE(gather_pipe_ptr), R(RSCRATCH2));
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g_jit->js.fifoBytesSinceCheck += accessSize >> 3;
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return false;
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return false;
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}
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}
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else if (PowerPC::IsOptimizableRAMAddress(address))
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else if (PowerPC::IsOptimizableRAMAddress(address))
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@ -61,7 +61,6 @@ public:
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bool UnsafeLoadToReg(Gen::X64Reg reg_value, Gen::OpArg opAddress, int accessSize, s32 offset,
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bool UnsafeLoadToReg(Gen::X64Reg reg_value, Gen::OpArg opAddress, int accessSize, s32 offset,
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bool signExtend, Gen::MovInfo* info = nullptr);
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bool signExtend, Gen::MovInfo* info = nullptr);
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void UnsafeWriteGatherPipe(int accessSize);
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// Generate a load/write from the MMIO handler for a given address. Only
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// Generate a load/write from the MMIO handler for a given address. Only
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// call for known addresses in MMIO range (MMIO::IsMMIOAddress).
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// call for known addresses in MMIO range (MMIO::IsMMIOAddress).
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@ -12,7 +12,6 @@
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#include "Common/MathUtil.h"
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#include "Common/MathUtil.h"
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#include "Common/x64ABI.h"
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#include "Common/x64ABI.h"
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#include "Common/x64Emitter.h"
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#include "Common/x64Emitter.h"
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#include "Core/HW/GPFifo.h"
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#include "Core/PowerPC/Gekko.h"
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#include "Core/PowerPC/Gekko.h"
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#include "Core/PowerPC/Jit64Common/Jit64Base.h"
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#include "Core/PowerPC/Jit64Common/Jit64Base.h"
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#include "Core/PowerPC/Jit64Common/Jit64PowerPCState.h"
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#include "Core/PowerPC/Jit64Common/Jit64PowerPCState.h"
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@ -25,22 +24,6 @@
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using namespace Gen;
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using namespace Gen;
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void CommonAsmRoutines::GenFifoWrite(int size)
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{
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const void* start = GetCodePtr();
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// Assume value in RSCRATCH
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MOV(64, R(RSCRATCH2), ImmPtr(&GPFifo::g_gather_pipe_ptr));
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MOV(64, R(RSCRATCH2), MatR(RSCRATCH2));
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SwapAndStore(size, MatR(RSCRATCH2), RSCRATCH);
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MOV(64, R(RSCRATCH), ImmPtr(&GPFifo::g_gather_pipe_ptr));
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ADD(64, R(RSCRATCH2), Imm8(size >> 3));
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MOV(64, MatR(RSCRATCH), R(RSCRATCH2));
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RET();
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JitRegister::Register(start, GetCodePtr(), "JIT_FifoWrite_%i", size);
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}
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void CommonAsmRoutines::GenFrsqrte()
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void CommonAsmRoutines::GenFrsqrte()
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{
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{
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const void* start = GetCodePtr();
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const void* start = GetCodePtr();
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@ -24,7 +24,6 @@ private:
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class CommonAsmRoutines : public CommonAsmRoutinesBase, public QuantizedMemoryRoutines
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class CommonAsmRoutines : public CommonAsmRoutinesBase, public QuantizedMemoryRoutines
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{
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{
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public:
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public:
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void GenFifoWrite(int size);
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void GenFrsqrte();
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void GenFrsqrte();
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void GenFres();
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void GenFres();
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void GenMfcr();
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void GenMfcr();
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@ -231,8 +231,13 @@ void JitArm64::Cleanup()
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{
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{
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if (jo.optimizeGatherPipe && js.fifoBytesSinceCheck > 0)
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if (jo.optimizeGatherPipe && js.fifoBytesSinceCheck > 0)
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{
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{
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MOVP2R(X0, &GPFifo::FastCheckGatherPipe);
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LDP(INDEX_SIGNED, X0, X1, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
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SUB(X0, X0, X1);
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CMP(X0, GPFifo::GATHER_PIPE_SIZE);
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FixupBranch exit = B(CC_LT);
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MOVP2R(X0, &GPFifo::UpdateGatherPipe);
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BLR(X0);
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BLR(X0);
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SetJumpTarget(exit);
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}
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}
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}
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}
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@ -10,7 +10,6 @@
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#include "Core/Core.h"
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#include "Core/Core.h"
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#include "Core/CoreTiming.h"
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#include "Core/CoreTiming.h"
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#include "Core/HW/DSP.h"
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#include "Core/HW/DSP.h"
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#include "Core/HW/GPFifo.h"
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#include "Core/HW/MMIO.h"
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#include "Core/HW/MMIO.h"
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#include "Core/HW/Memmap.h"
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#include "Core/HW/Memmap.h"
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#include "Core/PowerPC/JitArm64/Jit.h"
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#include "Core/PowerPC/JitArm64/Jit.h"
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@ -230,7 +229,6 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s
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|
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if (is_immediate && jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
|
if (is_immediate && jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
|
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{
|
{
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ARM64Reg WA = INVALID_REG;
|
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int accessSize;
|
int accessSize;
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if (flags & BackPatchInfo::FLAG_SIZE_32)
|
if (flags & BackPatchInfo::FLAG_SIZE_32)
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accessSize = 32;
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accessSize = 32;
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@ -239,30 +237,23 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s
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else
|
else
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accessSize = 8;
|
accessSize = 8;
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|
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if (accessSize != 8)
|
LDR(INDEX_UNSIGNED, X0, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
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WA = gpr.GetReg();
|
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|
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MOVP2R(X1, &GPFifo::g_gather_pipe_ptr);
|
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LDR(INDEX_UNSIGNED, X0, X1, 0);
|
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if (accessSize == 32)
|
if (accessSize == 32)
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{
|
{
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REV32(WA, RS);
|
REV32(W1, RS);
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STR(INDEX_POST, WA, X0, 4);
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STR(INDEX_POST, W1, X0, 4);
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}
|
}
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else if (accessSize == 16)
|
else if (accessSize == 16)
|
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{
|
{
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REV16(WA, RS);
|
REV16(W1, RS);
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STRH(INDEX_POST, WA, X0, 2);
|
STRH(INDEX_POST, W1, X0, 2);
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}
|
}
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else
|
else
|
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{
|
{
|
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STRB(INDEX_POST, RS, X0, 1);
|
STRB(INDEX_POST, RS, X0, 1);
|
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}
|
}
|
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STR(INDEX_UNSIGNED, X0, X1, 0);
|
STR(INDEX_UNSIGNED, X0, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
|
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js.fifoBytesSinceCheck += accessSize >> 3;
|
js.fifoBytesSinceCheck += accessSize >> 3;
|
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|
|
||||||
if (accessSize != 8)
|
|
||||||
gpr.Unlock(WA);
|
|
||||||
}
|
}
|
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else if (is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
|
else if (is_immediate && PowerPC::IsOptimizableRAMAddress(imm_addr))
|
||||||
{
|
{
|
||||||
|
@ -10,7 +10,6 @@
|
|||||||
|
|
||||||
#include "Core/Core.h"
|
#include "Core/Core.h"
|
||||||
#include "Core/CoreTiming.h"
|
#include "Core/CoreTiming.h"
|
||||||
#include "Core/HW/GPFifo.h"
|
|
||||||
#include "Core/PowerPC/JitArm64/Jit.h"
|
#include "Core/PowerPC/JitArm64/Jit.h"
|
||||||
#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
|
#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
|
||||||
#include "Core/PowerPC/PPCTables.h"
|
#include "Core/PowerPC/PPCTables.h"
|
||||||
@ -357,8 +356,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
|
|||||||
else
|
else
|
||||||
accessSize = 32;
|
accessSize = 32;
|
||||||
|
|
||||||
MOVP2R(X1, &GPFifo::g_gather_pipe_ptr);
|
LDR(INDEX_UNSIGNED, X0, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
|
||||||
LDR(INDEX_UNSIGNED, X0, X1, 0);
|
|
||||||
if (flags & BackPatchInfo::FLAG_SIZE_F64)
|
if (flags & BackPatchInfo::FLAG_SIZE_F64)
|
||||||
{
|
{
|
||||||
m_float_emit.REV64(8, Q0, V0);
|
m_float_emit.REV64(8, Q0, V0);
|
||||||
@ -375,7 +373,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
|
|||||||
|
|
||||||
m_float_emit.STR(accessSize, INDEX_POST, accessSize == 64 ? Q0 : D0, X0, accessSize >> 3);
|
m_float_emit.STR(accessSize, INDEX_POST, accessSize == 64 ? Q0 : D0, X0, accessSize >> 3);
|
||||||
|
|
||||||
STR(INDEX_UNSIGNED, X0, X1, 0);
|
STR(INDEX_UNSIGNED, X0, PPC_REG, PPCSTATE_OFF(gather_pipe_ptr));
|
||||||
js.fifoBytesSinceCheck += accessSize >> 3;
|
js.fifoBytesSinceCheck += accessSize >> 3;
|
||||||
|
|
||||||
if (update)
|
if (update)
|
||||||
|
@ -15,11 +15,6 @@ alignas(16) extern const float m_dequantizeTableS[128];
|
|||||||
class CommonAsmRoutinesBase
|
class CommonAsmRoutinesBase
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
const u8* fifoDirectWrite8;
|
|
||||||
const u8* fifoDirectWrite16;
|
|
||||||
const u8* fifoDirectWrite32;
|
|
||||||
const u8* fifoDirectWrite64;
|
|
||||||
|
|
||||||
const u8* enterCode;
|
const u8* enterCode;
|
||||||
|
|
||||||
const u8* dispatcherMispredictedBLR;
|
const u8* dispatcherMispredictedBLR;
|
||||||
|
@ -93,6 +93,10 @@ struct PowerPCState
|
|||||||
// lscbx
|
// lscbx
|
||||||
u16 xer_stringctrl;
|
u16 xer_stringctrl;
|
||||||
|
|
||||||
|
// gather pipe pointer for JIT access
|
||||||
|
u8* gather_pipe_ptr;
|
||||||
|
u8* gather_pipe_base_ptr;
|
||||||
|
|
||||||
#if _M_X86_64
|
#if _M_X86_64
|
||||||
// This member exists for the purpose of an assertion in x86 JitBase.cpp
|
// This member exists for the purpose of an assertion in x86 JitBase.cpp
|
||||||
// that its offset <= 0x100. To minimize code size on x86, we want as much
|
// that its offset <= 0x100. To minimize code size on x86, we want as much
|
||||||
|
Loading…
x
Reference in New Issue
Block a user