From 949fec41ca0b4e4ea06d36f8bbc22de15fa759dc Mon Sep 17 00:00:00 2001 From: nodchip Date: Sun, 1 Aug 2010 02:17:52 +0000 Subject: [PATCH] JitIL: Reverted "lbzu" added in r6018. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6023 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp | 2 +- Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp index 1cae5eaeef..fb98cd4f78 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp @@ -70,7 +70,7 @@ void JitIL::lXz(UGeckoInstruction inst) void JitIL::lbzu(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(LoadStore) - // TODO: Check whether lbzu crashes GFZP01(F-Zero GX) @ 0x8008575C or not + // FIXME: lbzu crashes GFZP01(F-Zero GX) @ 0x8008575C const IREmitter::InstLoc uAddress = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst((int)inst.SIMM_16)); const IREmitter::InstLoc temp = ibuild.EmitLoad8(uAddress); ibuild.EmitStoreGReg(temp, inst.RD); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp index a51a865d1f..8de8ae08e5 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp @@ -82,7 +82,7 @@ static GekkoOPTemplate primarytable[] = {32, &JitIL::lXz}, //"lwz", OPTYPE_LOAD, FL_OUT_D | FL_IN_A}}, {33, &JitIL::lXz}, //"lwzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}}, {34, &JitIL::lXz}, //"lbz", OPTYPE_LOAD, FL_OUT_D | FL_IN_A}}, - {35, &JitIL::lbzu}, //"lbzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}}, + {35, &JitIL::Default}, //"lbzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}}, {40, &JitIL::lXz}, //"lhz", OPTYPE_LOAD, FL_OUT_D | FL_IN_A}}, {41, &JitIL::lXz}, //"lhzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}}, {42, &JitIL::lha}, //"lha", OPTYPE_LOAD, FL_OUT_D | FL_IN_A}},