The-Homebrew-Cloud/dolphin
2
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2025-01-08 15:20:45 +01:00
Code Issues Packages Projects Releases Wiki Activity

JitArm64: Drop GetCRFieldBit's negate parameter

Browse Source 
No caller is using it anymore.
This commit is contained in:
JosJuice 2024-11-02 10:33:04 +01:00
parent 71e9766519
commit 980a726313
2 changed files with 8 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Source/Core/Core/PowerPC/JitArm64/Jit.h
View File

@ -355,7 +355,7 @@ protected:
Arm64Gen::ARM64Reg exit_address_after_return_reg = Arm64Gen::ARM64Reg::INVALID_REG); Arm64Gen::ARM64Reg exit_address_after_return_reg = Arm64Gen::ARM64Reg::INVALID_REG);
void WriteBLRExit(Arm64Gen::ARM64Reg dest); void WriteBLRExit(Arm64Gen::ARM64Reg dest);
void GetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg out, bool negate = false); void GetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg out);
void SetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg in, bool negate = false); void SetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg in, bool negate = false);
void ClearCRFieldBit(int field, int bit); void ClearCRFieldBit(int field, int bit);
void SetCRFieldBit(int field, int bit); void SetCRFieldBit(int field, int bit);

18
Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
View File

@ -20,7 +20,7 @@
using namespace Arm64Gen; using namespace Arm64Gen;
void JitArm64::GetCRFieldBit(int field, int bit, ARM64Reg out, bool negate) void JitArm64::GetCRFieldBit(int field, int bit, ARM64Reg out)
{ {
ARM64Reg CR = gpr.CR(field); ARM64Reg CR = gpr.CR(field);
ARM64Reg WCR = EncodeRegTo32(CR); ARM64Reg WCR = EncodeRegTo32(CR);
@ -29,24 +29,20 @@ void JitArm64::GetCRFieldBit(int field, int bit, ARM64Reg out, bool negate)
{ {
case PowerPC::CR_SO_BIT: // check bit 59 set case PowerPC::CR_SO_BIT: // check bit 59 set
UBFX(out, CR, PowerPC::CR_EMU_SO_BIT, 1); UBFX(out, CR, PowerPC::CR_EMU_SO_BIT, 1);
if (negate)
EOR(out, out, LogicalImm(1, GPRSize::B64));
break; break;
case PowerPC::CR_EQ_BIT: // check bits 31-0 == 0 case PowerPC::CR_EQ_BIT: // check bits 31-0 == 0
CMP(WCR, ARM64Reg::WZR); CMP(WCR, ARM64Reg::WZR);
CSET(out, negate ? CC_NEQ : CC_EQ); CSET(out, CC_EQ);
break; break;
case PowerPC::CR_GT_BIT: // check val > 0 case PowerPC::CR_GT_BIT: // check val > 0
CMP(CR, ARM64Reg::ZR); CMP(CR, ARM64Reg::ZR);
CSET(out, negate ? CC_LE : CC_GT); CSET(out, CC_GT);
break; break;
case PowerPC::CR_LT_BIT: // check bit 62 set case PowerPC::CR_LT_BIT: // check bit 62 set
UBFX(out, CR, PowerPC::CR_EMU_LT_BIT, 1); UBFX(out, CR, PowerPC::CR_EMU_LT_BIT, 1);
if (negate)
EOR(out, out, LogicalImm(1, GPRSize::B64));
break; break;
default: default:
@ -620,7 +616,7 @@ void JitArm64::crXXX(UGeckoInstruction inst)
{ {
auto WA = gpr.GetScopedReg(); auto WA = gpr.GetScopedReg();
ARM64Reg XA = EncodeRegTo64(WA); ARM64Reg XA = EncodeRegTo64(WA);
GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false); GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA);
SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA, false); SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA, false);
return; return;
} }
@ -629,7 +625,7 @@ void JitArm64::crXXX(UGeckoInstruction inst)
{ {
auto WA = gpr.GetScopedReg(); auto WA = gpr.GetScopedReg();
ARM64Reg XA = EncodeRegTo64(WA); ARM64Reg XA = EncodeRegTo64(WA);
GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false); GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA);
SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA, true); SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA, true);
return; return;
} }
@ -645,8 +641,8 @@ void JitArm64::crXXX(UGeckoInstruction inst)
auto WB = gpr.GetScopedReg(); auto WB = gpr.GetScopedReg();
ARM64Reg XB = EncodeRegTo64(WB); ARM64Reg XB = EncodeRegTo64(WB);
GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false); GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA);
GetCRFieldBit(inst.CRBB >> 2, 3 - (inst.CRBB & 3), XB, false); GetCRFieldBit(inst.CRBB >> 2, 3 - (inst.CRBB & 3), XB);
// Compute combined bit // Compute combined bit
switch (inst.SUBOP10) switch (inst.SUBOP10)