diff --git a/Source/Core/DSPCore/Src/DSPCore.cpp b/Source/Core/DSPCore/Src/DSPCore.cpp
index 1c16c8aed6..ede578de32 100644
--- a/Source/Core/DSPCore/Src/DSPCore.cpp
+++ b/Source/Core/DSPCore/Src/DSPCore.cpp
@@ -88,7 +88,7 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename,
 	LoadRom(irom_filename, DSP_IROM_SIZE, g_dsp.irom);
 	LoadRom(coef_filename, DSP_COEF_SIZE, g_dsp.coef);
 
-	memset(&g_dsp._r,0,sizeof(g_dsp._r));
+	memset(&g_dsp.r,0,sizeof(g_dsp.r));
 
 	for (int i = 0; i < 4; i++)
 	{
@@ -113,13 +113,13 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename,
 
 	// Copied from a real console after the custom UCode has been loaded.
 	// These are the indexing wrapping registers.
-	g_dsp._r.wr[0] = 0xffff;
-	g_dsp._r.wr[1] = 0xffff;
-	g_dsp._r.wr[2] = 0xffff;
-	g_dsp._r.wr[3] = 0xffff;
+	g_dsp.r.wr[0] = 0xffff;
+	g_dsp.r.wr[1] = 0xffff;
+	g_dsp.r.wr[2] = 0xffff;
+	g_dsp.r.wr[3] = 0xffff;
 
-	g_dsp._r.sr |= SR_INT_ENABLE;
-	g_dsp._r.sr |= SR_EXT_INT_ENABLE;
+	g_dsp.r.sr |= SR_INT_ENABLE;
+	g_dsp.r.sr |= SR_EXT_INT_ENABLE;
 
 	g_dsp.cr = 0x804;
 	gdsp_ifx_init();
@@ -159,10 +159,10 @@ void DSPCore_Reset()
 {
     g_dsp.pc = DSP_RESET_VECTOR;
 
-	g_dsp._r.wr[0] = 0xffff;
-	g_dsp._r.wr[1] = 0xffff;
-	g_dsp._r.wr[2] = 0xffff;
-	g_dsp._r.wr[3] = 0xffff;
+	g_dsp.r.wr[0] = 0xffff;
+	g_dsp.r.wr[1] = 0xffff;
+	g_dsp.r.wr[2] = 0xffff;
+	g_dsp.r.wr[3] = 0xffff;
 	
 }
 
@@ -201,14 +201,14 @@ void DSPCore_CheckExceptions()
 
 				// store pc and sr until RTI
 				dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
-				dsp_reg_store_stack(DSP_STACK_D, g_dsp._r.sr);
+				dsp_reg_store_stack(DSP_STACK_D, g_dsp.r.sr);
 
 				g_dsp.pc = i * 2;
 				g_dsp.exceptions &= ~(1 << i);
 				if (i == 7)
-					g_dsp._r.sr &= ~SR_EXT_INT_ENABLE;
+					g_dsp.r.sr &= ~SR_EXT_INT_ENABLE;
 				else
-					g_dsp._r.sr &= ~SR_INT_ENABLE;
+					g_dsp.r.sr &= ~SR_INT_ENABLE;
 				break;
 			} else {
 #if defined(_DEBUG) || defined(DEBUGFAST)
@@ -299,43 +299,43 @@ u16 DSPCore_ReadRegister(int reg) {
 	case DSP_REG_AR1:
 	case DSP_REG_AR2:
 	case DSP_REG_AR3:
-		return g_dsp._r.ar[reg - DSP_REG_AR0];
+		return g_dsp.r.ar[reg - DSP_REG_AR0];
 	case DSP_REG_IX0:
 	case DSP_REG_IX1:
 	case DSP_REG_IX2:
 	case DSP_REG_IX3:
-		return g_dsp._r.ix[reg - DSP_REG_IX0];
+		return g_dsp.r.ix[reg - DSP_REG_IX0];
 	case DSP_REG_WR0:
 	case DSP_REG_WR1:
 	case DSP_REG_WR2:
 	case DSP_REG_WR3:
-		return g_dsp._r.wr[reg - DSP_REG_WR0];
+		return g_dsp.r.wr[reg - DSP_REG_WR0];
 	case DSP_REG_ST0:
 	case DSP_REG_ST1:
 	case DSP_REG_ST2:
 	case DSP_REG_ST3:
-		return g_dsp._r.st[reg - DSP_REG_ST0];
+		return g_dsp.r.st[reg - DSP_REG_ST0];
 	case DSP_REG_ACH0:
 	case DSP_REG_ACH1:
-		return g_dsp._r.ac[reg - DSP_REG_ACH0].h;
-	case DSP_REG_CR:     return g_dsp._r.cr;
-	case DSP_REG_SR:     return g_dsp._r.sr;
-	case DSP_REG_PRODL:  return g_dsp._r.prod.l;
-	case DSP_REG_PRODM:  return g_dsp._r.prod.m;
-	case DSP_REG_PRODH:  return g_dsp._r.prod.h;
-	case DSP_REG_PRODM2: return g_dsp._r.prod.m2;
+		return g_dsp.r.ac[reg - DSP_REG_ACH0].h;
+	case DSP_REG_CR:     return g_dsp.r.cr;
+	case DSP_REG_SR:     return g_dsp.r.sr;
+	case DSP_REG_PRODL:  return g_dsp.r.prod.l;
+	case DSP_REG_PRODM:  return g_dsp.r.prod.m;
+	case DSP_REG_PRODH:  return g_dsp.r.prod.h;
+	case DSP_REG_PRODM2: return g_dsp.r.prod.m2;
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		return g_dsp._r.ax[reg - DSP_REG_AXL0].l;
+		return g_dsp.r.ax[reg - DSP_REG_AXL0].l;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		return g_dsp._r.ax[reg - DSP_REG_AXH0].h;
+		return g_dsp.r.ax[reg - DSP_REG_AXH0].h;
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		return g_dsp._r.ac[reg - DSP_REG_ACL0].l;
+		return g_dsp.r.ac[reg - DSP_REG_ACL0].l;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		return g_dsp._r.ac[reg - DSP_REG_ACM0].m;
+		return g_dsp.r.ac[reg - DSP_REG_ACM0].m;
 	default:
 		_assert_msg_(DSP_CORE, 0, "cannot happen");
 		return 0;
@@ -348,51 +348,51 @@ void DSPCore_WriteRegister(int reg, u16 val) {
 	case DSP_REG_AR1:
 	case DSP_REG_AR2:
 	case DSP_REG_AR3:
-		g_dsp._r.ar[reg - DSP_REG_AR0] = val;
+		g_dsp.r.ar[reg - DSP_REG_AR0] = val;
 		break;
 	case DSP_REG_IX0:
 	case DSP_REG_IX1:
 	case DSP_REG_IX2:
 	case DSP_REG_IX3:
-		g_dsp._r.ix[reg - DSP_REG_IX0] = val;
+		g_dsp.r.ix[reg - DSP_REG_IX0] = val;
 		break;
 	case DSP_REG_WR0:
 	case DSP_REG_WR1:
 	case DSP_REG_WR2:
 	case DSP_REG_WR3:
-		g_dsp._r.wr[reg - DSP_REG_WR0] = val;
+		g_dsp.r.wr[reg - DSP_REG_WR0] = val;
 		break;
 	case DSP_REG_ST0:
 	case DSP_REG_ST1:
 	case DSP_REG_ST2:
 	case DSP_REG_ST3:
-		g_dsp._r.st[reg - DSP_REG_ST0] = val;
+		g_dsp.r.st[reg - DSP_REG_ST0] = val;
 		break;
 	case DSP_REG_ACH0:
 	case DSP_REG_ACH1:
-		g_dsp._r.ac[reg - DSP_REG_ACH0].h = val;
+		g_dsp.r.ac[reg - DSP_REG_ACH0].h = val;
 		break;
-	case DSP_REG_CR:     g_dsp._r.cr = val; break;
-	case DSP_REG_SR:     g_dsp._r.sr = val; break;
-	case DSP_REG_PRODL:  g_dsp._r.prod.l = val; break;
-	case DSP_REG_PRODM:  g_dsp._r.prod.m = val; break;
-	case DSP_REG_PRODH:  g_dsp._r.prod.h = val; break;
-	case DSP_REG_PRODM2: g_dsp._r.prod.m2 = val; break;
+	case DSP_REG_CR:     g_dsp.r.cr = val; break;
+	case DSP_REG_SR:     g_dsp.r.sr = val; break;
+	case DSP_REG_PRODL:  g_dsp.r.prod.l = val; break;
+	case DSP_REG_PRODM:  g_dsp.r.prod.m = val; break;
+	case DSP_REG_PRODH:  g_dsp.r.prod.h = val; break;
+	case DSP_REG_PRODM2: g_dsp.r.prod.m2 = val; break;
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		g_dsp._r.ax[reg - DSP_REG_AXL0].l = val;
+		g_dsp.r.ax[reg - DSP_REG_AXL0].l = val;
 		break;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		g_dsp._r.ax[reg - DSP_REG_AXH0].h = val;
+		g_dsp.r.ax[reg - DSP_REG_AXH0].h = val;
 		break;
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		g_dsp._r.ac[reg - DSP_REG_ACL0].l = val;
+		g_dsp.r.ac[reg - DSP_REG_ACL0].l = val;
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		g_dsp._r.ac[reg - DSP_REG_ACM0].m = val;
+		g_dsp.r.ac[reg - DSP_REG_ACM0].m = val;
 		break;
 	}
 }
diff --git a/Source/Core/DSPCore/Src/DSPCore.h b/Source/Core/DSPCore/Src/DSPCore.h
index 6d25c191bb..eb35616d4a 100644
--- a/Source/Core/DSPCore/Src/DSPCore.h
+++ b/Source/Core/DSPCore/Src/DSPCore.h
@@ -217,7 +217,7 @@ typedef struct {
 // should be moved here.
 struct SDSP
 {
-	DSP_Regs _r;
+	DSP_Regs r;
 	u16 pc;
 #if PROFILE
 	u16 err_pc;
diff --git a/Source/Core/DSPCore/Src/DSPEmitter.cpp b/Source/Core/DSPCore/Src/DSPEmitter.cpp
index 743449118e..cd112d3e4b 100644
--- a/Source/Core/DSPCore/Src/DSPEmitter.cpp
+++ b/Source/Core/DSPCore/Src/DSPEmitter.cpp
@@ -34,35 +34,6 @@ const u8 *stubEntryPoint;
 u16 blocksCompiled;
 u16 unresolvedCalls;
 
-static bool checkExtendedExclude(UDSPInstruction inst)
-{
-	const DSPOPCTemplate *tinst = GetOpTemplate(inst);
-
-	// Call extended
-	if (!tinst->extended)
-		return false;
-	if ((inst >> 12) != 0x3)
-		return false;
-	/*
-	if((inst & 0x00ff) == 0x00c0) {
-	fprintf(stderr,"blocking %04x\n", inst);
-	return true;
-	}
-	*/
-	return false;
-}
-
-static bool checkMainExclude(UDSPInstruction inst)
-{
-	/*
-	if((inst & 0xfffc) == 0x1fcc)
-	return true;
-	*/
-	//	if((inst & 0xfffc) == 0x1fcc)
-	//		return true;
-	return false;
-}
-
 DSPEmitter::DSPEmitter() : storeIndex(-1), storeIndex2(-1)
 {
 	m_compiledCode = NULL;
@@ -167,7 +138,7 @@ void DSPEmitter::EmitInstruction(UDSPInstruction inst)
 	// Call extended
 	if (tinst->extended) {
 		if ((inst >> 12) == 0x3) {
-			if (! extOpTable[inst & 0x7F]->jitFunc || checkExtendedExclude(inst)) {
+			if (! extOpTable[inst & 0x7F]->jitFunc) {
 				// Fall back to interpreter
 				ABI_CallFunctionC16((void*)extOpTable[inst & 0x7F]->intFunc, inst);
 				INFO_LOG(DSPLLE,"Instruction not JITed(ext part): %04x\n",inst);
@@ -177,7 +148,7 @@ void DSPEmitter::EmitInstruction(UDSPInstruction inst)
 				ext_is_jit = true;
 			}
 		} else {
-			if (!extOpTable[inst & 0xFF]->jitFunc || checkExtendedExclude(inst)) {
+			if (!extOpTable[inst & 0xFF]->jitFunc) {
 				// Fall back to interpreter
 				ABI_CallFunctionC16((void*)extOpTable[inst & 0xFF]->intFunc, inst);
 				INFO_LOG(DSPLLE,"Instruction not JITed(ext part): %04x\n",inst);
@@ -190,7 +161,7 @@ void DSPEmitter::EmitInstruction(UDSPInstruction inst)
 	}
 	
 	// Main instruction
-	if (!opTable[inst]->jitFunc || checkMainExclude(inst)) {
+	if (!opTable[inst]->jitFunc) {
 		Default(inst);
 		INFO_LOG(DSPLLE,"Instruction not JITed(main part): %04x\n",inst);
 	}
@@ -270,7 +241,7 @@ void DSPEmitter::Compile(int start_addr)
 #ifdef _M_IX86 // All32
 	TEST(16, M(&g_dsp.cr), Imm16(CR_EXTERNAL_INT));
 	FixupBranch noExternalInterrupt = J_CC(CC_Z);
-	TEST(16, M(&g_dsp._r.sr), Imm16(SR_EXT_INT_ENABLE));
+	TEST(16, M(&g_dsp.r.sr), Imm16(SR_EXT_INT_ENABLE));
 	FixupBranch externalInterruptDisabled = J_CC(CC_Z);
 	OR(8, M(&g_dsp.exceptions), Imm8(1 << EXP_INT));
 	AND(16, M(&g_dsp.cr), Imm16(~CR_EXTERNAL_INT));
@@ -281,7 +252,7 @@ void DSPEmitter::Compile(int start_addr)
 	MOV(64, R(RAX), ImmPtr(&g_dsp.cr));
 	TEST(16, MatR(RAX), Imm16(CR_EXTERNAL_INT));
 	FixupBranch noExternalInterrupt = J_CC(CC_Z);
-	MOV(64, R(RAX), ImmPtr(&g_dsp._r.sr));
+	MOV(64, R(RAX), ImmPtr(&g_dsp.r.sr));
 	TEST(16, MatR(RAX), Imm16(SR_EXT_INT_ENABLE));
 	FixupBranch externalInterruptDisabled = J_CC(CC_Z);
 	MOV(64, R(RAX), ImmPtr(&g_dsp.exceptions));
@@ -324,18 +295,18 @@ void DSPEmitter::Compile(int start_addr)
 		if (DSPAnalyzer::code_flags[compilePC-1] & DSPAnalyzer::CODE_LOOP_END)
 		{
 #ifdef _M_IX86 // All32
-			MOVZX(32, 16, EAX, M(&(g_dsp._r.st[2])));
+			MOVZX(32, 16, EAX, M(&(g_dsp.r.st[2])));
 #else
-			MOV(64, R(R11), ImmPtr(&g_dsp._r));
-			MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[2])));
+			MOV(64, R(R11), ImmPtr(&g_dsp.r));
+			MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[2])));
 #endif
 			CMP(32, R(EAX), Imm32(0));
 			FixupBranch rLoopAddressExit = J_CC(CC_LE, true);
-		
+
 #ifdef _M_IX86 // All32
-			MOVZX(32, 16, EAX, M(&g_dsp._r.st[3]));
+			MOVZX(32, 16, EAX, M(&g_dsp.r.st[3]));
 #else
-			MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[3])));
+			MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[3])));
 #endif
 			CMP(32, R(EAX), Imm32(0));
 			FixupBranch rLoopCounterExit = J_CC(CC_LE, true);
diff --git a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
index 644ac883e1..644ce60663 100644
--- a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
+++ b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
@@ -28,128 +28,128 @@ namespace DSPInterpreter {
 
 void Update_SR_Register64(s64 _Value, bool carry, bool overflow)
 {
-	g_dsp._r.sr &= ~SR_CMP_MASK;
+	g_dsp.r.sr &= ~SR_CMP_MASK;
 
 	// 0x01
 	if (carry)
 	{
-		g_dsp._r.sr |= SR_CARRY;
+		g_dsp.r.sr |= SR_CARRY;
 	}
 
 	// 0x02 and 0x80
 	if (overflow)
 	{
-		g_dsp._r.sr |= SR_OVERFLOW;
-		g_dsp._r.sr  |= SR_OVERFLOW_STICKY; 
+		g_dsp.r.sr |= SR_OVERFLOW;
+		g_dsp.r.sr  |= SR_OVERFLOW_STICKY; 
 	}
 
 	// 0x04
 	if (_Value == 0)
 	{
-		g_dsp._r.sr |= SR_ARITH_ZERO;
+		g_dsp.r.sr |= SR_ARITH_ZERO;
 	}
 
 	// 0x08
 	if (_Value < 0)
 	{
-		g_dsp._r.sr |= SR_SIGN;
+		g_dsp.r.sr |= SR_SIGN;
 	}
 
 	// 0x10
 	if (_Value != (s32)_Value)
 	{
-		g_dsp._r.sr |= SR_OVER_S32;
+		g_dsp.r.sr |= SR_OVER_S32;
 	}
 
 	// 0x20 - Checks if top bits of m are equal
 	if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000))
 	{
-		g_dsp._r.sr |= SR_TOP2BITS;
+		g_dsp.r.sr |= SR_TOP2BITS;
 	}
 }
 
 
 void Update_SR_Register16(s16 _Value, bool carry, bool overflow, bool overS32)
 {
-	g_dsp._r.sr &= ~SR_CMP_MASK;
+	g_dsp.r.sr &= ~SR_CMP_MASK;
 
 	// 0x01
 	if (carry)
 	{
-		g_dsp._r.sr |= SR_CARRY;
+		g_dsp.r.sr |= SR_CARRY;
 	}
 
 	// 0x02 and 0x80
 	if (overflow)
 	{
-		g_dsp._r.sr |= SR_OVERFLOW;
-		g_dsp._r.sr  |= SR_OVERFLOW_STICKY; 
+		g_dsp.r.sr |= SR_OVERFLOW;
+		g_dsp.r.sr  |= SR_OVERFLOW_STICKY;
 	}
 
 	// 0x04
 	if (_Value == 0)
 	{
-		g_dsp._r.sr |= SR_ARITH_ZERO;
+		g_dsp.r.sr |= SR_ARITH_ZERO;
 	}
 
 	// 0x08 
 	if (_Value < 0)
 	{
-		g_dsp._r.sr |= SR_SIGN;
+		g_dsp.r.sr |= SR_SIGN;
 	}
 
 	// 0x10
 	if (overS32) 
 	{
-		g_dsp._r.sr |= SR_OVER_S32;
+		g_dsp.r.sr |= SR_OVER_S32;
 	}
 
 	// 0x20 - Checks if top bits of m are equal
 	if ((((u16)_Value >> 14) == 0) || (((u16)_Value >> 14) == 3))
 	{
-		g_dsp._r.sr |= SR_TOP2BITS;
+		g_dsp.r.sr |= SR_TOP2BITS;
 	}
 }
 
 void Update_SR_LZ(bool value)
 {
 	if (value == true) 
-		g_dsp._r.sr |= SR_LOGIC_ZERO; 
+		g_dsp.r.sr |= SR_LOGIC_ZERO;
 	else
-		g_dsp._r.sr &= ~SR_LOGIC_ZERO;
+		g_dsp.r.sr &= ~SR_LOGIC_ZERO;
 }
 
 inline int GetMultiplyModifier()
 {
-	return (g_dsp._r.sr & SR_MUL_MODIFY)?1:2;
+	return (g_dsp.r.sr & SR_MUL_MODIFY)?1:2;
 }
 
 inline bool isCarry() {
-	return (g_dsp._r.sr & SR_CARRY) ? true : false;
+	return (g_dsp.r.sr & SR_CARRY) ? true : false;
 }
 
 inline bool isOverflow() {
-	return (g_dsp._r.sr & SR_OVERFLOW) ? true : false;
+	return (g_dsp.r.sr & SR_OVERFLOW) ? true : false;
 }
 
 inline bool isOverS32() {
-	return (g_dsp._r.sr & SR_OVER_S32) ? true : false;
+	return (g_dsp.r.sr & SR_OVER_S32) ? true : false;
 }
 
 inline bool isLess() {
-	return (!(g_dsp._r.sr & SR_OVERFLOW) != !(g_dsp._r.sr & SR_SIGN));
+	return (!(g_dsp.r.sr & SR_OVERFLOW) != !(g_dsp.r.sr & SR_SIGN));
 }
 
 inline bool isZero() {
-	return (g_dsp._r.sr & SR_ARITH_ZERO) ? true : false;
+	return (g_dsp.r.sr & SR_ARITH_ZERO) ? true : false;
 }
 
 inline bool isLogicZero() {
-	return (g_dsp._r.sr & SR_LOGIC_ZERO) ? true : false;
+	return (g_dsp.r.sr & SR_LOGIC_ZERO) ? true : false;
 }
 
 inline bool isConditionA() {
-	return (((g_dsp._r.sr & SR_OVER_S32) || (g_dsp._r.sr & SR_TOP2BITS)) && !(g_dsp._r.sr & SR_ARITH_ZERO)) ? true : false;
+	return (((g_dsp.r.sr & SR_OVER_S32) || (g_dsp.r.sr & SR_TOP2BITS)) && !(g_dsp.r.sr & SR_ARITH_ZERO)) ? true : false;
 }
 
 //see DSPCore.h for flags
diff --git a/Source/Core/DSPCore/Src/DSPIntExtOps.cpp b/Source/Core/DSPCore/Src/DSPIntExtOps.cpp
index 86f9bec117..11eca9abac 100644
--- a/Source/Core/DSPCore/Src/DSPIntExtOps.cpp
+++ b/Source/Core/DSPCore/Src/DSPIntExtOps.cpp
@@ -70,7 +70,7 @@ void ir(const UDSPInstruction opc) {
 void nr(const UDSPInstruction opc) {
 	u8 reg = opc & 0x3;	
 	
-	writeToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp._r.ix[reg]));
+	writeToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg]));
 }
 
 // MV $axD.D, $acS.S
@@ -84,11 +84,11 @@ void mv(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
 		break;
 	}
 }
@@ -105,11 +105,11 @@ void s(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		dsp_dmem_write(g_dsp._r.ar[dreg], g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		dsp_dmem_write(g_dsp.r.ar[dreg], g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		dsp_dmem_write(g_dsp._r.ar[dreg], g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		dsp_dmem_write(g_dsp.r.ar[dreg], g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
 		break;
 	}
 	writeToBackLog(0, dreg,	dsp_increment_addr_reg(dreg));
@@ -127,14 +127,14 @@ void sn(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		dsp_dmem_write(g_dsp._r.ar[dreg], g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		dsp_dmem_write(g_dsp.r.ar[dreg], g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		dsp_dmem_write(g_dsp._r.ar[dreg], g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		dsp_dmem_write(g_dsp.r.ar[dreg], g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
 		break;
 	}
-	writeToBackLog(0, dreg,	dsp_increase_addr_reg(dreg, (s16)g_dsp._r.ix[dreg]));
+	writeToBackLog(0, dreg,	dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[dreg]));
 }
 
 // L $axD.D, @$arS
@@ -146,9 +146,9 @@ void l(const UDSPInstruction opc)
 	u8 sreg = opc & 0x3;
 	u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
 	
-	if ((dreg >= DSP_REG_ACM0) && (g_dsp._r.sr & SR_40_MODE_BIT)) 
+	if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT)) 
 	{
-		u16 val = dsp_dmem_read(g_dsp._r.ar[sreg]);
+		u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]);
 		writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
 		writeToBackLog(1, dreg,	val);
 		writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
@@ -156,7 +156,7 @@ void l(const UDSPInstruction opc)
 	}
 	else
 	{
-		writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[sreg]));
+		writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[sreg]));
 		writeToBackLog(1, sreg, dsp_increment_addr_reg(sreg));
 	}
 }
@@ -170,18 +170,18 @@ void ln(const UDSPInstruction opc)
 	u8 sreg = opc & 0x3;
 	u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
 
-	if ((dreg >= DSP_REG_ACM0) && (g_dsp._r.sr & SR_40_MODE_BIT)) 
+	if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT)) 
 	{
-		u16 val = dsp_dmem_read(g_dsp._r.ar[sreg]);
+		u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]);
 		writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
 		writeToBackLog(1, dreg,	val);
 		writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
-		writeToBackLog(3, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp._r.ix[sreg]));
+		writeToBackLog(3, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
 	}
 	else
 	{
-		writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[sreg]));
-		writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp._r.ix[sreg]));
+		writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[sreg]));
+		writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
 	}
 }
 
@@ -195,9 +195,9 @@ void ls(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[3], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[3], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[0]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[0]));
 	writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
 	writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0)); 
 }
@@ -214,11 +214,11 @@ void lsn(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[3], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[3], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[0]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[0]));
 	writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
-	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp._r.ix[0]));
+	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
 }
 
 // LSM $axD.D, $acS.m
@@ -232,10 +232,10 @@ void lsm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[3], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[3], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[0]));
-	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp._r.ix[3]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[0]));
+	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
 	writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
 }
 
@@ -251,11 +251,11 @@ void lsnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[3], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[3], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[0]));
-	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp._r.ix[3]));
-	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp._r.ix[0]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[0]));
+	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
+	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
 }
 
 // SL $acS.m, $axD.D
@@ -268,9 +268,9 @@ void sl(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[0], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[0], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[3]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[3]));
 	writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
 	writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0)); 
 }
@@ -286,11 +286,11 @@ void sln(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[0], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[0], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[3]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[3]));
 	writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
-	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp._r.ix[0]));
+	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
 }
 
 // SLM $acS.m, $axD.D
@@ -304,10 +304,10 @@ void slm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[0], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[0], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[3]));
-	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp._r.ix[3]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[3]));
+	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
 	writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
 }
 
@@ -322,11 +322,11 @@ void slnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 
-	dsp_dmem_write(g_dsp._r.ar[0], g_dsp._r.ac[sreg].m);
+	dsp_dmem_write(g_dsp.r.ar[0], g_dsp.r.ac[sreg].m);
 
-	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp._r.ar[3]));
-	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp._r.ix[3]));
-	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp._r.ix[0]));
+	writeToBackLog(0, dreg,	dsp_dmem_read(g_dsp.r.ar[3]));
+	writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
+	writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
 }
 
 // LD $ax0.d, $ax1.r, @$arS
@@ -345,21 +345,21 @@ void ld(const UDSPInstruction opc)
 	u8 sreg = opc & 0x3;
 
 	if (sreg != DSP_REG_AR3) {
-		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[sreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
 		else
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
 
 		writeToBackLog(2, sreg,	dsp_increment_addr_reg(sreg));
 	} else {
-		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[dreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		if (IsSameMemArea(g_dsp.r.ar[dreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 		else
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
 
 		writeToBackLog(2, dreg,	dsp_increment_addr_reg(dreg));
 	}
@@ -376,23 +376,23 @@ void ldn(const UDSPInstruction opc)
 	u8 sreg = opc & 0x3;
 
 	if (sreg != DSP_REG_AR3) {
-		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[sreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
 		else
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
 
-		writeToBackLog(2, sreg,	dsp_increase_addr_reg(sreg, (s16)g_dsp._r.ix[sreg]));
+		writeToBackLog(2, sreg,	dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
 	} else {
-		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[dreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		if (IsSameMemArea(g_dsp.r.ar[dreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 		else
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
 
-		writeToBackLog(2, dreg,	dsp_increase_addr_reg(dreg, (s16)g_dsp._r.ix[dreg]));
+		writeToBackLog(2, dreg,	dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[dreg]));
 	}
 
 	writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
@@ -407,27 +407,27 @@ void ldm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x3;
 
 	if (sreg != DSP_REG_AR3) {
-		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[sreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
 		else
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
 
 		writeToBackLog(2, sreg,	dsp_increment_addr_reg(sreg));
 	} else {
-		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[dreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		if (IsSameMemArea(g_dsp.r.ar[dreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 		else
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
 
 		writeToBackLog(2, dreg,	dsp_increment_addr_reg(dreg));
 	}
 
 	writeToBackLog(3, DSP_REG_AR3,
-		       dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp._r.ix[3]));
+		       dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
 }
 
 // LDNM $ax0.d, $ax1.r, @$arS
@@ -439,27 +439,27 @@ void ldnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x3;
 
 	if (sreg != DSP_REG_AR3) {
-		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[sreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[sreg]));
+		if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
 		else
-			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
 
-		writeToBackLog(2, sreg,	dsp_increase_addr_reg(sreg, (s16)g_dsp._r.ix[sreg]));
+		writeToBackLog(2, sreg,	dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
 	} else {
-		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 
-		if (IsSameMemArea(g_dsp._r.ar[dreg], g_dsp._r.ar[3]))
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[dreg]));
+		if (IsSameMemArea(g_dsp.r.ar[dreg], g_dsp.r.ar[3]))
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[dreg]));
 		else
-			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp._r.ar[3]));
+			writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
 
-		writeToBackLog(2, dreg,	dsp_increase_addr_reg(dreg, (s16)g_dsp._r.ix[dreg]));
+		writeToBackLog(2, dreg,	dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[dreg]));
 	}
 
 	writeToBackLog(3, DSP_REG_AR3,
-		       dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp._r.ix[3]));
+		       dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
 }
 
 
diff --git a/Source/Core/DSPCore/Src/DSPIntUtil.h b/Source/Core/DSPCore/Src/DSPIntUtil.h
index 2c21da2f00..7f3f520341 100644
--- a/Source/Core/DSPCore/Src/DSPIntUtil.h
+++ b/Source/Core/DSPCore/Src/DSPIntUtil.h
@@ -40,12 +40,12 @@
 
 inline void dsp_SR_set_flag(int flag)
 {
-	g_dsp._r.sr |= flag;
+	g_dsp.r.sr |= flag;
 }
 
 inline bool dsp_SR_is_flag_set(int flag)
 {
-	return (g_dsp._r.sr & flag) != 0;
+	return (g_dsp.r.sr & flag) != 0;
 }
 
 // ---------------------------------------------------------------------------------------
@@ -63,8 +63,8 @@ inline u16 ToMask(u16 a)
 
 inline u16 dsp_increase_addr_reg(u16 reg, s16 ix)
 {
-	u16 ar = g_dsp._r.ar[reg];
-	u16 wr = g_dsp._r.wr[reg]; 
+	u16 ar = g_dsp.r.ar[reg];
+	u16 wr = g_dsp.r.wr[reg];
 	u16 m = ToMask(wr) | 1;
     u16 nar = ar+ix;
     if (ix >= 0) {
@@ -79,8 +79,8 @@ inline u16 dsp_increase_addr_reg(u16 reg, s16 ix)
 
 inline u16 dsp_decrease_addr_reg(u16 reg, s16 ix) 
 {
-	u16 ar = g_dsp._r.ar[reg];
-	u16 wr = g_dsp._r.wr[reg]; 
+	u16 ar = g_dsp.r.ar[reg];
+	u16 wr = g_dsp.r.wr[reg];
     u16 m = ToMask(wr) | 1;
     u16 nar = ar-ix;
     if ((u16)ix > 0x8000) { // equiv: ix < 0 && ix != -0x8000
@@ -120,38 +120,38 @@ inline u16 dsp_op_read_reg(int reg)
 	case DSP_REG_AR1:
 	case DSP_REG_AR2:
 	case DSP_REG_AR3:
-		return g_dsp._r.ar[reg - DSP_REG_AR0];
+		return g_dsp.r.ar[reg - DSP_REG_AR0];
 	case DSP_REG_IX0:
 	case DSP_REG_IX1:
 	case DSP_REG_IX2:
 	case DSP_REG_IX3:
-		return g_dsp._r.ix[reg - DSP_REG_IX0];
+		return g_dsp.r.ix[reg - DSP_REG_IX0];
 	case DSP_REG_WR0:
 	case DSP_REG_WR1:
 	case DSP_REG_WR2:
 	case DSP_REG_WR3:
-		return g_dsp._r.wr[reg - DSP_REG_WR0];
+		return g_dsp.r.wr[reg - DSP_REG_WR0];
 	case DSP_REG_ACH0:
 	case DSP_REG_ACH1:
-		return g_dsp._r.ac[reg - DSP_REG_ACH0].h;
-	case DSP_REG_CR:     return g_dsp._r.cr;
-	case DSP_REG_SR:     return g_dsp._r.sr;
-	case DSP_REG_PRODL:  return g_dsp._r.prod.l;
-	case DSP_REG_PRODM:  return g_dsp._r.prod.m;
-	case DSP_REG_PRODH:  return g_dsp._r.prod.h;
-	case DSP_REG_PRODM2: return g_dsp._r.prod.m2;
+		return g_dsp.r.ac[reg - DSP_REG_ACH0].h;
+	case DSP_REG_CR:     return g_dsp.r.cr;
+	case DSP_REG_SR:     return g_dsp.r.sr;
+	case DSP_REG_PRODL:  return g_dsp.r.prod.l;
+	case DSP_REG_PRODM:  return g_dsp.r.prod.m;
+	case DSP_REG_PRODH:  return g_dsp.r.prod.h;
+	case DSP_REG_PRODM2: return g_dsp.r.prod.m2;
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		return g_dsp._r.ax[reg - DSP_REG_AXL0].l;
+		return g_dsp.r.ax[reg - DSP_REG_AXL0].l;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		return g_dsp._r.ax[reg - DSP_REG_AXH0].h;
+		return g_dsp.r.ax[reg - DSP_REG_AXH0].h;
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		return g_dsp._r.ac[reg - DSP_REG_ACL0].l;
+		return g_dsp.r.ac[reg - DSP_REG_ACL0].l;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		return g_dsp._r.ac[reg - DSP_REG_ACM0].m;
+		return g_dsp.r.ac[reg - DSP_REG_ACM0].m;
 	default:
 		_assert_msg_(DSP_INT, 0, "cannot happen");
 		return 0;
@@ -165,7 +165,7 @@ inline void dsp_op_write_reg(int reg, u16 val)
 	case DSP_REG_ACH0:
 	case DSP_REG_ACH1:
 		// sign extend from the bottom 8 bits.
-		g_dsp._r.ac[reg-DSP_REG_ACH0].h = (u16)(s16)(s8)(u8)val;
+		g_dsp.r.ac[reg-DSP_REG_ACH0].h = (u16)(s16)(s8)(u8)val;
 		break;
 
 	// Stack registers.
@@ -180,41 +180,41 @@ inline void dsp_op_write_reg(int reg, u16 val)
 	case DSP_REG_AR1:
 	case DSP_REG_AR2:
 	case DSP_REG_AR3:
-		g_dsp._r.ar[reg - DSP_REG_AR0] = val;
+		g_dsp.r.ar[reg - DSP_REG_AR0] = val;
 		break;
 	case DSP_REG_IX0:
 	case DSP_REG_IX1:
 	case DSP_REG_IX2:
 	case DSP_REG_IX3:
-		g_dsp._r.ix[reg - DSP_REG_IX0] = val;
+		g_dsp.r.ix[reg - DSP_REG_IX0] = val;
 		break;
 	case DSP_REG_WR0:
 	case DSP_REG_WR1:
 	case DSP_REG_WR2:
 	case DSP_REG_WR3:
-		g_dsp._r.wr[reg - DSP_REG_WR0] = val;
+		g_dsp.r.wr[reg - DSP_REG_WR0] = val;
 		break;
-	case DSP_REG_CR:     g_dsp._r.cr = val; break;
-	case DSP_REG_SR:     g_dsp._r.sr = val; break;
-	case DSP_REG_PRODL:  g_dsp._r.prod.l = val; break;
-	case DSP_REG_PRODM:  g_dsp._r.prod.m = val; break;
-	case DSP_REG_PRODH:  g_dsp._r.prod.h = val; break;
-	case DSP_REG_PRODM2: g_dsp._r.prod.m2 = val; break;
+	case DSP_REG_CR:     g_dsp.r.cr = val; break;
+	case DSP_REG_SR:     g_dsp.r.sr = val; break;
+	case DSP_REG_PRODL:  g_dsp.r.prod.l = val; break;
+	case DSP_REG_PRODM:  g_dsp.r.prod.m = val; break;
+	case DSP_REG_PRODH:  g_dsp.r.prod.h = val; break;
+	case DSP_REG_PRODM2: g_dsp.r.prod.m2 = val; break;
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		g_dsp._r.ax[reg - DSP_REG_AXL0].l = val;
+		g_dsp.r.ax[reg - DSP_REG_AXL0].l = val;
 		break;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		g_dsp._r.ax[reg - DSP_REG_AXH0].h = val;
+		g_dsp.r.ax[reg - DSP_REG_AXH0].h = val;
 		break;
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		g_dsp._r.ac[reg - DSP_REG_ACL0].l = val;
+		g_dsp.r.ac[reg - DSP_REG_ACL0].l = val;
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		g_dsp._r.ac[reg - DSP_REG_ACM0].m = val;
+		g_dsp.r.ac[reg - DSP_REG_ACM0].m = val;
 		break;
 	}
 }
@@ -225,12 +225,12 @@ inline void dsp_conditional_extend_accum(int reg)
 	{
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		if (g_dsp._r.sr & SR_40_MODE_BIT)
+		if (g_dsp.r.sr & SR_40_MODE_BIT)
 		{
 			// Sign extend into whole accum.
-			u16 val = g_dsp._r.ac[reg-DSP_REG_ACM0].m;
-			g_dsp._r.ac[reg - DSP_REG_ACM0].h = (val & 0x8000) ? 0xFFFF : 0x0000;
-			g_dsp._r.ac[reg - DSP_REG_ACM0].l = 0;
+			u16 val = g_dsp.r.ac[reg-DSP_REG_ACM0].m;
+			g_dsp.r.ac[reg - DSP_REG_ACM0].h = (val & 0x8000) ? 0xFFFF : 0x0000;
+			g_dsp.r.ac[reg - DSP_REG_ACM0].l = 0;
 		}
 	}
 }
@@ -245,12 +245,12 @@ inline s64 dsp_get_long_prod()
 	ProfilerAddDelta(g_dsp.err_pc, 1);
 #endif
 
-	s64 val   = (s8)(u8)g_dsp._r.prod.h;
+	s64 val   = (s8)(u8)g_dsp.r.prod.h;
 	val <<= 32;
-	s64 low_prod  = g_dsp._r.prod.m;
-	low_prod += g_dsp._r.prod.m2;
+	s64 low_prod  = g_dsp.r.prod.m;
+	low_prod += g_dsp.r.prod.m2;
 	low_prod <<= 16;
-	low_prod |= g_dsp._r.prod.l;
+	low_prod |= g_dsp.r.prod.l;
 	val += low_prod;
 	return val;
 }
@@ -275,12 +275,12 @@ inline void dsp_set_long_prod(s64 val)
 	ProfilerAddDelta(g_dsp.err_pc, 1);
 #endif
 
-	g_dsp._r.prod.l = (u16)val;
+	g_dsp.r.prod.l = (u16)val;
 	val >>= 16;
-	g_dsp._r.prod.m = (u16)val;
+	g_dsp.r.prod.m = (u16)val;
 	val >>= 16;
-	g_dsp._r.prod.h = /*(s16)(s8)*/(u8)val;//todo: check expansion
-	g_dsp._r.prod.m2 = 0;
+	g_dsp.r.prod.h = /*(s16)(s8)*/(u8)val;//todo: check expansion
+	g_dsp.r.prod.m2 = 0;
 }
 
 // ---------------------------------------------------------------------------------------
@@ -293,8 +293,8 @@ inline s64 dsp_get_long_acc(int reg)
 	ProfilerAddDelta(g_dsp.err_pc, 1);
 #endif
 
-	s64 high = (s64)(s8)g_dsp._r.ac[reg].h << 32;
-	u32 mid_low = ((u32)g_dsp._r.ac[reg].m << 16) | g_dsp._r.ac[reg].l;
+	s64 high = (s64)(s8)g_dsp.r.ac[reg].h << 32;
+	u32 mid_low = ((u32)g_dsp.r.ac[reg].m << 16) | g_dsp.r.ac[reg].l;
 	return high | mid_low;
 }
 
@@ -304,11 +304,11 @@ inline void dsp_set_long_acc(int _reg, s64 val)
 	ProfilerAddDelta(g_dsp.err_pc, 1);
 #endif
 
-	g_dsp._r.ac[_reg].l = (u16)val;
+	g_dsp.r.ac[_reg].l = (u16)val;
 	val >>= 16;
-	g_dsp._r.ac[_reg].m = (u16)val;
+	g_dsp.r.ac[_reg].m = (u16)val;
 	val >>= 16;
-	g_dsp._r.ac[_reg].h = (u16)(s16)(s8)(u8)val;
+	g_dsp.r.ac[_reg].h = (u16)(s16)(s8)(u8)val;
 }
 
 inline s64 dsp_convert_long_acc(s64 val) // s64 -> s40
@@ -328,17 +328,17 @@ inline s64 dsp_round_long_acc(s64 val)
 
 inline s16 dsp_get_acc_l(int _reg)
 {
-	return g_dsp._r.ac[_reg].l;
+	return g_dsp.r.ac[_reg].l;
 }
 
 inline s16 dsp_get_acc_m(int _reg)
 {
-	return g_dsp._r.ac[_reg].m;
+	return g_dsp.r.ac[_reg].m;
 }
 
 inline s16 dsp_get_acc_h(int _reg)
 {
-	return g_dsp._r.ac[_reg].h;
+	return g_dsp.r.ac[_reg].h;
 }
 
 // ---------------------------------------------------------------------------------------
@@ -351,17 +351,17 @@ inline s32 dsp_get_long_acx(int _reg)
 	ProfilerAddDelta(g_dsp.err_pc, 1);
 #endif
 
-	return ((u32)g_dsp._r.ax[_reg].h << 16) | g_dsp._r.ax[_reg].l;
+	return ((u32)g_dsp.r.ax[_reg].h << 16) | g_dsp.r.ax[_reg].l;
 }
 
 inline s16 dsp_get_ax_l(int _reg)
 {
-	return (s16)g_dsp._r.ax[_reg].l;
+	return (s16)g_dsp.r.ax[_reg].l;
 }
 
 inline s16 dsp_get_ax_h(int _reg)
 {
-	return (s16)g_dsp._r.ax[_reg].h;
+	return (s16)g_dsp.r.ax[_reg].h;
 }
 
 #endif
diff --git a/Source/Core/DSPCore/Src/DSPStacks.cpp b/Source/Core/DSPCore/Src/DSPStacks.cpp
index 7ddfe85baa..5bdae0241f 100644
--- a/Source/Core/DSPCore/Src/DSPStacks.cpp
+++ b/Source/Core/DSPCore/Src/DSPStacks.cpp
@@ -34,12 +34,12 @@ void dsp_reg_stack_push(int stack_reg)
 {
 	g_dsp.reg_stack_ptr[stack_reg]++;
 	g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
-	g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp._r.st[stack_reg];
+	g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp.r.st[stack_reg];
 }
 
 void dsp_reg_stack_pop(int stack_reg)
 {
-	g_dsp._r.st[stack_reg] = g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]];
+	g_dsp.r.st[stack_reg] = g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]];
 	g_dsp.reg_stack_ptr[stack_reg]--;
 	g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
 }
@@ -47,12 +47,12 @@ void dsp_reg_stack_pop(int stack_reg)
 void dsp_reg_store_stack(int stack_reg, u16 val)
 {
 	dsp_reg_stack_push(stack_reg);
-	g_dsp._r.st[stack_reg] = val;
+	g_dsp.r.st[stack_reg] = val;
 }
 
 u16 dsp_reg_load_stack(int stack_reg)
 {
-	u16 val = g_dsp._r.st[stack_reg];
+	u16 val = g_dsp.r.st[stack_reg];
 	dsp_reg_stack_pop(stack_reg);
 	return val;
 }
diff --git a/Source/Core/DSPCore/Src/DspIntArithmetic.cpp b/Source/Core/DSPCore/Src/DspIntArithmetic.cpp
index 43873430e4..63dbc8c02b 100644
--- a/Source/Core/DSPCore/Src/DspIntArithmetic.cpp
+++ b/Source/Core/DSPCore/Src/DspIntArithmetic.cpp
@@ -149,7 +149,7 @@ void cmpar(const UDSPInstruction opc)
 	u8 sreg = (opc >> 11) & 0x1;
 
 	s64 sr = dsp_get_long_acc(sreg);
-	s64 rr = (s16)g_dsp._r.ax[rreg-DSP_REG_AXH0].h;
+	s64 rr = (s16)g_dsp.r.ax[rreg-DSP_REG_AXH0].h;
 	rr <<= 16;
 	s64 res = dsp_convert_long_acc(sr - rr);
 	
@@ -207,11 +207,11 @@ void xorr(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m ^ g_dsp._r.ax[sreg].h;
+	u16 accm = g_dsp.r.ac[dreg].m ^ g_dsp.r.ax[sreg].h;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -226,11 +226,11 @@ void andr(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m & g_dsp._r.ax[sreg].h;
+	u16 accm = g_dsp.r.ac[dreg].m & g_dsp.r.ax[sreg].h;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -245,11 +245,11 @@ void orr(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m | g_dsp._r.ax[sreg].h;
+	u16 accm = g_dsp.r.ac[dreg].m | g_dsp.r.ax[sreg].h;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -263,11 +263,11 @@ void orr(const UDSPInstruction opc)
 void andc(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m & g_dsp._r.ac[1 - dreg].m;
+	u16 accm = g_dsp.r.ac[dreg].m & g_dsp.r.ac[1 - dreg].m;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -281,11 +281,11 @@ void andc(const UDSPInstruction opc)
 void orc(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m | g_dsp._r.ac[1 - dreg].m;
+	u16 accm = g_dsp.r.ac[dreg].m | g_dsp.r.ac[1 - dreg].m;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -298,11 +298,11 @@ void orc(const UDSPInstruction opc)
 void xorc(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m ^ g_dsp._r.ac[1 - dreg].m;
+	u16 accm = g_dsp.r.ac[dreg].m ^ g_dsp.r.ac[1 - dreg].m;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -315,11 +315,11 @@ void xorc(const UDSPInstruction opc)
 void notc(const UDSPInstruction opc)
 {
 	u8 dreg = (opc >> 8) & 0x1;
-	u16 accm = g_dsp._r.ac[dreg].m ^ 0xffff;
+	u16 accm = g_dsp.r.ac[dreg].m ^ 0xffff;
 
 	zeroWriteBackLogPreserveAcc(dreg);
 
-	g_dsp._r.ac[dreg].m = accm;
+	g_dsp.r.ac[dreg].m = accm;
 	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 }
 
@@ -334,9 +334,9 @@ void xori(const UDSPInstruction opc)
 {
 	u8 reg  = (opc >> 8) & 0x1;
 	u16 imm = dsp_fetch_code();
-	g_dsp._r.ac[reg].m ^= imm;
+	g_dsp.r.ac[reg].m ^= imm;
 
-	Update_SR_Register16((s16)g_dsp._r.ac[reg].m, false, false, isOverS32(dsp_get_long_acc(reg)));
+	Update_SR_Register16((s16)g_dsp.r.ac[reg].m, false, false, isOverS32(dsp_get_long_acc(reg)));
 }
 
 // ANDI $acD.m, #I
@@ -349,9 +349,9 @@ void andi(const UDSPInstruction opc)
 {
 	u8 reg  = (opc >> 8) & 0x1;
 	u16 imm = dsp_fetch_code();
-	g_dsp._r.ac[reg].m &= imm;
+	g_dsp.r.ac[reg].m &= imm;
 
-	Update_SR_Register16((s16)g_dsp._r.ac[reg].m, false, false, isOverS32(dsp_get_long_acc(reg)));
+	Update_SR_Register16((s16)g_dsp.r.ac[reg].m, false, false, isOverS32(dsp_get_long_acc(reg)));
 }
 
 // ORI $acD.m, #I
@@ -364,9 +364,9 @@ void ori(const UDSPInstruction opc)
 {
 	u8 reg  = (opc >> 8) & 0x1;
 	u16 imm = dsp_fetch_code();
-	g_dsp._r.ac[reg].m |= imm;
+	g_dsp.r.ac[reg].m |= imm;
 
-	Update_SR_Register16((s16)g_dsp._r.ac[reg].m, false, false, isOverS32(dsp_get_long_acc(reg)));
+	Update_SR_Register16((s16)g_dsp.r.ac[reg].m, false, false, isOverS32(dsp_get_long_acc(reg)));
 }
 
 //----
@@ -386,11 +386,14 @@ void addr(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		ax = (s16)g_dsp._r.ax[sreg-DSP_REG_AXL0].l;
+		ax = (s16)g_dsp.r.ax[sreg-DSP_REG_AXL0].l;
 		break;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		ax = (s16)g_dsp._r.ax[sreg-DSP_REG_AXH0].h;
+		ax = (s16)g_dsp.r.ax[sreg-DSP_REG_AXH0].h;
+		break;
+	default:
+		ax = 0;
 		break;
 	}
 	ax <<= 16;
@@ -582,11 +585,14 @@ void subr(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		ax = (s16)g_dsp._r.ax[sreg-DSP_REG_AXL0].l;
+		ax = (s16)g_dsp.r.ax[sreg-DSP_REG_AXL0].l;
 		break;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		ax = (s16)g_dsp._r.ax[sreg-DSP_REG_AXH0].h;
+		ax = (s16)g_dsp.r.ax[sreg-DSP_REG_AXH0].h;
+		break;
+	default:
+		ax = 0;
 		break;
 	}
 	ax <<= 16;
@@ -756,11 +762,14 @@ void movr(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		ax = (s16)g_dsp._r.ax[sreg-DSP_REG_AXL0].l;
+		ax = (s16)g_dsp.r.ax[sreg-DSP_REG_AXL0].l;
 		break;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		ax = (s16)g_dsp._r.ax[sreg-DSP_REG_AXH0].h;
+		ax = (s16)g_dsp.r.ax[sreg-DSP_REG_AXH0].h;
+		break;
+	default:
+		ax = 0;
 		break;
 	}
 	ax <<= 16;
@@ -1016,7 +1025,7 @@ void lsrnrx(const UDSPInstruction opc)
 	u8 sreg = (opc >> 9) & 0x1;
 
 	s16 shift;
-	u16 axh = g_dsp._r.ax[sreg].h;
+	u16 axh = g_dsp.r.ax[sreg].h;
 	u64 acc = dsp_get_long_acc(dreg);
 	acc &= 0x000000FFFFFFFFFFULL;
 
@@ -1051,7 +1060,7 @@ void asrnrx(const UDSPInstruction opc)
 	u8 sreg = (opc >> 9) & 0x1;
 
 	s16 shift;
-	u16 axh = g_dsp._r.ax[sreg].h;
+	u16 axh = g_dsp.r.ax[sreg].h;
 	s64 acc = dsp_get_long_acc(dreg);
 
 	if ((axh & 0x3f) == 0)
diff --git a/Source/Core/DSPCore/Src/DspIntBranch.cpp b/Source/Core/DSPCore/Src/DspIntBranch.cpp
index 826dc4c255..1113425a87 100644
--- a/Source/Core/DSPCore/Src/DspIntBranch.cpp
+++ b/Source/Core/DSPCore/Src/DspIntBranch.cpp
@@ -123,7 +123,7 @@ void ret(const UDSPInstruction opc)
 // location.
 void rti(const UDSPInstruction opc)
 {
-	g_dsp._r.sr = dsp_reg_load_stack(DSP_STACK_D);
+	g_dsp.r.sr = dsp_reg_load_stack(DSP_STACK_D);
 	g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
 
 }
@@ -147,9 +147,9 @@ void halt(const UDSPInstruction opc)
 void HandleLoop()
 {
 	// Handle looping hardware. 
-	const u16 rCallAddress = g_dsp._r.st[0];
-	const u16 rLoopAddress = g_dsp._r.st[2];
-	u16& rLoopCounter = g_dsp._r.st[3];
+	const u16 rCallAddress = g_dsp.r.st[0];
+	const u16 rLoopAddress = g_dsp.r.st[2];
+	u16& rLoopCounter = g_dsp.r.st[3];
 
 	if (rLoopAddress > 0 && rLoopCounter > 0)
 	{
diff --git a/Source/Core/DSPCore/Src/DspIntLoadStore.cpp b/Source/Core/DSPCore/Src/DspIntLoadStore.cpp
index 272e7dff3f..0801674138 100644
--- a/Source/Core/DSPCore/Src/DspIntLoadStore.cpp
+++ b/Source/Core/DSPCore/Src/DspIntLoadStore.cpp
@@ -33,7 +33,7 @@ namespace DSPInterpreter {
 void srs(const UDSPInstruction opc)
 {
 	u8 reg   = ((opc >> 8) & 0x7) + 0x18;
-	u16 addr = (g_dsp._r.cr << 8) | (opc & 0xFF);
+	u16 addr = (g_dsp.r.cr << 8) | (opc & 0xFF);
 	dsp_dmem_write(addr, dsp_op_read_reg(reg));
 }
 
@@ -45,7 +45,7 @@ void srs(const UDSPInstruction opc)
 void lrs(const UDSPInstruction opc)
 {
 	u8 reg   = ((opc >> 8) & 0x7) + 0x18;
-	u16 addr = (g_dsp._r.cr << 8) | (opc & 0xFF);
+	u16 addr = (g_dsp.r.cr << 8) | (opc & 0xFF);
 	dsp_op_write_reg(reg, dsp_dmem_read(addr));
 	dsp_conditional_extend_accum(reg);
 }
@@ -116,7 +116,7 @@ void lrrd(const UDSPInstruction opc)
 	u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
 	dsp_op_write_reg(dreg, val);
 	dsp_conditional_extend_accum(dreg);
-	g_dsp._r.ar[sreg] = dsp_decrement_addr_reg(sreg);
+	g_dsp.r.ar[sreg] = dsp_decrement_addr_reg(sreg);
 }
 
 // LRRI $D, @$S
@@ -132,7 +132,7 @@ void lrri(const UDSPInstruction opc)
 	u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
 	dsp_op_write_reg(dreg, val);
 	dsp_conditional_extend_accum(dreg);
-	g_dsp._r.ar[sreg] = dsp_increment_addr_reg(sreg);
+	g_dsp.r.ar[sreg] = dsp_increment_addr_reg(sreg);
 }
 
 // LRRN $D, @$S
@@ -148,7 +148,7 @@ void lrrn(const UDSPInstruction opc)
 	u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
 	dsp_op_write_reg(dreg, val);
 	dsp_conditional_extend_accum(dreg);
-	g_dsp._r.ar[sreg] = dsp_increase_addr_reg(sreg, (s16)g_dsp._r.ix[sreg]);
+	g_dsp.r.ar[sreg] = dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]);
 }
 
 // SRR @$D, $S
@@ -162,7 +162,7 @@ void srr(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1f;
 
 	u16 val = dsp_op_read_reg(sreg);
-	dsp_dmem_write(g_dsp._r.ar[dreg], val);
+	dsp_dmem_write(g_dsp.r.ar[dreg], val);
 }
 
 // SRRD @$D, $S
@@ -176,8 +176,8 @@ void srrd(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1f;
 
 	u16 val = dsp_op_read_reg(sreg);
-	dsp_dmem_write(g_dsp._r.ar[dreg], val);
-	g_dsp._r.ar[dreg] = dsp_decrement_addr_reg(dreg);
+	dsp_dmem_write(g_dsp.r.ar[dreg], val);
+	g_dsp.r.ar[dreg] = dsp_decrement_addr_reg(dreg);
 }
 
 // SRRI @$D, $S
@@ -192,8 +192,8 @@ void srri(const UDSPInstruction opc)
 
 	u16 val = dsp_op_read_reg(sreg);
 
-	dsp_dmem_write(g_dsp._r.ar[dreg], val);
-	g_dsp._r.ar[dreg] = dsp_increment_addr_reg(dreg);
+	dsp_dmem_write(g_dsp.r.ar[dreg], val);
+	g_dsp.r.ar[dreg] = dsp_increment_addr_reg(dreg);
 }
 
 // SRRN @$D, $S
@@ -207,8 +207,8 @@ void srrn(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1f;
 
 	u16 val = dsp_op_read_reg(sreg);
-	dsp_dmem_write(g_dsp._r.ar[dreg], val);
-	g_dsp._r.ar[dreg] = dsp_increase_addr_reg(dreg, (s16)g_dsp._r.ix[dreg]);
+	dsp_dmem_write(g_dsp.r.ar[dreg], val);
+	g_dsp.r.ar[dreg] = dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[dreg]);
 }
 
 // ILRR $acD.m, @$arS
@@ -220,7 +220,7 @@ void ilrr(const UDSPInstruction opc)
 	u16 reg  = opc & 0x3;
 	u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
 
-	g_dsp._r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp._r.ar[reg]);
+	g_dsp.r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp.r.ar[reg]);
 	dsp_conditional_extend_accum(dreg);
 }
 
@@ -233,9 +233,9 @@ void ilrrd(const UDSPInstruction opc)
 	u16 reg  = opc & 0x3;
 	u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
 
-	g_dsp._r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp._r.ar[reg]);
+	g_dsp.r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp.r.ar[reg]);
 	dsp_conditional_extend_accum(dreg);
-	g_dsp._r.ar[reg] = dsp_decrement_addr_reg(reg);
+	g_dsp.r.ar[reg] = dsp_decrement_addr_reg(reg);
 }
 
 // ILRRI $acD.m, @$S
@@ -247,9 +247,9 @@ void ilrri(const UDSPInstruction opc)
 	u16 reg  = opc & 0x3;
 	u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
 
-	g_dsp._r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp._r.ar[reg]);
+	g_dsp.r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp.r.ar[reg]);
 	dsp_conditional_extend_accum(dreg);
-	g_dsp._r.ar[reg] = dsp_increment_addr_reg(reg);
+	g_dsp.r.ar[reg] = dsp_increment_addr_reg(reg);
 }
 
 // ILRRN $acD.m, @$arS
@@ -262,9 +262,9 @@ void ilrrn(const UDSPInstruction opc)
 	u16 reg  = opc & 0x3;
 	u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
 
-	g_dsp._r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp._r.ar[reg]);
+	g_dsp.r.ac[dreg-DSP_REG_ACM0].m = dsp_imem_read(g_dsp.r.ar[reg]);
 	dsp_conditional_extend_accum(dreg);
-	g_dsp._r.ar[reg] = dsp_increase_addr_reg(reg, (s16)g_dsp._r.ix[reg]);
+	g_dsp.r.ar[reg] = dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg]);
 }
 
 }  // namespace
diff --git a/Source/Core/DSPCore/Src/DspIntMisc.cpp b/Source/Core/DSPCore/Src/DspIntMisc.cpp
index e586c59816..f2c1f921af 100644
--- a/Source/Core/DSPCore/Src/DspIntMisc.cpp
+++ b/Source/Core/DSPCore/Src/DspIntMisc.cpp
@@ -86,7 +86,7 @@ void nx(const UDSPInstruction opc)
 // Decrement address register $arD.
 void dar(const UDSPInstruction opc)
 {
-	g_dsp._r.ar[opc & 0x3] = dsp_decrement_addr_reg(opc & 0x3);
+	g_dsp.r.ar[opc & 0x3] = dsp_decrement_addr_reg(opc & 0x3);
 }
 
 // IAR $arD
@@ -94,7 +94,7 @@ void dar(const UDSPInstruction opc)
 // Increment address register $arD.
 void iar(const UDSPInstruction opc)
 {
-	g_dsp._r.ar[opc & 0x3] = dsp_increment_addr_reg(opc & 0x3);
+	g_dsp.r.ar[opc & 0x3] = dsp_increment_addr_reg(opc & 0x3);
 }
 
 // SUBARN $arD  
@@ -104,7 +104,7 @@ void iar(const UDSPInstruction opc)
 void subarn(const UDSPInstruction opc)
 {
 	u8 dreg = opc & 0x3;
-	g_dsp._r.ar[dreg] = dsp_decrease_addr_reg(dreg, (s16)g_dsp._r.ix[dreg]);
+	g_dsp.r.ar[dreg] = dsp_decrease_addr_reg(dreg, (s16)g_dsp.r.ix[dreg]);
 }
 
 // ADDARN $arD, $ixS
@@ -115,7 +115,7 @@ void addarn(const UDSPInstruction opc)
 {
 	u8 dreg = opc & 0x3;
 	u8 sreg = (opc >> 2) & 0x3;
-	g_dsp._r.ar[dreg] = dsp_increase_addr_reg(dreg, (s16)g_dsp._r.ix[sreg]);
+	g_dsp.r.ar[dreg] = dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[sreg]);
 }
 
 //----
@@ -127,7 +127,7 @@ void addarn(const UDSPInstruction opc)
 void sbclr(const UDSPInstruction opc)
 {
 	u8 bit = (opc & 0x7) + 6;
-	g_dsp._r.sr &= ~(1 << bit);
+	g_dsp.r.sr &= ~(1 << bit);
 }
 
 // SBSET #I
@@ -137,7 +137,7 @@ void sbclr(const UDSPInstruction opc)
 void sbset(const UDSPInstruction opc)
 {
 	u8 bit = (opc & 0x7) + 6;
-	g_dsp._r.sr |= (1 << bit);
+	g_dsp.r.sr |= (1 << bit);
 }
 
 // This is a bunch of flag setters, flipping bits in SR. So far so good,
@@ -149,29 +149,29 @@ void srbith(const UDSPInstruction opc)
 	{
 	// M0/M2 change the multiplier mode (it can multiply by 2 for free).
 	case 0xa:  // M2
-		g_dsp._r.sr &= ~SR_MUL_MODIFY;
+		g_dsp.r.sr &= ~SR_MUL_MODIFY;
 		break;
 	case 0xb:  // M0
-		g_dsp._r.sr |= SR_MUL_MODIFY;
+		g_dsp.r.sr |= SR_MUL_MODIFY;
 		break;
 
 	// If set, treat multiplicands as unsigned.
 	// If clear, treat them as signed.
 	case 0xc:  // CLR15
-		g_dsp._r.sr &= ~SR_MUL_UNSIGNED;
+		g_dsp.r.sr &= ~SR_MUL_UNSIGNED;
 		break;
 	case 0xd:  // SET15
-		g_dsp._r.sr |= SR_MUL_UNSIGNED;
+		g_dsp.r.sr |= SR_MUL_UNSIGNED;
 		break;
 
 	// Automatic 40-bit sign extension when loading ACx.M.
     // SET40 changes something very important: see the LRI instruction above.
 	case 0xe:  // SET16 (CLR40)
-		g_dsp._r.sr &= ~SR_40_MODE_BIT;
+		g_dsp.r.sr &= ~SR_40_MODE_BIT;
 		break;
 
 	case 0xf:  // SET40
-		g_dsp._r.sr |= SR_40_MODE_BIT;
+		g_dsp.r.sr |= SR_40_MODE_BIT;
 		break;
 
 	default:
diff --git a/Source/Core/DSPCore/Src/DspIntMultiplier.cpp b/Source/Core/DSPCore/Src/DspIntMultiplier.cpp
index dea651f1f6..9cdf0f06a0 100644
--- a/Source/Core/DSPCore/Src/DspIntMultiplier.cpp
+++ b/Source/Core/DSPCore/Src/DspIntMultiplier.cpp
@@ -32,15 +32,15 @@ inline s64 dsp_get_multiply_prod(u16 a, u16 b, u8 sign)
 {
 	s64 prod;
 
-	if ((sign == 1) && (g_dsp._r.sr & SR_MUL_UNSIGNED)) //unsigned
+	if ((sign == 1) && (g_dsp.r.sr & SR_MUL_UNSIGNED)) //unsigned
 		prod = (u32)(a * b);
-	else if ((sign == 2) && (g_dsp._r.sr & SR_MUL_UNSIGNED)) //mixed
+	else if ((sign == 2) && (g_dsp.r.sr & SR_MUL_UNSIGNED)) //mixed
 		prod = a * (s16)b;
 	else
 		prod = (s16)a * (s16)b; //signed
 
 	// Conditionally multiply by 2.
-	if ((g_dsp._r.sr & SR_MUL_MODIFY) == 0)
+	if ((g_dsp.r.sr & SR_MUL_MODIFY) == 0)
 		prod <<= 1;
 
 	return prod;
@@ -95,10 +95,10 @@ void clrp(const UDSPInstruction opc)
 {
 	zeroWriteBackLog();
 
-	g_dsp._r.prod.l = 0x0000;
-	g_dsp._r.prod.m = 0xfff0;
-	g_dsp._r.prod.h = 0x00ff;
-	g_dsp._r.prod.m2 = 0x0010;
+	g_dsp.r.prod.l = 0x0000;
+	g_dsp.r.prod.m = 0xfff0;
+	g_dsp.r.prod.h = 0x00ff;
+	g_dsp.r.prod.m2 = 0x0010;
 }
 
 // TSTPROD
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitArithmetic.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitArithmetic.cpp
index 04ac56390f..9e5be8f40d 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitArithmetic.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitArithmetic.cpp
@@ -93,17 +93,17 @@ void DSPEmitter::andcf(const UDSPInstruction opc)
 		get_acc_m(reg);
 //		Update_SR_LZ(((val & imm) == imm) ? true : false);
 //		if ((val & imm) == imm) 
-//			g_dsp._r.sr |= SR_LOGIC_ZERO; 
+//			g_dsp.r.sr |= SR_LOGIC_ZERO;
 //		else
-//			g_dsp._r.sr &= ~SR_LOGIC_ZERO;
+//			g_dsp.r.sr &= ~SR_LOGIC_ZERO;
 		AND(16, R(RAX), Imm16(imm));
 		CMP(16, R(RAX), Imm16(imm));
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
 		FixupBranch notLogicZero = J_CC(CC_NE);
-		OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_LOGIC_ZERO));
+		OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_LOGIC_ZERO));
 		FixupBranch exit = J();
 		SetJumpTarget(notLogicZero);
-		AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_LOGIC_ZERO));
+		AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_LOGIC_ZERO));
 		SetJumpTarget(exit);
 	}
 #else
@@ -131,16 +131,16 @@ void DSPEmitter::andf(const UDSPInstruction opc)
 		get_acc_m(reg);
 //		Update_SR_LZ(((val & imm) == 0) ? true : false);
 //		if ((val & imm) == 0) 
-//			g_dsp._r.sr |= SR_LOGIC_ZERO; 
+//			g_dsp.r.sr |= SR_LOGIC_ZERO;
 //		else
-//			g_dsp._r.sr &= ~SR_LOGIC_ZERO;
+//			g_dsp.r.sr &= ~SR_LOGIC_ZERO;
 		TEST(16, R(RAX), Imm16(imm));
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
 		FixupBranch notLogicZero = J_CC(CC_NE);
-		OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_LOGIC_ZERO));
+		OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_LOGIC_ZERO));
 		FixupBranch exit = J();
 		SetJumpTarget(notLogicZero);
-		AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_LOGIC_ZERO));
+		AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_LOGIC_ZERO));
 		SetJumpTarget(exit);
 	}
 #else
@@ -237,7 +237,7 @@ void DSPEmitter::cmpar(const UDSPInstruction opc)
 //		s64 sr = dsp_get_long_acc(sreg);
 		get_long_acc(sreg, RCX);
 		MOV(64, R(RAX), R(RCX));
-//		s64 rr = (s16)g_dsp._r.axh[rreg];
+//		s64 rr = (s16)g_dsp.r.axh[rreg];
 		get_ax_h(rreg, RDX);
 //		rr <<= 16;
 		SHL(64, R(RDX), Imm8(16));
@@ -326,11 +326,11 @@ void DSPEmitter::xorr(const UDSPInstruction opc)
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
-//	u16 accm = g_dsp._r.acm[dreg] ^ g_dsp._r.axh[sreg];
+//	u16 accm = g_dsp.r.acm[dreg] ^ g_dsp.r.axh[sreg];
 	get_acc_m(dreg, RAX);
 	get_ax_h(sreg, RDX);
 	XOR(64, R(RAX), R(RDX));
-//	g_dsp._r.acm[dreg] = accm;
+//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 //	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -355,11 +355,11 @@ void DSPEmitter::andr(const UDSPInstruction opc)
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
-	//	u16 accm = g_dsp._r.acm[dreg] & g_dsp._r.axh[sreg];
+	//	u16 accm = g_dsp.r.acm[dreg] & g_dsp.r.axh[sreg];
 	get_acc_m(dreg, RAX);
 	get_ax_h(sreg, RDX);
 	AND(64, R(RAX), R(RDX));
-	//	g_dsp._r.acm[dreg] = accm;
+	//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 	//	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -384,11 +384,11 @@ void DSPEmitter::orr(const UDSPInstruction opc)
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
-	//	u16 accm = g_dsp._r.acm[dreg] | g_dsp._r.axh[sreg];
+	//	u16 accm = g_dsp.r.acm[dreg] | g_dsp.r.axh[sreg];
 	get_acc_m(dreg, RAX);
 	get_ax_h(sreg, RDX);
 	OR(64, R(RAX), R(RDX));
-	//	g_dsp._r.acm[dreg] = accm;
+	//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 	//	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -412,11 +412,11 @@ void DSPEmitter::andc(const UDSPInstruction opc)
 {
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
-//	u16 accm = g_dsp._r.acm[dreg] & g_dsp._r.acm[1 - dreg];
+//	u16 accm = g_dsp.r.acm[dreg] & g_dsp.r.acm[1 - dreg];
 	get_acc_m(dreg, RAX);
 	get_acc_m(1 - dreg, RDX);
 	AND(64, R(RAX), R(RDX));
-	//	g_dsp._r.acm[dreg] = accm;
+	//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 	//	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -440,11 +440,11 @@ void DSPEmitter::orc(const UDSPInstruction opc)
 {
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
-	//	u16 accm = g_dsp._r.acm[dreg] | g_dsp._r.acm[1 - dreg];
+	//	u16 accm = g_dsp.r.acm[dreg] | g_dsp.r.acm[1 - dreg];
 	get_acc_m(dreg, RAX);
 	get_acc_m(1 - dreg, RDX);
 	OR(64, R(RAX), R(RDX));
-	//	g_dsp._r.acm[dreg] = accm;
+	//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 	//	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -467,11 +467,11 @@ void DSPEmitter::xorc(const UDSPInstruction opc)
 {
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
-	//	u16 accm = g_dsp._r.acm[dreg] ^ g_dsp._r.acm[1 - dreg];
+	//	u16 accm = g_dsp.r.acm[dreg] ^ g_dsp.r.acm[1 - dreg];
 	get_acc_m(dreg, RAX);
 	get_acc_m(1 - dreg, RDX);
 	XOR(64, R(RAX), R(RDX));
-	//	g_dsp._r.acm[dreg] = accm;
+	//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 	//	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -494,10 +494,10 @@ void DSPEmitter::notc(const UDSPInstruction opc)
 {
 #ifdef _M_X64
 	u8 dreg = (opc >> 8) & 0x1;
-//	u16 accm = g_dsp._r.acm[dreg] ^ 0xffff;
+//	u16 accm = g_dsp.r.acm[dreg] ^ 0xffff;
 	get_acc_m(dreg, RAX);
 	XOR(16, R(RAX), Imm16(0xffff));
-//	g_dsp._r.acm[dreg] = accm;
+//	g_dsp.r.acm[dreg] = accm;
 	set_acc_m(dreg);
 //	Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
@@ -523,11 +523,11 @@ void DSPEmitter::xori(const UDSPInstruction opc)
 	u8 reg  = (opc >> 8) & 0x1;
 //	u16 imm = dsp_fetch_code();
 	u16 imm = dsp_imem_read(compilePC+1);
-//	g_dsp._r.acm[reg] ^= imm;
+//	g_dsp.r.acm[reg] ^= imm;
 	get_acc_m(reg, RAX);
 	XOR(16, R(RAX), Imm16(imm));
 	set_acc_m(reg);
-//	Update_SR_Register16((s16)g_dsp._r.acm[reg], false, false, isOverS32(dsp_get_long_acc(reg)));
+//	Update_SR_Register16((s16)g_dsp.r.acm[reg], false, false, isOverS32(dsp_get_long_acc(reg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
 	{
 		get_long_acc(reg, RSI);
@@ -550,11 +550,11 @@ void DSPEmitter::andi(const UDSPInstruction opc)
 	u8 reg  = (opc >> 8) & 0x1;
 //	u16 imm = dsp_fetch_code();
 	u16 imm = dsp_imem_read(compilePC+1);
-//	g_dsp._r.acm[reg] &= imm;
+//	g_dsp.r.acm[reg] &= imm;
 	get_acc_m(reg, RAX);
 	AND(16, R(RAX), Imm16(imm));
 	set_acc_m(reg);
-//	Update_SR_Register16((s16)g_dsp._r.acm[reg], false, false, isOverS32(dsp_get_long_acc(reg)));
+//	Update_SR_Register16((s16)g_dsp.r.acm[reg], false, false, isOverS32(dsp_get_long_acc(reg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
 	{
 		get_long_acc(reg, RSI);
@@ -577,11 +577,11 @@ void DSPEmitter::ori(const UDSPInstruction opc)
 	u8 reg  = (opc >> 8) & 0x1;
 	//	u16 imm = dsp_fetch_code();
 	u16 imm = dsp_imem_read(compilePC+1);
-	//	g_dsp._r.acm[reg] |= imm;
+	//	g_dsp.r.acm[reg] |= imm;
 	get_acc_m(reg, RAX);
 	OR(16, R(RAX), Imm16(imm));
 	set_acc_m(reg);
-	//	Update_SR_Register16((s16)g_dsp._r.acm[reg], false, false, isOverS32(dsp_get_long_acc(reg)));
+	//	Update_SR_Register16((s16)g_dsp.r.acm[reg], false, false, isOverS32(dsp_get_long_acc(reg)));
 	if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) || (DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
 	{
 		get_long_acc(reg, RSI);
@@ -606,12 +606,12 @@ void DSPEmitter::addr(const UDSPInstruction opc)
 	u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0;
 	u16 *sregp = reg_ptr(sreg);
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 //	s64 acc = dsp_get_long_acc(dreg);
 	get_long_acc(dreg, RCX);
 	MOV(64, R(RAX), R(RCX));
 //	s64 ax = (s16)g_dsp.r[sreg];
-	MOVSX(64, 16, RDX, MDisp(R11, PtrOffset(sregp,&g_dsp._r)));
+	MOVSX(64, 16, RDX, MDisp(R11, PtrOffset(sregp,&g_dsp.r)));
 //	ax <<= 16;
 	SHL(64, R(RDX), Imm8(16));
 //	s64 res = acc + ax;
@@ -941,8 +941,8 @@ void DSPEmitter::subr(const UDSPInstruction opc)
 	get_long_acc(dreg, RCX);
 	MOV(64, R(RAX), R(RCX));
 //	s64 ax = (s16)g_dsp.r[sreg];
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, RDX, MDisp(R11, PtrOffset(sregp,&g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, RDX, MDisp(R11, PtrOffset(sregp,&g_dsp.r)));
 //	ax <<= 16;
 	SHL(64, R(RDX), Imm8(16));
 //	s64 res = acc - ax;
@@ -1212,9 +1212,9 @@ void DSPEmitter::movr(const UDSPInstruction opc)
 	u8 sreg = ((opc >> 9) & 0x3) + DSP_REG_AXL0;
 	u16 *sregp = reg_ptr(sreg);
 
-//	s64 acc = (s16)g_dsp._r[sreg];
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, RAX, MDisp(R11, PtrOffset(sregp,&g_dsp._r)));
+//	s64 acc = (s16)g_dsp.r[sreg];
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, RAX, MDisp(R11, PtrOffset(sregp,&g_dsp.r)));
 //	acc <<= 16;
 	SHL(64, R(RAX), Imm8(16));
 //	acc &= ~0xffff;
@@ -1618,7 +1618,7 @@ void DSPEmitter::lsrnrx(const UDSPInstruction opc)
 	u8 sreg = (opc >> 9) & 0x1;
 
 //	s16 shift;
-//	u16 axh = g_dsp._r.axh[sreg];
+//	u16 axh = g_dsp.r.axh[sreg];
 	get_ax_h(sreg);
 //	u64 acc = dsp_get_long_acc(dreg);
 	get_long_acc(dreg, RDX);
@@ -1682,7 +1682,7 @@ void DSPEmitter::asrnrx(const UDSPInstruction opc)
 	u8 sreg = (opc >> 9) & 0x1;
 
 //	s16 shift;
-//	u16 axh = g_dsp._r.axh[sreg];
+//	u16 axh = g_dsp.r.axh[sreg];
 	get_ax_h(sreg);
 //	s64 acc = dsp_get_long_acc(dreg);
 	get_long_acc(dreg, RDX);
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitBranch.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitBranch.cpp
index 14fc9f025a..dbc9e34dfa 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitBranch.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitBranch.cpp
@@ -44,9 +44,9 @@ const u8* CheckCondition(DSPEmitter& emitter, u8 cond, u8 skipCodeSize)
 	//emitter.INT3();
 	FixupBranch skipCode2;
 #ifdef _M_IX86 // All32
-	emitter.MOV(16, R(EAX), M(&g_dsp._r.sr));
+	emitter.MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-	emitter.MOV(64, R(RAX), ImmPtr(&g_dsp._r.sr));
+	emitter.MOV(64, R(RAX), ImmPtr(&g_dsp.r.sr));
 	emitter.MOV(16, R(EAX), MatR(RAX));
 #endif
 	switch(cond)
@@ -69,9 +69,9 @@ const u8* CheckCondition(DSPEmitter& emitter, u8 cond, u8 skipCodeSize)
 		skipCode2 = emitter.J_CC(CC_NE);
 		//skipCode2 = emitter.J_CC((CCFlags)(CC_NE - (cond & 1)));
 #ifdef _M_IX86 // All32
-		emitter.MOV(16, R(EAX), M(&g_dsp._r.sr));
+		emitter.MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		emitter.MOV(64, R(RAX), ImmPtr(&g_dsp._r.sr));
+		emitter.MOV(64, R(RAX), ImmPtr(&g_dsp.r.sr));
 		emitter.MOV(16, R(EAX), MatR(RAX));
 #endif
 		emitter.TEST(16, R(EAX), Imm16(SR_ARITH_ZERO));
@@ -425,10 +425,10 @@ void DSPEmitter::rti(const UDSPInstruction opc)
 //	g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
 	dsp_reg_load_stack(DSP_STACK_D);
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.sr), R(DX));
+	MOV(16, M(&g_dsp.r.sr), R(DX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, sr)), R(DX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, sr)), R(DX));
 #endif
 //	g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
 	dsp_reg_load_stack(DSP_STACK_C);
@@ -470,12 +470,12 @@ void DSPEmitter::halt(const UDSPInstruction opc)
 void DSPEmitter::HandleLoop()
 {
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.st[2]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.st[3]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.st[2]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.st[3]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[2])));
-	MOVZX(32, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[3])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[2])));
+	MOVZX(32, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[3])));
 #endif
 
 	CMP(32, R(RCX), Imm32(0));
@@ -484,19 +484,19 @@ void DSPEmitter::HandleLoop()
 	FixupBranch rLoopAddrG = J_CC(CC_NE, true);
 
 #ifdef _M_IX86 // All32
-	SUB(16, M(&(g_dsp._r.st[3])), Imm16(1));
-	CMP(16, M(&(g_dsp._r.st[3])), Imm16(0));
+	SUB(16, M(&(g_dsp.r.st[3])), Imm16(1));
+	CMP(16, M(&(g_dsp.r.st[3])), Imm16(0));
 #else
-	SUB(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[3])), Imm16(1));
-	CMP(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[3])), Imm16(0));
+	SUB(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[3])), Imm16(1));
+	CMP(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[3])), Imm16(0));
 #endif
 	
 	FixupBranch loadStack = J_CC(CC_LE, true);
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&(g_dsp._r.st[0])));
+	MOVZX(32, 16, ECX, M(&(g_dsp.r.st[0])));
 	MOV(16, M(&g_dsp.pc), R(RCX));
 #else
-	MOVZX(32, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[0])));
+	MOVZX(32, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[0])));
 	MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
 	MOV(16, MatR(RAX), R(RCX));
 #endif
@@ -529,8 +529,8 @@ void DSPEmitter::loop(const UDSPInstruction opc)
 #ifdef _M_IX86 // All32
 	MOVZX(32, 16, EDX, M(regp));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(32, 16, EDX, MDisp(R11,PtrOffset(regp, &g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(32, 16, EDX, MDisp(R11,PtrOffset(regp, &g_dsp.r)));
 #endif
 	u16 loop_pc = compilePC + 1;
 
@@ -600,8 +600,8 @@ void DSPEmitter::bloop(const UDSPInstruction opc)
 #ifdef _M_IX86 // All32
 	MOVZX(32, 16, EDX, M(regp));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(32, 16, EDX, MDisp(R11,PtrOffset(regp, &g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(32, 16, EDX, MDisp(R11,PtrOffset(regp, &g_dsp.r)));
 #endif
 	u16 loop_pc = dsp_imem_read(compilePC + 1);
 
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitCCUtil.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitCCUtil.cpp
index 652beb8afc..196fdb198c 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitCCUtil.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitCCUtil.cpp
@@ -36,14 +36,14 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val)
 	//	if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
 	CMP(64, R(val), Imm8(0));
 	FixupBranch notZero = J_CC(CC_NZ);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_ARITH_ZERO));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_ARITH_ZERO));
 	SetJumpTarget(notZero);
 
 	//	// 0x08
 	//	if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN;
 	CMP(64, R(val), Imm8(0));
 	FixupBranch greaterThanEqual = J_CC(CC_GE);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_SIGN));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_SIGN));
 	SetJumpTarget(greaterThanEqual);
 
 	//	// 0x10
@@ -51,7 +51,7 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val)
 	MOVSX(64, 32, RDX, R(val));
 	CMP(64, R(RDX), R(val));
 	FixupBranch noOverS32 = J_CC(CC_E);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_OVER_S32));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_OVER_S32));
 	SetJumpTarget(noOverS32);
 
 	//	// 0x20 - Checks if top bits of m are equal
@@ -63,7 +63,7 @@ void DSPEmitter::Update_SR_Register(Gen::X64Reg val)
 	FixupBranch cC = J_CC(CC_NE);
 	SetJumpTarget(zeroC);
 	//		g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_TOP2BITS));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_TOP2BITS));
 	SetJumpTarget(cC);
 #endif
 }
@@ -75,7 +75,7 @@ void DSPEmitter::Update_SR_Register64(Gen::X64Reg val)
 {
 #ifdef _M_X64
 //	g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
-	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_CMP_MASK));
+	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_CMP_MASK));
 	Update_SR_Register(val);
 #endif
 }
@@ -87,7 +87,7 @@ void DSPEmitter::Update_SR_Register64_Carry(Gen::X64Reg val)
 {	
 #ifdef _M_X64
 	//	g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
-	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_CMP_MASK));
+	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_CMP_MASK));
 
 	CMP(64, R(RCX), R(val));
 
@@ -95,7 +95,7 @@ void DSPEmitter::Update_SR_Register64_Carry(Gen::X64Reg val)
 	//	g_dsp.r[DSP_REG_SR] |= SR_CARRY;
 	// Carry = (acc>res)
 	FixupBranch noCarry = J_CC(CC_BE);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_CARRY));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_CARRY));
 	SetJumpTarget(noCarry);
 
 	// 0x02 and 0x80
@@ -107,7 +107,7 @@ void DSPEmitter::Update_SR_Register64_Carry(Gen::X64Reg val)
 	AND(64, R(RCX), R(RDX));
 	CMP(64, R(RCX), Imm8(0));
 	FixupBranch noOverflow = J_CC(CC_GE);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY));
 	SetJumpTarget(noOverflow);
 
 	Update_SR_Register(val);
@@ -121,7 +121,7 @@ void DSPEmitter::Update_SR_Register64_Carry2(Gen::X64Reg val)
 {
 #ifdef _M_X64
 	//	g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
-	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_CMP_MASK));
+	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_CMP_MASK));
 
 	CMP(64, R(RCX), R(val));
 
@@ -129,7 +129,7 @@ void DSPEmitter::Update_SR_Register64_Carry2(Gen::X64Reg val)
 	//	g_dsp.r[DSP_REG_SR] |= SR_CARRY;
 	// Carry2 = (acc>=res)
 	FixupBranch noCarry2 = J_CC(CC_B);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_CARRY));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_CARRY));
 	SetJumpTarget(noCarry2);
 
 	// 0x02 and 0x80
@@ -141,7 +141,7 @@ void DSPEmitter::Update_SR_Register64_Carry2(Gen::X64Reg val)
 	AND(64, R(RCX), R(RDX));
 	CMP(64, R(RCX), Imm8(0));
 	FixupBranch noOverflow = J_CC(CC_GE);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_OVERFLOW | SR_OVERFLOW_STICKY));
 	SetJumpTarget(noOverflow);
 
 	Update_SR_Register();
@@ -164,20 +164,20 @@ void DSPEmitter::Update_SR_Register64_Carry2(Gen::X64Reg val)
 void DSPEmitter::Update_SR_Register16(Gen::X64Reg val)
 {
 #ifdef _M_X64
-	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_CMP_MASK));
+	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_CMP_MASK));
 
 	//	// 0x04
 	//	if (_Value == 0) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
 	CMP(64, R(val), Imm8(0));
 	FixupBranch notZero = J_CC(CC_NZ);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_ARITH_ZERO));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_ARITH_ZERO));
 	SetJumpTarget(notZero);
 
 	//	// 0x08
 	//	if (_Value < 0) g_dsp.r[DSP_REG_SR] |= SR_SIGN;
 	CMP(64, R(val), Imm8(0));
 	FixupBranch greaterThanEqual = J_CC(CC_GE);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_SIGN));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_SIGN));
 	SetJumpTarget(greaterThanEqual);
 
 	//	// 0x20 - Checks if top bits of m are equal
@@ -186,13 +186,13 @@ void DSPEmitter::Update_SR_Register16(Gen::X64Reg val)
 	SHR(16, R(val), Imm8(14));
 	CMP(16, R(val), Imm16(0));
 	FixupBranch nZero = J_CC(CC_NE);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_TOP2BITS));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_TOP2BITS));
 	FixupBranch cC = J();
 	SetJumpTarget(nZero);
 	CMP(16, R(val), Imm16(3));
 	FixupBranch notThree = J_CC(CC_NE);
 	//		g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_TOP2BITS));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_TOP2BITS));
 	SetJumpTarget(notThree);
 	SetJumpTarget(cC);
 #endif
@@ -204,14 +204,14 @@ void DSPEmitter::Update_SR_Register16(Gen::X64Reg val)
 void DSPEmitter::Update_SR_Register16_OverS32(Gen::X64Reg val)
 {
 #ifdef _M_X64
-	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~SR_CMP_MASK));
+	AND(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~SR_CMP_MASK));
 
 	//	// 0x10
 	//	if (_Value != (s32)_Value) g_dsp.r[DSP_REG_SR] |= SR_OVER_S32;
 	MOVSX(64, 32, RSI, R(val));
 	CMP(64, R(RSI), R(val));
 	FixupBranch noOverS32 = J_CC(CC_E);
-	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_OVER_S32));
+	OR(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_OVER_S32));
 	SetJumpTarget(noOverS32);
 
 	//	// 0x20 - Checks if top bits of m are equal
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
index 898d19997d..57197896de 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
@@ -83,21 +83,24 @@ void DSPEmitter::s(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
+		break;
+	default:
+		sregp = NULL;
 		break;
 	}
 	//	u16 addr = g_dsp.r[dest];
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 	MOVZX(32, 16, ECX, M(sregp));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp, &g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp, &g_dsp.r)));
 #endif
 	//	u16 val = g_dsp.r[src];
 	dmem_write();
@@ -116,20 +119,23 @@ void DSPEmitter::sn(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
+		break;
+	default:
+		sregp = NULL;
 		break;
 	}
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 	MOVZX(32, 16, ECX, M(sregp));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp,&g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp,&g_dsp.r)));
 #endif
 	dmem_write();
 	increase_addr_reg(dreg);
@@ -152,9 +158,9 @@ void DSPEmitter::l(const UDSPInstruction opc)
 		//store (up to) two registers in EBX,
 		//so store all of SR
 #ifdef _M_IX86 // All32
-		MOV(16, R(EAX), M(&g_dsp._r.sr));
+		MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r.sr));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r.sr));
 		MOV(16, R(EAX), MatR(R11));
 #endif
 		SHL(32, R(EAX), Imm8(16));
@@ -181,9 +187,9 @@ void DSPEmitter::ln(const UDSPInstruction opc)
 		//store (up to) two registers in EBX,
 		//so store all of SR
 #ifdef _M_IX86 // All32
-		MOV(16, R(EAX), M(&g_dsp._r.sr));
+		MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r.sr));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r.sr));
 		MOV(16, R(EAX), MatR(R11));
 #endif
 		SHL(32, R(EAX), Imm8(16));
@@ -203,12 +209,12 @@ void DSPEmitter::ls(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -230,12 +236,12 @@ void DSPEmitter::lsn(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -256,12 +262,12 @@ void DSPEmitter::lsm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -283,12 +289,12 @@ void DSPEmitter::lsnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -308,12 +314,12 @@ void DSPEmitter::sl(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -334,12 +340,12 @@ void DSPEmitter::sln(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -360,12 +366,12 @@ void DSPEmitter::slm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -386,12 +392,12 @@ void DSPEmitter::slnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -422,12 +428,12 @@ void DSPEmitter::ld(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -446,12 +452,12 @@ void DSPEmitter::ld(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -482,12 +488,12 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -505,12 +511,12 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -541,12 +547,12 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -564,12 +570,12 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -600,12 +606,12 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -623,12 +629,12 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -654,8 +660,8 @@ void DSPEmitter::pushExtValueFromReg(u16 dreg, u16 sreg) {
 #ifdef _M_IX86 // All32
 	MOVZX(32, 16, EBX, M(sregp));
 #else
-	MOV(64, R(RBX), ImmPtr(&g_dsp._r));
-	MOVZX(32, 16, EBX, MDisp(RBX,PtrOffset(sregp,&g_dsp._r)));
+	MOV(64, R(RBX), ImmPtr(&g_dsp.r));
+	MOVZX(32, 16, EBX, MDisp(RBX,PtrOffset(sregp,&g_dsp.r)));
 #endif
 	storeIndex = dreg;
 }
@@ -663,10 +669,10 @@ void DSPEmitter::pushExtValueFromReg(u16 dreg, u16 sreg) {
 void DSPEmitter::pushExtValueFromMem(u16 dreg, u16 sreg) {
 	//	u16 addr = g_dsp.r[addr];
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[sreg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[sreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
 #endif
 	dmem_read();
 	MOVZX(32, 16, EBX, R(EAX));
@@ -677,10 +683,10 @@ void DSPEmitter::pushExtValueFromMem(u16 dreg, u16 sreg) {
 void DSPEmitter::pushExtValueFromMem2(u16 dreg, u16 sreg) {
 	//	u16 addr = g_dsp.r[addr];
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[sreg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[sreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
 #endif
 	dmem_read();
 	SHL(32,R(EAX),Imm8(16));
@@ -702,8 +708,8 @@ void DSPEmitter::popExtValueToReg() {
 #ifdef _M_IX86 // All32
 		MOV(16, M(dregp), R(EBX));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,PtrOffset(dregp,&g_dsp._r)), R(EBX));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,PtrOffset(dregp,&g_dsp.r)), R(EBX));
 #endif
 		if (storeIndex  >= DSP_REG_ACM0 && storeIndex2 == -1) {
 			TEST(32, R(EBX), Imm32(SR_40_MODE_BIT << 16));
@@ -717,13 +723,13 @@ void DSPEmitter::popExtValueToReg() {
 			//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACH0] = (val & 0x8000) ? 0xFFFF : 0x0000;
 			//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACL0] = 0;
 #ifdef _M_IX86 // All32
-			MOV(16,M(&g_dsp._r.ac[storeIndex - DSP_REG_ACM0].h),
+			MOV(16,M(&g_dsp.r.ac[storeIndex - DSP_REG_ACM0].h),
 			    R(EAX));
-			MOV(16,M(&g_dsp._r.ac[storeIndex - DSP_REG_ACM0].l),
+			MOV(16,M(&g_dsp.r.ac[storeIndex - DSP_REG_ACM0].l),
 			    Imm16(0));
 #else
-			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[storeIndex - DSP_REG_ACM0].h)), R(EAX));
-			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[storeIndex - DSP_REG_ACM0].l)), Imm16(0));
+			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[storeIndex - DSP_REG_ACM0].h)), R(EAX));
+			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[storeIndex - DSP_REG_ACM0].l)), Imm16(0));
 #endif
 			//}
 			SetJumpTarget(not_40bit);
@@ -738,8 +744,8 @@ void DSPEmitter::popExtValueToReg() {
 #ifdef _M_IX86 // All32
 		MOV(16, M(dregp), R(EBX));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,PtrOffset(dregp, &g_dsp._r)), R(EBX));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,PtrOffset(dregp, &g_dsp.r)), R(EBX));
 #endif
 	}
 	storeIndex2 = -1;
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitLoadStore.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitLoadStore.cpp
index 76bc54fd0b..60ffdd0726 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitLoadStore.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitLoadStore.cpp
@@ -35,14 +35,14 @@ void DSPEmitter::srs(const UDSPInstruction opc)
 {
 	u8 reg   = ((opc >> 8) & 0x7) + 0x18;
 	u16 *regp = reg_ptr(reg);
-	//u16 addr = (g_dsp._r.cr << 8) | (opc & 0xFF);
+	//u16 addr = (g_dsp.r.cr << 8) | (opc & 0xFF);
 #ifdef _M_IX86 // All32
 	MOVZX(32, 16, ECX, M(regp));
-	MOVZX(32, 8, EAX, M(&g_dsp._r.cr));
+	MOVZX(32, 8, EAX, M(&g_dsp.r.cr));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RCX, MDisp(R11,PtrOffset(regp,&g_dsp._r)));
-	MOVZX(64, 8, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, cr)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RCX, MDisp(R11,PtrOffset(regp,&g_dsp.r)));
+	MOVZX(64, 8, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, cr)));
 #endif
 	SHL(16, R(EAX), Imm8(8));
 	OR(8, R(EAX), Imm8(opc & 0xFF));
@@ -60,19 +60,19 @@ void DSPEmitter::lrs(const UDSPInstruction opc)
 	u16 *regp = reg_ptr(reg);
 	//u16 addr = (g_dsp.r[DSP_REG_CR] << 8) | (opc & 0xFF);
 #ifdef _M_IX86 // All32
-	MOVZX(32, 8, ECX, M(&g_dsp._r.cr));
+	MOVZX(32, 8, ECX, M(&g_dsp.r.cr));
 	SHL(16, R(ECX), Imm8(8));
 	OR(8, R(ECX), Imm8(opc & 0xFF));
 	dmem_read();
 	MOV(16, M(regp), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 8, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, cr)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 8, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, cr)));
 	SHL(16, R(ECX), Imm8(8));
 	OR(8, R(ECX), Imm8(opc & 0xFF));
 	dmem_read();
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,PtrOffset(regp, &g_dsp._r)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,PtrOffset(regp, &g_dsp.r)), R(RAX));
 #endif
 	dsp_conditional_extend_accum(reg);
 }
@@ -195,10 +195,10 @@ void DSPEmitter::srr(const UDSPInstruction opc)
 
 	dsp_op_read_reg(sreg, ECX);
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
 #endif
 	dmem_write();
 }
@@ -215,10 +215,10 @@ void DSPEmitter::srrd(const UDSPInstruction opc)
 
 	dsp_op_read_reg(sreg, ECX);
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
 #endif
 	dmem_write();
 	decrement_addr_reg(dreg);
@@ -236,10 +236,10 @@ void DSPEmitter::srri(const UDSPInstruction opc)
 
 	dsp_op_read_reg(sreg, ECX);
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
 #endif
 	dmem_write();
 	increment_addr_reg(dreg);
@@ -257,10 +257,10 @@ void DSPEmitter::srrn(const UDSPInstruction opc)
 
 	dsp_op_read_reg(sreg, ECX);
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
 #endif
 	dmem_write();
 	increase_addr_reg(dreg);
@@ -276,17 +276,17 @@ void DSPEmitter::ilrr(const UDSPInstruction opc)
 	u16 dreg = (opc >> 8) & 1;
 
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[reg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
 #endif
 	imem_read();
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ac[dreg].m), R(EAX));
+	MOV(16, M(&g_dsp.r.ac[dreg].m), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[dreg].m)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[dreg].m)), R(RAX));
 #endif
 	dsp_conditional_extend_accum(dreg);
 }
@@ -301,17 +301,17 @@ void DSPEmitter::ilrrd(const UDSPInstruction opc)
 	u16 dreg = (opc >> 8) & 1;
 
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[reg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
 #endif
 	imem_read();
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ac[dreg].m), R(EAX));
+	MOV(16, M(&g_dsp.r.ac[dreg].m), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[dreg].m)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[dreg].m)), R(RAX));
 #endif
 	dsp_conditional_extend_accum(dreg);
 	decrement_addr_reg(reg);
@@ -327,17 +327,17 @@ void DSPEmitter::ilrri(const UDSPInstruction opc)
 	u16 dreg = (opc >> 8) & 1;
 
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[reg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
 #endif
 	imem_read();
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ac[dreg].m), R(EAX));
+	MOV(16, M(&g_dsp.r.ac[dreg].m), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[dreg].m)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[dreg].m)), R(RAX));
 #endif
 	dsp_conditional_extend_accum(dreg);
 	increment_addr_reg(reg);
@@ -354,17 +354,17 @@ void DSPEmitter::ilrrn(const UDSPInstruction opc)
 	u16 dreg = (opc >> 8) & 1;
 
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[reg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, RCX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
 #endif
 	imem_read();
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ac[dreg].m), R(EAX));
+	MOV(16, M(&g_dsp.r.ac[dreg].m), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[dreg].m)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[dreg].m)), R(RAX));
 #endif
 	dsp_conditional_extend_accum(dreg);
 	increase_addr_reg(reg);
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitMisc.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitMisc.cpp
index 4eaf0d7cbf..c0a64367f3 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitMisc.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitMisc.cpp
@@ -48,12 +48,12 @@ void DSPEmitter::dsp_reg_stack_push(int stack_reg)
 
 	//g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp.r[DSP_REG_ST0 + stack_reg];
 #ifdef _M_IX86 // All32
-	MOV(16, R(CX), M(&g_dsp._r.st[stack_reg]));
+	MOV(16, R(CX), M(&g_dsp.r.st[stack_reg]));
 	MOVZX(32, 8, EAX, R(AL));
 	MOV(16, MComplex(EAX,EAX,1,(u32)&g_dsp.reg_stack[stack_reg][0]), R(CX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, R(CX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[stack_reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, R(CX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[stack_reg])));
 	MOVZX(64, 8, RAX, R(AL));
 	MOV(64, R(R10), ImmPtr(&g_dsp.reg_stack[stack_reg][0]));
 	MOV(16, MComplex(R10,RAX,2,0), R(CX));
@@ -77,13 +77,13 @@ void DSPEmitter::dsp_reg_stack_pop(int stack_reg)
 #ifdef _M_IX86 // All32
 	MOVZX(32, 8, EAX, R(AL));
 	MOV(16, R(CX), MComplex(EAX,EAX,1,(u32)&g_dsp.reg_stack[stack_reg][0]));
-	MOV(16, M(&g_dsp._r.st[stack_reg]), R(CX));
+	MOV(16, M(&g_dsp.r.st[stack_reg]), R(CX));
 #else
 	MOVZX(64, 8, RAX, R(AL));
 	MOV(64, R(R10), ImmPtr(&g_dsp.reg_stack[stack_reg][0]));
 	MOV(16, R(CX), MComplex(R10,RAX,2,0));
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[stack_reg])), R(CX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[stack_reg])), R(CX));
 #endif
 
 	//g_dsp.reg_stack_ptr[stack_reg]--;
@@ -107,10 +107,10 @@ void DSPEmitter::dsp_reg_store_stack(int stack_reg, Gen::X64Reg host_sreg)
 	dsp_reg_stack_push(stack_reg);
 	//g_dsp.r[DSP_REG_ST0 + stack_reg] = val;
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.st[stack_reg]), R(EDX));
+	MOV(16, M(&g_dsp.r.st[stack_reg]), R(EDX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[stack_reg])), R(EDX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[stack_reg])), R(EDX));
 #endif
 }
 
@@ -118,10 +118,10 @@ void DSPEmitter::dsp_reg_load_stack(int stack_reg, Gen::X64Reg host_dreg)
 {
 	//u16 val = g_dsp.r[DSP_REG_ST0 + stack_reg];
 #ifdef _M_IX86 // All32
-	MOV(16, R(EDX), M(&g_dsp._r.st[stack_reg]));
+	MOV(16, R(EDX), M(&g_dsp.r.st[stack_reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, R(EDX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[stack_reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, R(EDX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[stack_reg])));
 #endif
 	dsp_reg_stack_pop(stack_reg);
 	if (host_dreg != EDX) {
@@ -134,10 +134,10 @@ void DSPEmitter::dsp_reg_store_stack_imm(int stack_reg, u16 val)
 	dsp_reg_stack_push(stack_reg);
 	//g_dsp.r[DSP_REG_ST0 + stack_reg] = val;
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.st[stack_reg]), Imm16(val));
+	MOV(16, M(&g_dsp.r.st[stack_reg]), Imm16(val));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, st[stack_reg])), Imm16(val));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, st[stack_reg])), Imm16(val));
 #endif
 }
 
@@ -150,10 +150,10 @@ void DSPEmitter::dsp_op_write_reg(int reg, Gen::X64Reg host_sreg)
 		// sign extend from the bottom 8 bits.
 		MOVSX(16,8,host_sreg,R(host_sreg));
 #ifdef _M_IX86 // All32
-		MOV(16, M(&g_dsp._r.ac[reg-DSP_REG_ACH0].h), R(host_sreg));
+		MOV(16, M(&g_dsp.r.ac[reg-DSP_REG_ACH0].h), R(host_sreg));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACH0].h)), R(host_sreg));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACH0].h)), R(host_sreg));
 #endif
 		break;
 
@@ -171,8 +171,8 @@ void DSPEmitter::dsp_op_write_reg(int reg, Gen::X64Reg host_sreg)
 #ifdef _M_IX86 // All32
 		MOV(16, M(regp), R(host_sreg));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,PtrOffset(regp,&g_dsp._r)), R(host_sreg));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,PtrOffset(regp,&g_dsp.r)), R(host_sreg));
 #endif
 		break;
 	}
@@ -187,10 +187,10 @@ void DSPEmitter::dsp_op_write_reg_imm(int reg, u16 val)
 	case DSP_REG_ACH1:
 		// sign extend from the bottom 8 bits.
 #ifdef _M_IX86 // All32
-		MOV(16, M(&g_dsp._r.ac[reg-DSP_REG_ACH0].h), Imm16((u16)(s16)(s8)(u8)val));
+		MOV(16, M(&g_dsp.r.ac[reg-DSP_REG_ACH0].h), Imm16((u16)(s16)(s8)(u8)val));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACH0].h)), Imm16((u16)(s16)(s8)(u8)val));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACH0].h)), Imm16((u16)(s16)(s8)(u8)val));
 #endif
 		break;
 
@@ -208,8 +208,8 @@ void DSPEmitter::dsp_op_write_reg_imm(int reg, u16 val)
 #ifdef _M_IX86 // All32
 		MOV(16, M(regp), Imm16(val));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,PtrOffset(regp,&g_dsp._r)), Imm16(val));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,PtrOffset(regp,&g_dsp.r)), Imm16(val));
 #endif
 		break;
 	}
@@ -224,10 +224,10 @@ void DSPEmitter::dsp_conditional_extend_accum(int reg)
 	case DSP_REG_ACM1:
 	{
 #ifdef _M_IX86 // All32
-		MOV(16, R(EAX), M(&g_dsp._r.sr));
+		MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(EAX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, sr)));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(EAX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, sr)));
 #endif
 		TEST(16, R(EAX), Imm16(SR_40_MODE_BIT));
 		FixupBranch not_40bit = J_CC(CC_Z);
@@ -236,21 +236,21 @@ void DSPEmitter::dsp_conditional_extend_accum(int reg)
 		// Sign extend into whole accum.
 		//u16 val = g_dsp.r[reg];
 #ifdef _M_IX86 // All32
-		MOVSX(32, 16, EAX, M(&g_dsp._r.ac[reg-DSP_REG_ACM0].m));
+		MOVSX(32, 16, EAX, M(&g_dsp.r.ac[reg-DSP_REG_ACM0].m));
 #else
-		MOVSX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACM0].m)));
+		MOVSX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACM0].m)));
 #endif
 		SHR(32,R(EAX),Imm8(16));
 		//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACH0] = (val & 0x8000) ? 0xFFFF : 0x0000;
 		//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACL0] = 0;
 #ifdef _M_IX86 // All32
-		MOV(16,M(&g_dsp._r.ac[reg - DSP_REG_ACM0].h),
+		MOV(16,M(&g_dsp.r.ac[reg - DSP_REG_ACM0].h),
 		    R(EAX));
-		MOV(16,M(&g_dsp._r.ac[reg - DSP_REG_ACM0].l),
+		MOV(16,M(&g_dsp.r.ac[reg - DSP_REG_ACM0].l),
 		    Imm16(0));
 #else
-		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACM0].h)), R(EAX));
-		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACM0].l)), Imm16(0));
+		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACM0].h)), R(EAX));
+		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACM0].l)), Imm16(0));
 #endif
 		//}
 		SetJumpTarget(not_40bit);
@@ -266,10 +266,10 @@ void DSPEmitter::dsp_conditional_extend_accum_imm(int reg, u16 val)
 	case DSP_REG_ACM1:
 	{
 #ifdef _M_IX86 // All32
-		MOV(16, R(EAX), M(&g_dsp._r.sr));
+		MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(EAX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, sr)));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(EAX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, sr)));
 #endif
 		TEST(16, R(EAX), Imm16(SR_40_MODE_BIT));
 		FixupBranch not_40bit = J_CC(CC_Z);
@@ -279,14 +279,14 @@ void DSPEmitter::dsp_conditional_extend_accum_imm(int reg, u16 val)
 		//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACH0] = (val & 0x8000) ? 0xFFFF : 0x0000;
 		//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACL0] = 0;
 #ifdef _M_IX86 // All32
-		MOV(16,M(&g_dsp._r.ac[reg - DSP_REG_ACM0].h),
+		MOV(16,M(&g_dsp.r.ac[reg - DSP_REG_ACM0].h),
 		    Imm16((val & 0x8000)?0xffff:0x0000));
-		MOV(16,M(&g_dsp._r.ac[reg - DSP_REG_ACM0].l),
+		MOV(16,M(&g_dsp.r.ac[reg - DSP_REG_ACM0].l),
 		    Imm16(0));
 #else
-		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACM0].h)),
+		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACM0].h)),
 		    Imm16((val & 0x8000)?0xffff:0x0000));
-		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[reg-DSP_REG_ACM0].l)),
+		MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[reg-DSP_REG_ACM0].l)),
 		    Imm16(0));
 #endif
 		//}
@@ -310,8 +310,8 @@ void DSPEmitter::dsp_op_read_reg(int reg, Gen::X64Reg host_dreg)
 #ifdef _M_IX86 // All32
 		MOV(16, R(host_dreg), M(regp));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(host_dreg), MDisp(R11,PtrOffset(regp,&g_dsp._r)));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(host_dreg), MDisp(R11,PtrOffset(regp,&g_dsp.r)));
 #endif
 	}
 	}
@@ -425,10 +425,10 @@ void DSPEmitter::setCompileSR(u16 bit) {
 	
 	//	g_dsp.r[DSP_REG_SR] |= bit
 #ifdef _M_IX86 // All32
-	OR(16, M(&g_dsp._r.sr), Imm16(bit));
+	OR(16, M(&g_dsp.r.sr), Imm16(bit));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	OR(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, sr)), Imm16(bit));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	OR(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, sr)), Imm16(bit));
 #endif
 
 	compileSR |= bit;
@@ -438,10 +438,10 @@ void DSPEmitter::clrCompileSR(u16 bit) {
 	
 	//	g_dsp.r[DSP_REG_SR] &= bit
 #ifdef _M_IX86 // All32
-	AND(16, M(&g_dsp._r.sr), Imm16(~bit));
+	AND(16, M(&g_dsp.r.sr), Imm16(~bit));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	AND(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, sr)), Imm16(~bit));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	AND(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, sr)), Imm16(~bit));
 #endif
 
 	compileSR  &= ~bit;
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitMultiplier.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitMultiplier.cpp
index 78501589f5..c1a43181ce 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitMultiplier.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitMultiplier.cpp
@@ -38,8 +38,8 @@ void DSPEmitter::multiply()
 	IMUL(64, R(ESI));
 
 //	Conditionally multiply by 2.
-//	if ((g_dsp._r.sr & SR_MUL_MODIFY) == 0)
-	TEST(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_MUL_MODIFY));
+//	if ((g_dsp.r.sr & SR_MUL_MODIFY) == 0)
+	TEST(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_MUL_MODIFY));
 	FixupBranch noMult2 = J_CC(CC_NZ);
 //		prod <<= 1;
 	SHL(64, R(EAX), Imm8(1));
@@ -90,8 +90,8 @@ void DSPEmitter::multiply_mulx(u8 axh0, u8 axh1)
 //		result = dsp_multiply(val1, val2, 0); // unsigned support OFF if both ax?.h regs are used
 
 
-//	if ((sign == 1) && (g_dsp._r.sr & SR_MUL_UNSIGNED)) //unsigned
-	TEST(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_MUL_UNSIGNED));
+//	if ((sign == 1) && (g_dsp.r.sr & SR_MUL_UNSIGNED)) //unsigned
+	TEST(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_MUL_UNSIGNED));
 	FixupBranch unsignedMul = J_CC(CC_NZ);
 	//		prod = (s16)a * (s16)b; //signed
 	MOVSX(64, 16, RAX, R(RDI));
@@ -132,8 +132,8 @@ void DSPEmitter::multiply_mulx(u8 axh0, u8 axh1)
 	SetJumpTarget(signedMul);
 
 	//	Conditionally multiply by 2.
-//	if ((g_dsp._r.sr & SR_MUL_MODIFY) == 0)
-	TEST(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, sr)), Imm16(SR_MUL_MODIFY));
+//	if ((g_dsp.r.sr & SR_MUL_MODIFY) == 0)
+	TEST(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, sr)), Imm16(SR_MUL_MODIFY));
 	FixupBranch noMult2 = J_CC(CC_NZ);
 //		prod <<= 1;
 	SHL(64, R(RAX), Imm8(1));
@@ -156,14 +156,14 @@ void DSPEmitter::clrp(const UDSPInstruction opc)
 {
 #ifdef _M_X64
 //	g_dsp.r[DSP_REG_PRODL] = 0x0000;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.l)), Imm16(0x0000));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.l)), Imm16(0x0000));
 //	g_dsp.r[DSP_REG_PRODM] = 0xfff0;
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.m)), Imm16(0xfff0));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.m)), Imm16(0xfff0));
 //	g_dsp.r[DSP_REG_PRODH] = 0x00ff;
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.h)), Imm16(0x00ff));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.h)), Imm16(0x00ff));
 //	g_dsp.r[DSP_REG_PRODM2] = 0x0010;
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.m2)), Imm16(0x0010));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.m2)), Imm16(0x0010));
 #else
 	Default(opc);
 #endif
@@ -317,8 +317,8 @@ void DSPEmitter::mulaxh(const UDSPInstruction opc)
 {
 #ifdef _M_X64
 //	s64 prod = dsp_multiply(dsp_get_ax_h(0), dsp_get_ax_h(0));
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[0].h)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[0].h)));
 	MOV(64, R(RDI), R(RSI));
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -340,10 +340,10 @@ void DSPEmitter::mul(const UDSPInstruction opc)
 	u8 sreg  = (opc >> 11) & 0x1;
 
 //	u16 axl = dsp_get_ax_l(sreg);
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].l)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].l)));
 //	u16 axh = dsp_get_ax_h(sreg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].h)));
 //	s64 prod = dsp_multiply(axh, axl);
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -373,9 +373,9 @@ void DSPEmitter::mulac(const UDSPInstruction opc)
 	ADD(64, R(RAX), R(RDX));
 	PUSH(64, R(RAX));
 //	u16 axl = dsp_get_ax_l(sreg);
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].l)));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].l)));
 //	u16 axh = dsp_get_ax_h(sreg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].h)));
 //	s64 prod = dsp_multiply(axl, axh);
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -464,11 +464,11 @@ void DSPEmitter::mulx(const UDSPInstruction opc)
 	u16 *sregp = reg_ptr(DSP_REG_AXL0 + sreg*2);
 	u16 *tregp = reg_ptr(DSP_REG_AXL1 + treg*2);
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 //	u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
-	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp,&g_dsp._r)));
+	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp,&g_dsp.r)));
 //	u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
-	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp,&g_dsp._r)));
+	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp,&g_dsp.r)));
 //	s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
 	multiply_mulx(sreg, treg);
 //	dsp_set_long_prod(prod);
@@ -499,9 +499,9 @@ void DSPEmitter::mulxac(const UDSPInstruction opc)
 	get_long_prod();
 	ADD(64, R(RCX), R(RAX));
 //	u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
-	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp._r)));
+	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp.r)));
 //	u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
-	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp._r)));
+	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp.r)));
 //	s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
 	multiply_mulx(sreg, treg);
 
@@ -538,9 +538,9 @@ void DSPEmitter::mulxmv(const UDSPInstruction opc)
 //	s64 acc = dsp_get_long_prod();
 	get_long_prod(RCX);
 //	u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
-	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp._r)));
+	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp.r)));
 //	u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
-	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp._r)));
+	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp.r)));
 //	s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
 	multiply_mulx(sreg, treg);
 
@@ -578,9 +578,9 @@ void DSPEmitter::mulxmvz(const UDSPInstruction opc)
 //	s64 acc = dsp_get_long_prod_round_prodl();
 	get_long_prod_round_prodl(RCX);
 //	u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
-	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp._r)));
+	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp.r)));
 //	u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
-	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp._r)));
+	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp.r)));
 //	s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
 	multiply_mulx(sreg, treg);
 
@@ -611,10 +611,10 @@ void DSPEmitter::mulc(const UDSPInstruction opc)
 	u8 sreg = (opc >> 12) & 0x1;
 
 //	u16 accm = dsp_get_acc_m(sreg);
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, ESI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, ESI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 //	u16 axh = dsp_get_ax_h(treg);
-	MOVSX(64, 16, EDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[treg].h)));
+	MOVSX(64, 16, EDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[treg].h)));
 //	s64 prod = dsp_multiply(accm, axh);
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -645,9 +645,9 @@ void DSPEmitter::mulcac(const UDSPInstruction opc)
 	ADD(64, R(RAX), R(RDX));
 	PUSH(64, R(RAX));
 //	u16 accm = dsp_get_acc_m(sreg);
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 //	u16 axh = dsp_get_ax_h(treg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[treg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[treg].h)));
 //	s64 prod = dsp_multiply(accm, axh);
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -684,9 +684,9 @@ void DSPEmitter::mulcmv(const UDSPInstruction opc)
 	get_long_prod();
 	PUSH(64, R(RAX));
 //	u16 accm = dsp_get_acc_m(sreg);
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 //	u16 axh = dsp_get_ax_h(treg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[treg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[treg].h)));
 //	s64 prod = dsp_multiply(accm, axh);
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -720,14 +720,14 @@ void DSPEmitter::mulcmvz(const UDSPInstruction opc)
 	u8 treg  = (opc >> 11) & 0x1;
 	u8 sreg  = (opc >> 12) & 0x1;
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 //	s64 acc = dsp_get_long_prod_round_prodl();
 	get_long_prod_round_prodl();
 	PUSH(64, R(RAX));
 //	u16 accm = dsp_get_acc_m(sreg);
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 //	u16 axh = dsp_get_ax_h(treg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[treg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[treg].h)));
 //	s64 prod = dsp_multiply(accm, axh);
 	multiply();
 //	dsp_set_long_prod(prod);
@@ -760,11 +760,11 @@ void DSPEmitter::maddx(const UDSPInstruction opc)
 	u16 *sregp = reg_ptr(DSP_REG_AXL0 + sreg*2);
 	u16 *tregp = reg_ptr(DSP_REG_AXL1 + treg*2);
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 	//	u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
-	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp._r)));
+	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp.r)));
 	//	u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
-	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp._r)));
+	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp.r)));
 	//	s64 prod = dsp_multiply_add(val1, val2);
 	multiply_add();
 	//	dsp_set_long_prod(prod);
@@ -787,11 +787,11 @@ void DSPEmitter::msubx(const UDSPInstruction opc)
 	u16 *sregp = reg_ptr(DSP_REG_AXL0 + sreg*2);
 	u16 *tregp = reg_ptr(DSP_REG_AXL1 + treg*2);
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 	//	u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
-	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp._r)));
+	MOVSX(64, 16, RSI, MDisp(R11, PtrOffset(sregp, &g_dsp.r)));
 	//	u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
-	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp._r)));
+	MOVSX(64, 16, RDI, MDisp(R11, PtrOffset(tregp, &g_dsp.r)));
 	//	s64 prod = dsp_multiply_sub(val1, val2);
 	multiply_sub();
 	//	dsp_set_long_prod(prod);
@@ -812,11 +812,11 @@ void DSPEmitter::maddc(const UDSPInstruction opc)
 	u8 treg = (opc >> 8) & 0x1;
 	u8 sreg = (opc >> 9) & 0x1;
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 //	u16 accm = dsp_get_acc_m(sreg);
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 //	u16 axh = dsp_get_ax_h(treg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[treg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[treg].h)));
 //	s64 prod = dsp_multiply_add(accm, axh);
 	multiply_add();
 //	dsp_set_long_prod(prod);
@@ -838,10 +838,10 @@ void DSPEmitter::msubc(const UDSPInstruction opc)
 	u8 sreg = (opc >> 9) & 0x1;
 
 //	u16 accm = dsp_get_acc_m(sreg);
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 //	u16 axh = dsp_get_ax_h(treg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[treg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[treg].h)));
 //	s64 prod = dsp_multiply_sub(accm, axh);
 	multiply_sub();
 //	dsp_set_long_prod(prod);
@@ -861,11 +861,11 @@ void DSPEmitter::madd(const UDSPInstruction opc)
 #ifdef _M_X64
 	u8 sreg = (opc >> 8) & 0x1;
 
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 //	u16 axl = dsp_get_ax_l(sreg);
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].l)));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].l)));
 //	u16 axh = dsp_get_ax_h(sreg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].h)));
 //	s64 prod = dsp_multiply_add(axl, axh);
 	multiply_add();
 //	dsp_set_long_prod(prod);
@@ -886,10 +886,10 @@ void DSPEmitter::msub(const UDSPInstruction opc)
 	u8 sreg = (opc >> 8) & 0x1;
 //	
 //	u16 axl = dsp_get_ax_l(sreg);
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].l)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, RSI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].l)));
 //	u16 axh = dsp_get_ax_h(sreg);
-	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[sreg].h)));
+	MOVSX(64, 16, RDI, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[sreg].h)));
 //	s64 prod = dsp_multiply_sub(axl, axh);
 	multiply_sub();
 //	dsp_set_long_prod(prod);
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
index 42a7bd15f7..86fc541026 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
@@ -57,7 +57,6 @@ void DSPEmitter::ToMask(X64Reg value_reg)
 	SetJumpTarget(undef);
 #endif
 	OR(16, R(value_reg), Imm16(1));
-	XOR(64, R(RCX), R(RCX));
 }
 
 // EAX = g_dsp.r[reg]
@@ -72,29 +71,29 @@ void DSPEmitter::increment_addr_reg(int reg)
 	//this works, because nar^ar will have all the bits from the highest
 	//changed bit downwards set(true only for +1!)
 	//based on an idea by Mylek
-	if((nar^ar)>=((wr<<1)|1))
+	if((nar^ar)>=((wr<<1)|3))
 		nar -= wr+1;
 	*/
 
 	//	s16 tmp = g_dsp.r[reg];
 #ifdef _M_IX86 // All32
-	MOV(16, R(AX), M(&g_dsp._r.ar[reg]));
-	MOV(16, R(DX), M(&g_dsp._r.wr[reg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[reg]));
+	MOV(16, R(DX), M(&g_dsp.r.wr[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
-	MOV(16, R(DX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, wr[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(32, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
+	MOV(16, R(DX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, wr[reg])));
 #endif
 
-	MOV(16,R(DI), R(AX));
-	ADD(16,R(AX), Imm16(1));
-	XOR(16,R(DI), R(AX));
-	MOV(16,R(SI), R(DX));
+	MOV(32,R(EDI), R(EAX));
+	ADD(32,R(EAX), Imm32(1));
+	XOR(32,R(EDI), R(EAX));
 
-	SHL(16,R(SI), Imm8(1));
-	OR(16,R(SI), Imm16(3));
-	CMP(16,R(DI), R(SI));
-	FixupBranch nowrap = J_CC(CC_L);
+	MOVZX(32, 16, ESI, R(DX));
+	SHL(32,R(ESI), Imm8(1));
+	OR(32,R(ESI), Imm32(3));
+	CMP(32,R(EDI), R(ESI));
+	FixupBranch nowrap = J_CC(CC_B);
 
 	SUB(16,R(AX), R(DX));
 	SUB(16,R(AX), Imm16(1));
@@ -103,10 +102,10 @@ void DSPEmitter::increment_addr_reg(int reg)
 
 	//	g_dsp.r[reg] = tmp;
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ar[reg]), R(AX));
+	MOV(16, M(&g_dsp.r.ar[reg]), R(AX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])), R(AX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])), R(AX));
 #endif
 }
 
@@ -127,17 +126,17 @@ void DSPEmitter::decrement_addr_reg(int reg)
 
 	//	s16 ar = g_dsp.r[reg];
 #ifdef _M_IX86 // All32
-	MOV(16, R(AX), M(&g_dsp._r.ar[reg]));
-	MOVZX(32, 16, EDX, M(&g_dsp._r.wr[reg]));
+	MOV(16, R(AX), M(&g_dsp.r.ar[reg]));
+	MOVZX(32, 16, EDX, M(&g_dsp.r.wr[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
-	MOVZX(32, 16, EDX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, wr[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
+	MOVZX(32, 16, EDX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, wr[reg])));
 #endif
 
 	// ToMask(WR0), calculating it into EDI
 	//u16 m = ToMask(wr) | 1;
-	MOV(16, R(DI), R(DX));
+	MOV(32, R(EDI), R(EDX));
 	ToMask(DI);
 
 	//u16 nar = ar-1;
@@ -145,7 +144,7 @@ void DSPEmitter::decrement_addr_reg(int reg)
 	SUB(16, R(AX), Imm16(1));
 
 	//(ar&m) - 1
-	AND(32, R(ECX), R(EDI));
+	AND(32, R(ECX), R(EDI)); //extension of ECX to 32 bit
 	SUB(32, R(ECX), Imm32(1));
 
 	//m-wr
@@ -159,10 +158,10 @@ void DSPEmitter::decrement_addr_reg(int reg)
 
 	//	g_dsp.r[reg] = tmp;
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ar[reg]), R(AX));
+	MOV(16, M(&g_dsp.r.ar[reg]), R(AX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])), R(AX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])), R(AX));
 #endif
 }
 
@@ -179,7 +178,7 @@ void DSPEmitter::increase_addr_reg(int reg)
 	u16 ix = g_dsp.r[reg+4];
 	u16 m = ToMask(wr) | 1;
 	u16 nar = ar+ix;
-	if (ix >= 0) {
+	if ((s16)ix >= 0) {
 		if((ar&m) + (ix&m) -(int)m-1 >= 0)
 			nar -= wr+1;
 	} else {
@@ -190,35 +189,35 @@ void DSPEmitter::increase_addr_reg(int reg)
 	 */
 
 #ifdef _M_IX86 // All32
-	MOV(16, R(SI), M(&g_dsp._r.ix[reg]));
-	MOV(16, R(AX), M(&g_dsp._r.ar[reg]));
-	MOVZX(32, 16, EDX, M(&g_dsp._r.wr[reg]));
+	MOV(16, R(SI), M(&g_dsp.r.ix[reg]));
+	MOV(16, R(AX), M(&g_dsp.r.ar[reg]));
+	MOVZX(32, 16, EDX, M(&g_dsp.r.wr[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, R(SI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ix[reg])));
-	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
-	MOVZX(32, 16, EDX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, wr[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, R(SI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ix[reg])));
+	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
+	MOVZX(32, 16, EDX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, wr[reg])));
 #endif
 
 	// ToMask(WR0), calculating it into EDI
 	//u16 m = ToMask(wr) | 1;
-	MOV(16, R(DI), R(DX));
+	MOV(32, R(EDI), R(EDX));
 	ToMask(DI);
 
 	//u16 nar = ar+ix;
 	MOV(16, R(CX), R(AX));
 	ADD(16, R(AX), R(SI));
 
+	TEST(16,R(SI), Imm16(0x8000));
+	FixupBranch negative = J_CC(CC_NZ);
+
 	//(ar&m) + (ix&m) -(int)m-1
-	AND(32, R(ECX), R(EDI));
-	AND(32, R(ESI), R(EDI));
+	AND(32, R(ECX), R(EDI)); //extension of ECX to 32 bit
+	AND(32, R(ESI), R(EDI)); //extension of ESI to 32 bit
 	ADD(32, R(ECX), R(ESI));
 	SUB(32, R(ECX), R(EDI));
 	SUB(32, R(ECX), Imm32(1));
 
-	TEST(16,R(SI), Imm16(0x8000));
-	FixupBranch negative = J_CC(CC_NZ);
-
 	CMP(32, R(ECX), Imm32(0));
 	FixupBranch out1 = J_CC(CC_L);
 	SUB(16,R(AX),R(DX));
@@ -227,6 +226,12 @@ void DSPEmitter::increase_addr_reg(int reg)
 
 	SetJumpTarget(negative);
 
+	//(ar&m) + (ix&m) -(int)m-1
+	AND(32, R(ECX), R(EDI)); //extension of ECX to 32 bit
+	AND(32, R(ESI), R(EDI)); //extension of ESI to 32 bit
+	ADD(32, R(ECX), R(ESI));
+	SUB(32, R(ECX), R(EDI));
+	SUB(32, R(ECX), Imm32(1));
 	//m-wr
 	SUB(32, R(EDI), R(EDX));
 	CMP(32, R(ECX), R(EDI));
@@ -240,10 +245,10 @@ void DSPEmitter::increase_addr_reg(int reg)
 
 	//	g_dsp.r[reg] = tmp;
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ar[reg]), R(EAX));
+	MOV(16, M(&g_dsp.r.ar[reg]), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])), R(EAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])), R(EAX));
 #endif
 }
 
@@ -271,33 +276,33 @@ void DSPEmitter::decrease_addr_reg(int reg)
 	 */
 
 #ifdef _M_IX86 // All32
-	MOV(16, R(SI), M(&g_dsp._r.ix[reg]));
-	MOV(16, R(AX), M(&g_dsp._r.ar[reg]));
-	MOVZX(32, 16, EDX, M(&g_dsp._r.wr[reg]));
+	MOV(16, R(SI), M(&g_dsp.r.ix[reg]));
+	MOV(16, R(AX), M(&g_dsp.r.ar[reg]));
+	MOVZX(32, 16, EDX, M(&g_dsp.r.wr[reg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, R(SI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ix[reg])));
-	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])));
-	MOVZX(32, 16, EDX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, wr[reg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, R(SI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ix[reg])));
+	MOV(16, R(AX), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])));
+	MOVZX(32, 16, EDX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, wr[reg])));
 #endif
 
 	// ToMask(WR0), calculating it into EDI
 	//u16 m = ToMask(wr) | 1;
-	MOV(16, R(DI), R(DX));
+	MOV(32, R(EDI), R(EDX));
 	ToMask(DI);
 
 	//u16 nar = ar-ix;
 	MOV(16, R(CX), R(AX));
 	SUB(16, R(AX), R(SI));
 
+	CMP(16,R(SI), Imm16(0x8000));
+	FixupBranch negative = J_CC(CC_BE);
+
 	//(ar&m) + (ix&m)
 	AND(32, R(ECX), R(EDI));
 	AND(32, R(ESI), R(EDI));
 	SUB(32, R(ECX), R(ESI));
 
-	CMP(16,R(SI), Imm16(0x8000));
-	FixupBranch negative = J_CC(CC_BE);
-
 	CMP(32, R(ECX), Imm32(0));
 	FixupBranch out1 = J_CC(CC_L);
 	SUB(16,R(AX),R(DX));
@@ -306,6 +311,11 @@ void DSPEmitter::decrease_addr_reg(int reg)
 
 	SetJumpTarget(negative);
 
+	//(ar&m) + (ix&m)
+	AND(32, R(ECX), R(EDI));
+	AND(32, R(ESI), R(EDI));
+	SUB(32, R(ECX), R(ESI));
+
 	//m-wr
 	SUB(32, R(EDI), R(EDX));
 	CMP(32, R(ECX), R(EDI));
@@ -319,10 +329,10 @@ void DSPEmitter::decrease_addr_reg(int reg)
 
 	//	g_dsp.r[reg] = tmp;
 #ifdef _M_IX86 // All32
-	MOV(16, M(&g_dsp._r.ar[reg]), R(EAX));
+	MOV(16, M(&g_dsp.r.ar[reg]), R(EAX));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[reg])), R(EAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[reg])), R(EAX));
 #endif
 }
 
@@ -494,31 +504,31 @@ void DSPEmitter::get_long_prod(X64Reg long_prod)
 {
 #ifdef _M_X64
 #if 0
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 	//s64 val   = (s8)(u8)g_dsp.r[DSP_REG_PRODH];
-	MOVSX(64, 8, long_prod, MDisp(R11,STRUCT_OFFSET(g_dsp._r, prod.h)));
+	MOVSX(64, 8, long_prod, MDisp(R11,STRUCT_OFFSET(g_dsp.r, prod.h)));
 	//val <<= 32;
 	SHL(64, R(long_prod), Imm8(16));
 	//s64 low_prod  = g_dsp.r[DSP_REG_PRODM];
-	OR(16, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp._r, prod.m)));
+	OR(16, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp.r, prod.m)));
 	//low_prod += g_dsp.r[DSP_REG_PRODM2];
-	ADD(16, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp._r, prod.m2)));
+	ADD(16, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp.r, prod.m2)));
 	//low_prod <<= 16;
 	SHL(64, R(long_prod), Imm8(16));
 	//low_prod |= g_dsp.r[DSP_REG_PRODL];
-	OR(16, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp._r, prod.l)));
+	OR(16, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp.r, prod.l)));
 	//return val;
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 	//s64 val   = (s8)(u8)g_dsp.r[DSP_REG_PRODH];
-	MOV(64, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp._r, prod.val)));
+	MOV(64, R(long_prod), MDisp(R11,STRUCT_OFFSET(g_dsp.r, prod.val)));
 	MOV(64, R(R11), R(long_prod));
 	SHL(64, R(long_prod), Imm8(64-40));//sign extend
 	SAR(64, R(long_prod), Imm8(64-40));
 	SHR(64, R(R11), Imm8(48));
 	SHL(64, R(R11), Imm8(16));
 	ADD(64, R(long_prod), R(R11));
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
 
 #endif
 #endif
@@ -557,25 +567,25 @@ void DSPEmitter::set_long_prod()
 #ifdef _M_X64
 #if 0
 	//	g_dsp.r[DSP_REG_PRODL] = (u16)val;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.l)), R(AX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.l)), R(AX));
 	//	val >>= 16;
 	SAR(64, R(RAX), Imm8(16));
 	//	g_dsp.r[DSP_REG_PRODM] = (u16)val;
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.m)), R(AX));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.m)), R(AX));
 	//	val >>= 16;
 	SAR(64, R(RAX), Imm8(16));
 	//	g_dsp.r[DSP_REG_PRODH] = (u8)val;
 	MOVSX(64, 8, RAX, R(AL));
-	MOV(8, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.h)), R(AL));
+	MOV(8, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.h)), R(AL));
 	//	g_dsp.r[DSP_REG_PRODM2] = 0;
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.m2)), Imm16(0));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.m2)), Imm16(0));
 #else
 	MOV(64, R(R11), Imm64(0x000000ffffffffffULL));
 	AND(64, R(RAX), R(R11));
 	//	g_dsp.r[DSP_REG_PRODL] = (u16)val;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(64, MDisp(R11, STRUCT_OFFSET(g_dsp._r, prod.val)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(64, MDisp(R11, STRUCT_OFFSET(g_dsp.r, prod.val)), R(RAX));
 #endif
 #endif
 }
@@ -608,18 +618,18 @@ void DSPEmitter::get_long_acc(int _reg, X64Reg acc)
 #ifdef _M_X64
 #if 0
 //	s64 high = (s64)(s8)g_dsp.r[DSP_REG_ACH0 + reg] << 32;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 8, acc, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].h)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 8, acc, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].h)));
 	SHL(64, R(acc), Imm8(16));
 //	u32 mid_low = ((u32)g_dsp.r[DSP_REG_ACM0 + reg] << 16) | g_dsp.r[DSP_REG_ACL0 + reg];
-	OR(16, R(acc), MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].m)));
+	OR(16, R(acc), MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].m)));
 	SHL(64, R(acc), Imm8(16));
-	OR(16, R(acc), MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].l)));
+	OR(16, R(acc), MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].l)));
 //	return high | mid_low;
 #else
 //	s64 high = (s64)(s8)g_dsp.r[DSP_REG_ACH0 + reg] << 32;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(64, R(acc), MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].val)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(64, R(acc), MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].val)));
 	SHL(64, R(acc), Imm8(64-40));//sign extend
 	SAR(64, R(acc), Imm8(64-40));
 #endif
@@ -633,23 +643,23 @@ void DSPEmitter::set_long_acc(int _reg, X64Reg acc)
 #ifdef _M_X64
 #if 0
 //	g_dsp.r[DSP_REG_ACL0 + _reg] = (u16)val;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].l)), R(acc));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].l)), R(acc));
 //	val >>= 16;
 	SHR(64, R(acc), Imm8(16));
 //	g_dsp.r[DSP_REG_ACM0 + _reg] = (u16)val;
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].m)), R(acc));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].m)), R(acc));
 //	val >>= 16;
 	SHR(64, R(acc), Imm8(16));
 //	g_dsp.r[DSP_REG_ACH0 + _reg] = (u16)(s16)(s8)(u8)val;
 	MOVSX(64, 8, acc, R(acc));
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].h)), R(acc));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].h)), R(acc));
 #else
 	SHL(64, R(acc), Imm8(64-40));//sign extend
 	SAR(64, R(acc), Imm8(64-40));
 //	g_dsp.r[DSP_REG_ACL0 + _reg] = (u16)val;
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(64, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].val)), R(acc));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(64, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].val)), R(acc));
 #endif
 #endif
 }
@@ -659,8 +669,8 @@ void DSPEmitter::get_acc_m(int _reg, X64Reg acm)
 {
 //	return g_dsp.r[DSP_REG_ACM0 + _reg];
 #ifdef _M_X64
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, acm, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, acm, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].m)));
 #endif
 }
 
@@ -669,8 +679,8 @@ void DSPEmitter::set_acc_m(int _reg)
 {
 	//	return g_dsp.r[DSP_REG_ACM0 + _reg];
 #ifdef _M_X64
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ac[_reg].m)), R(RAX));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOV(16, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ac[_reg].m)), R(RAX));
 #endif
 }
 
@@ -680,13 +690,13 @@ void DSPEmitter::get_long_acx(int _reg, X64Reg acx)
 //	return ((u32)g_dsp.r[DSP_REG_AXH0 + _reg] << 16) | g_dsp.r[DSP_REG_AXL0 + _reg];
 #ifdef _M_X64
 #if 0
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, acx, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[_reg].h)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, acx, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[_reg].h)));
 	SHL(64, R(acx), Imm8(16));
-	OR(16, R(acx), MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[_reg].l)));
+	OR(16, R(acx), MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[_reg].l)));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 32, acx, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[_reg].val)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 32, acx, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[_reg].val)));
 #endif
 #endif
 }
@@ -696,8 +706,8 @@ void DSPEmitter::get_ax_l(int _reg, X64Reg axl)
 {
 //	return (s16)g_dsp.r[DSP_REG_AXL0 + _reg];
 #ifdef _M_X64
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, axl, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[_reg].l)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, axl, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[_reg].l)));
 #endif
 }
 
@@ -706,7 +716,7 @@ void DSPEmitter::get_ax_h(int _reg, X64Reg axh)
 {
 //	return (s16)g_dsp.r[DSP_REG_AXH0 + _reg];
 #ifdef _M_X64
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVSX(64, 16, axh, MDisp(R11, STRUCT_OFFSET(g_dsp._r, ax[_reg].h)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVSX(64, 16, axh, MDisp(R11, STRUCT_OFFSET(g_dsp.r, ax[_reg].h)));
 #endif
 }
diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitUtil.h b/Source/Core/DSPCore/Src/Jit/DSPJitUtil.h
index f2dd71ab7b..2e877d63ed 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitUtil.h
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitUtil.h
@@ -28,43 +28,43 @@ static u16 *reg_ptr(int reg) {
 	case DSP_REG_AR1:
 	case DSP_REG_AR2:
 	case DSP_REG_AR3:
-		return &g_dsp._r.ar[reg - DSP_REG_AR0];
+		return &g_dsp.r.ar[reg - DSP_REG_AR0];
 	case DSP_REG_IX0:
 	case DSP_REG_IX1:
 	case DSP_REG_IX2:
 	case DSP_REG_IX3:
-		return &g_dsp._r.ix[reg - DSP_REG_IX0];
+		return &g_dsp.r.ix[reg - DSP_REG_IX0];
 	case DSP_REG_WR0:
 	case DSP_REG_WR1:
 	case DSP_REG_WR2:
 	case DSP_REG_WR3:
-		return &g_dsp._r.wr[reg - DSP_REG_WR0];
+		return &g_dsp.r.wr[reg - DSP_REG_WR0];
 	case DSP_REG_ST0:
 	case DSP_REG_ST1:
 	case DSP_REG_ST2:
 	case DSP_REG_ST3:
-		return &g_dsp._r.st[reg - DSP_REG_ST0];
+		return &g_dsp.r.st[reg - DSP_REG_ST0];
 	case DSP_REG_ACH0:
 	case DSP_REG_ACH1:
-		return &g_dsp._r.ac[reg - DSP_REG_ACH0].h;
-	case DSP_REG_CR:     return &g_dsp._r.cr;
-	case DSP_REG_SR:     return &g_dsp._r.sr;
-	case DSP_REG_PRODL:  return &g_dsp._r.prod.l;
-	case DSP_REG_PRODM:  return &g_dsp._r.prod.m;
-	case DSP_REG_PRODH:  return &g_dsp._r.prod.h;
-	case DSP_REG_PRODM2: return &g_dsp._r.prod.m2;
+		return &g_dsp.r.ac[reg - DSP_REG_ACH0].h;
+	case DSP_REG_CR:     return &g_dsp.r.cr;
+	case DSP_REG_SR:     return &g_dsp.r.sr;
+	case DSP_REG_PRODL:  return &g_dsp.r.prod.l;
+	case DSP_REG_PRODM:  return &g_dsp.r.prod.m;
+	case DSP_REG_PRODH:  return &g_dsp.r.prod.h;
+	case DSP_REG_PRODM2: return &g_dsp.r.prod.m2;
 	case DSP_REG_AXL0:
 	case DSP_REG_AXL1:
-		return &g_dsp._r.ax[reg - DSP_REG_AXL0].l;
+		return &g_dsp.r.ax[reg - DSP_REG_AXL0].l;
 	case DSP_REG_AXH0:
 	case DSP_REG_AXH1:
-		return &g_dsp._r.ax[reg - DSP_REG_AXH0].h;
+		return &g_dsp.r.ax[reg - DSP_REG_AXH0].h;
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		return &g_dsp._r.ac[reg - DSP_REG_ACL0].l;
+		return &g_dsp.r.ac[reg - DSP_REG_ACL0].l;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		return &g_dsp._r.ac[reg - DSP_REG_ACM0].m;
+		return &g_dsp.r.ac[reg - DSP_REG_ACM0].m;
 	default:
 		_assert_msg_(DSP_JIT, 0, "cannot happen");
 		return NULL;
diff --git a/Source/UnitTests/CMakeLists.txt b/Source/UnitTests/CMakeLists.txt
new file mode 100644
index 0000000000..1baaf51625
--- /dev/null
+++ b/Source/UnitTests/CMakeLists.txt
@@ -0,0 +1,10 @@
+set(LIBS	dspcore
+		common)
+
+set(SRCS	AudioJitTests.cpp
+		DSPJitTester.cpp
+		UnitTests.cpp)
+
+add_executable(tester ${SRCS})
+target_link_libraries(tester ${LIBS})
+#install(TARGETS ${EXEGUI} RUNTIME DESTINATION ${bindir})
diff --git a/Source/UnitTests/DSPJitTester.cpp b/Source/UnitTests/DSPJitTester.cpp
index da983038c4..8980391c56 100644
--- a/Source/UnitTests/DSPJitTester.cpp
+++ b/Source/UnitTests/DSPJitTester.cpp
@@ -58,12 +58,110 @@ void DSPJitTester::ResetJit()
 {
 	jit.ClearCodeSpace();
 }
+
+static u16 GetRegister(SDSP const &dsp, int reg) {
+	switch(reg) {
+	case DSP_REG_AR0:
+	case DSP_REG_AR1:
+	case DSP_REG_AR2:
+	case DSP_REG_AR3:
+		return dsp.r.ar[reg - DSP_REG_AR0];
+	case DSP_REG_IX0:
+	case DSP_REG_IX1:
+	case DSP_REG_IX2:
+	case DSP_REG_IX3:
+		return dsp.r.ix[reg - DSP_REG_IX0];
+	case DSP_REG_WR0:
+	case DSP_REG_WR1:
+	case DSP_REG_WR2:
+	case DSP_REG_WR3:
+		return dsp.r.wr[reg - DSP_REG_WR0];
+	case DSP_REG_ST0:
+	case DSP_REG_ST1:
+	case DSP_REG_ST2:
+	case DSP_REG_ST3:
+		return dsp.r.st[reg - DSP_REG_ST0];
+	case DSP_REG_ACH0:
+	case DSP_REG_ACH1:
+		return dsp.r.ac[reg - DSP_REG_ACH0].h;
+	case DSP_REG_CR:     return dsp.r.cr;
+	case DSP_REG_SR:     return dsp.r.sr;
+	case DSP_REG_PRODL:  return dsp.r.prod.l;
+	case DSP_REG_PRODM:  return dsp.r.prod.m;
+	case DSP_REG_PRODH:  return dsp.r.prod.h;
+	case DSP_REG_PRODM2: return dsp.r.prod.m2;
+	case DSP_REG_AXL0:
+	case DSP_REG_AXL1:
+		return dsp.r.ax[reg - DSP_REG_AXL0].l;
+	case DSP_REG_AXH0:
+	case DSP_REG_AXH1:
+		return dsp.r.ax[reg - DSP_REG_AXH0].h;
+	case DSP_REG_ACL0:
+	case DSP_REG_ACL1:
+		return dsp.r.ac[reg - DSP_REG_ACL0].l;
+	case DSP_REG_ACM0:
+	case DSP_REG_ACM1:
+		return dsp.r.ac[reg - DSP_REG_ACM0].m;
+	default:
+		_assert_msg_(DSP_CORE, 0, "cannot happen");
+		return 0;
+	}
+}
+
+static void SetRegister(SDSP &dsp, int reg, u16 val) {
+	switch(reg) {
+	case DSP_REG_AR0:
+	case DSP_REG_AR1:
+	case DSP_REG_AR2:
+	case DSP_REG_AR3:
+		dsp.r.ar[reg - DSP_REG_AR0] = val; break;
+	case DSP_REG_IX0:
+	case DSP_REG_IX1:
+	case DSP_REG_IX2:
+	case DSP_REG_IX3:
+		dsp.r.ix[reg - DSP_REG_IX0] = val; break;
+	case DSP_REG_WR0:
+	case DSP_REG_WR1:
+	case DSP_REG_WR2:
+	case DSP_REG_WR3:
+		dsp.r.wr[reg - DSP_REG_WR0] = val; break;
+	case DSP_REG_ST0:
+	case DSP_REG_ST1:
+	case DSP_REG_ST2:
+	case DSP_REG_ST3:
+		dsp.r.st[reg - DSP_REG_ST0] = val; break;
+	case DSP_REG_ACH0:
+	case DSP_REG_ACH1:
+		dsp.r.ac[reg - DSP_REG_ACH0].h = val; break;
+	case DSP_REG_CR:     dsp.r.cr = val; break;
+	case DSP_REG_SR:     dsp.r.sr = val; break;
+	case DSP_REG_PRODL:  dsp.r.prod.l = val; break;
+	case DSP_REG_PRODM:  dsp.r.prod.m = val; break;
+	case DSP_REG_PRODH:  dsp.r.prod.h = val; break;
+	case DSP_REG_PRODM2: dsp.r.prod.m2 = val; break;
+	case DSP_REG_AXL0:
+	case DSP_REG_AXL1:
+		dsp.r.ax[reg - DSP_REG_AXL0].l = val; break;
+	case DSP_REG_AXH0:
+	case DSP_REG_AXH1:
+		dsp.r.ax[reg - DSP_REG_AXH0].h = val; break;
+	case DSP_REG_ACL0:
+	case DSP_REG_ACL1:
+		dsp.r.ac[reg - DSP_REG_ACL0].l = val; break;
+	case DSP_REG_ACM0:
+	case DSP_REG_ACM1:
+		dsp.r.ac[reg - DSP_REG_ACM0].m = val; break;
+	default:
+		_assert_msg_(DSP_CORE, 0, "cannot happen");
+	}
+}
+
 bool DSPJitTester::AreEqual(SDSP& int_dsp, SDSP& jit_dsp)
 {
 	bool equal = true;
 	for (int i = 0; i < DSP_REG_NUM; i++)
 	{
-		if (((u16*)&int_dsp._r)[i] != ((u16*)&jit_dsp._r)[i])
+	    if (GetRegister(int_dsp,i) != GetRegister(jit_dsp, i))
 		{
 			if (equal)
 			{
@@ -77,7 +175,7 @@ bool DSPJitTester::AreEqual(SDSP& int_dsp, SDSP& jit_dsp)
 			}
 			equal = false;
 			if (be_verbose || failed_only)
-				printf("\t%s: int = 0x%04x, jit = 0x%04x\n", regnames[i].name, ((u16*)&int_dsp._r)[i], ((u16*)&jit_dsp._r)[i]);
+				printf("\t%s: int = 0x%04x, jit = 0x%04x\n", regnames[i].name, GetRegister(int_dsp,i), GetRegister(jit_dsp, i));
 		}
 	}
 
@@ -126,8 +224,8 @@ void DSPJitTester::DumpJittedCode()
 void DSPJitTester::DumpRegs(SDSP& dsp)
 {
 	for (int i = 0; i < DSP_REG_NUM; i++)
-		if (((u16*)&dsp._r)[i])
-			printf("%s=0x%04x ", regnames[i].name, ((u16*)&dsp._r)[i]);
+		if (GetRegister(dsp,i))
+			printf("%s=0x%04x ", regnames[i].name, GetRegister(dsp,i));
 }
 void DSPJitTester::Initialize()
 {
@@ -145,7 +243,7 @@ int DSPJitTester::TestOne(TestDataIterator it, SDSP& dsp)
 		it++;
 		for (TestData::size_type i = 0; i < data.size(); i++)
 		{
-			((u16*)&dsp._r)[reg] = data.at(i);
+			SetRegister(dsp, reg, data.at(i));
 			failed += TestOne(it, dsp);
 		}
 	}