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https://github.com/dolphin-emu/dolphin.git
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GDB Stub: implement XML target descriptor
This allows to set the architecture and the osabi automatically as well as support the ps behaviour of the fpr and some exclusive registers of the CPU.
This commit is contained in:
aldelaro5
parent
e4372a317d
commit
a0fe3dd822
@ -66,6 +66,211 @@ constexpr int MACH_O_POWERPC_750 = 9;
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const s64 GDB_UPDATE_CYCLES = 100000;
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const char* QUERY_XFER_TARGET = "qXfer:features:read:target.xml:";
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const char* target_xml = "<target version=\"1.0\">"
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"<architecture>powerpc:750</architecture>"
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"<feature name=\"org.gnu.gdb.power.core\">"
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"<reg name=\"r0\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r1\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r2\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r3\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r4\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r5\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r6\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r7\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r8\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r9\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r10\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r11\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r12\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r13\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r14\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r15\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r16\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r17\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r18\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r19\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r20\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r21\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r22\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r23\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r24\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r25\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r26\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r27\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r28\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r29\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r30\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"r31\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"pc\" bitsize=\"32\" type=\"code_ptr\" regnum=\"64\"/>"
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"<reg name=\"msr\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"cr\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"lr\" bitsize=\"32\" type=\"code_ptr\"/>"
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"<reg name=\"ctr\" bitsize=\"32\" type=\"uint32\"/>"
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"<reg name=\"xer\" bitsize=\"32\" type=\"uint32\"/>"
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"</feature>"
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"<feature name=\"org.gnu.gdb.power.fpu\">"
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"<struct id=\"ps\">"
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"<field name=\"ps0\" type=\"ieee_single\"/>"
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"<field name=\"ps1\" type=\"ieee_single\"/>"
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"</struct>"
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"<union id=\"fpr\">"
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"<field name=\"ps\" type=\"ps\"/>"
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"<field name=\"double\" type=\"ieee_double\"/>"
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"</union>"
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"<reg name=\"f0\" bitsize=\"64\" type=\"fpr\" regnum=\"32\"/>"
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"<reg name=\"f1\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f2\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f3\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f4\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f5\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f6\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f7\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f8\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f9\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f10\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f11\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f12\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f13\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f14\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f15\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f16\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f17\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f18\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f19\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f20\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f21\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f22\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f23\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f24\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f25\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f26\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f27\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f28\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f29\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f30\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"f31\" bitsize=\"64\" type=\"fpr\"/>"
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"<reg name=\"fpscr\" bitsize=\"32\" group=\"float\" regnum=\"70\"/>"
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"</feature>"
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"<feature name=\"OEA\">"
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"<reg name=\"sr0\" bitsize=\"32\" regnum=\"71\"/>"
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"<reg name=\"sr1\" bitsize=\"32\"/>"
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"<reg name=\"sr2\" bitsize=\"32\"/>"
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"<reg name=\"sr3\" bitsize=\"32\"/>"
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"<reg name=\"sr4\" bitsize=\"32\"/>"
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"<reg name=\"sr5\" bitsize=\"32\"/>"
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"<reg name=\"sr6\" bitsize=\"32\"/>"
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"<reg name=\"sr7\" bitsize=\"32\"/>"
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"<reg name=\"sr8\" bitsize=\"32\"/>"
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"<reg name=\"sr9\" bitsize=\"32\"/>"
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"<reg name=\"sr10\" bitsize=\"32\"/>"
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"<reg name=\"sr11\" bitsize=\"32\"/>"
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"<reg name=\"sr12\" bitsize=\"32\"/>"
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"<reg name=\"sr13\" bitsize=\"32\"/>"
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"<reg name=\"sr14\" bitsize=\"32\"/>"
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"<reg name=\"sr15\" bitsize=\"32\"/>"
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"<reg name=\"pvr\" bitsize=\"32\"/>"
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"<reg name=\"ibat0u\" bitsize=\"32\"/>"
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"<reg name=\"ibat0l\" bitsize=\"32\"/>"
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"<reg name=\"ibat1u\" bitsize=\"32\"/>"
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"<reg name=\"ibat1l\" bitsize=\"32\"/>"
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"<reg name=\"ibat2u\" bitsize=\"32\"/>"
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"<reg name=\"ibat2l\" bitsize=\"32\"/>"
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"<reg name=\"ibat3u\" bitsize=\"32\"/>"
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"<reg name=\"ibat3l\" bitsize=\"32\"/>"
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"<reg name=\"dbat0u\" bitsize=\"32\"/>"
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"<reg name=\"dbat0l\" bitsize=\"32\"/>"
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"<reg name=\"dbat1u\" bitsize=\"32\"/>"
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"<reg name=\"dbat1l\" bitsize=\"32\"/>"
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"<reg name=\"dbat2u\" bitsize=\"32\"/>"
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"<reg name=\"dbat2l\" bitsize=\"32\"/>"
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"<reg name=\"dbat3u\" bitsize=\"32\"/>"
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"<reg name=\"dbat3l\" bitsize=\"32\"/>"
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"<reg name=\"sdr1\" bitsize=\"32\"/>"
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"<reg name=\"asr\" bitsize=\"64\"/>"
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"<reg name=\"dar\" bitsize=\"32\"/>"
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"<reg name=\"dsisr\" bitsize=\"32\"/>"
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"<reg name=\"sprg0\" bitsize=\"32\"/>"
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"<reg name=\"sprg1\" bitsize=\"32\"/>"
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"<reg name=\"sprg2\" bitsize=\"32\"/>"
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"<reg name=\"sprg3\" bitsize=\"32\"/>"
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"<reg name=\"srr0\" bitsize=\"32\"/>"
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"<reg name=\"srr1\" bitsize=\"32\"/>"
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"<reg name=\"tbl\" bitsize=\"32\"/>"
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"<reg name=\"tbu\" bitsize=\"32\"/>"
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"<reg name=\"dec\" bitsize=\"32\"/>"
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"<reg name=\"dabr\" bitsize=\"32\"/>"
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"<reg name=\"ear\" bitsize=\"32\"/>"
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"</feature>"
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"<feature name=\"750\">"
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"<reg name=\"hid0\" bitsize=\"32\" regnum=\"119\"/>"
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"<reg name=\"hid1\" bitsize=\"32\"/>"
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"<reg name=\"iabr\" bitsize=\"32\"/>"
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"<reg name=\"dabr\" bitsize=\"32\"/>"
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"<reg name=\"ummcr0\" bitsize=\"32\" regnum=\"124\"/>"
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"<reg name=\"upmc1\" bitsize=\"32\"/>"
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"<reg name=\"upmc2\" bitsize=\"32\"/>"
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"<reg name=\"usia\" bitsize=\"32\"/>"
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"<reg name=\"ummcr1\" bitsize=\"32\"/>"
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"<reg name=\"upmc3\" bitsize=\"32\"/>"
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"<reg name=\"upmc4\" bitsize=\"32\"/>"
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"<reg name=\"mmcr0\" bitsize=\"32\"/>"
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"<reg name=\"pmc1\" bitsize=\"32\"/>"
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"<reg name=\"pmc2\" bitsize=\"32\"/>"
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"<reg name=\"sia\" bitsize=\"32\"/>"
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"<reg name=\"mmcr1\" bitsize=\"32\"/>"
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"<reg name=\"pmc3\" bitsize=\"32\"/>"
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"<reg name=\"pmc4\" bitsize=\"32\"/>"
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"<reg name=\"l2cr\" bitsize=\"32\"/>"
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"<reg name=\"ictc\" bitsize=\"32\"/>"
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"<reg name=\"thrm1\" bitsize=\"32\"/>"
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"<reg name=\"thrm2\" bitsize=\"32\"/>"
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"<reg name=\"thrm3\" bitsize=\"32\"/>"
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"</feature>"
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"<feature name=\"750CL\">"
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"<reg name=\"ibat4u\" bitsize=\"32\" regnum=\"143\"/>"
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"<reg name=\"ibat4l\" bitsize=\"32\"/>"
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"<reg name=\"ibat5u\" bitsize=\"32\"/>"
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"<reg name=\"ibat5l\" bitsize=\"32\"/>"
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"<reg name=\"ibat6u\" bitsize=\"32\"/>"
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"<reg name=\"ibat6l\" bitsize=\"32\"/>"
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"<reg name=\"ibat7u\" bitsize=\"32\"/>"
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"<reg name=\"ibat7l\" bitsize=\"32\"/>"
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"<reg name=\"dbat4u\" bitsize=\"32\"/>"
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"<reg name=\"dbat4l\" bitsize=\"32\"/>"
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"<reg name=\"dbat5u\" bitsize=\"32\"/>"
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"<reg name=\"dbat5l\" bitsize=\"32\"/>"
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"<reg name=\"dbat6u\" bitsize=\"32\"/>"
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"<reg name=\"dbat6l\" bitsize=\"32\"/>"
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"<reg name=\"dbat7u\" bitsize=\"32\"/>"
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"<reg name=\"dbat7l\" bitsize=\"32\"/>"
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"<reg name=\"gqr0\" bitsize=\"32\"/>"
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"<reg name=\"gqr1\" bitsize=\"32\"/>"
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"<reg name=\"gqr2\" bitsize=\"32\"/>"
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"<reg name=\"gqr3\" bitsize=\"32\"/>"
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"<reg name=\"gqr4\" bitsize=\"32\"/>"
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"<reg name=\"gqr5\" bitsize=\"32\"/>"
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"<reg name=\"gqr6\" bitsize=\"32\"/>"
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"<reg name=\"gqr7\" bitsize=\"32\"/>"
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"<reg name=\"hid2\" bitsize=\"32\"/>"
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"<reg name=\"wpar\" bitsize=\"32\"/>"
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"<reg name=\"dmau\" bitsize=\"32\"/>"
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"<reg name=\"dmal\" bitsize=\"32\"/>"
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"<reg name=\"ecidu\" bitsize=\"32\"/>"
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"<reg name=\"ecidm\" bitsize=\"32\"/>"
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"<reg name=\"ecidl\" bitsize=\"32\"/>"
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"<reg name=\"usda\" bitsize=\"32\"/>"
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"<reg name=\"sda\" bitsize=\"32\"/>"
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"<reg name=\"hid4\" bitsize=\"32\"/>"
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"<reg name=\"tdcl\" bitsize=\"32\"/>"
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"<reg name=\"tdch\" bitsize=\"32\"/>"
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"</feature>"
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"</target>";
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static bool s_has_control = false;
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static bool s_just_connected = false;
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@ -105,7 +310,7 @@ static u8 Nibble2hex(u8 n)
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return 'A' + n - 0xa;
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}
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static void Mem2hex(u8* dst, u8* src, u32 len)
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static void Mem2hex(u8* dst, const u8* src, u32 len)
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{
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while (len-- > 0)
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{
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@ -320,6 +525,43 @@ static void WriteHostInfo()
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.c_str());
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}
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static void ProcessXFerCommand(const char* data, size_t paramsIndex)
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{
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size_t offset = 0;
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size_t length = 0;
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while (s_cmd_bfr[paramsIndex] != ',')
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{
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offset <<= 4;
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offset |= Hex2char(s_cmd_bfr[paramsIndex]);
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paramsIndex++;
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}
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paramsIndex++;
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while (paramsIndex < s_cmd_len)
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{
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length <<= 4;
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length |= Hex2char(s_cmd_bfr[paramsIndex]);
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paramsIndex++;
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}
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static u8 reply[GDB_BFR_MAX];
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memset(reply, 0, GDB_BFR_MAX);
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if (length + 1 > GDB_BFR_MAX)
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length = GDB_BFR_MAX - 1;
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if (strlen(data) < static_cast<size_t>(length) + offset)
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{
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length = strlen(data) - offset;
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reply[0] = 'l';
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}
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else
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{
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reply[0] = 'm';
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}
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memcpy(&reply[1], &data[offset], length);
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return SendReply(reinterpret_cast<const char*>(reply));
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}
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static void HandleQuery()
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{
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DEBUG_LOG_FMT(GDB_STUB, "gdb: query '{}'", CommandBufferAsString());
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@ -337,8 +579,9 @@ static void HandleQuery()
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else if (!strncmp((const char*)(s_cmd_bfr), "qHostInfo", strlen("qHostInfo")))
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return WriteHostInfo();
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else if (!strncmp((const char*)(s_cmd_bfr), "qSupported", strlen("qSupported")))
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return SendReply("swbreak+;hwbreak+");
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return SendReply("swbreak+;hwbreak+;qXfer:features:read+");
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else if (!strncmp((const char*)(s_cmd_bfr), QUERY_XFER_TARGET, strlen(QUERY_XFER_TARGET)))
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return ProcessXFerCommand(target_xml, strlen(QUERY_XFER_TARGET));
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SendReply("");
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}
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@ -565,6 +808,114 @@ static void ReadRegister()
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case 142:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_THRM3]);
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break;
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case 143:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT4U]);
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break;
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case 144:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT4L]);
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break;
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case 145:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT5U]);
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break;
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case 146:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT5L]);
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break;
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case 147:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT6U]);
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break;
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case 148:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT6L]);
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break;
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case 149:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT7U]);
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break;
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case 150:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT7L]);
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break;
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case 151:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT4U]);
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break;
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case 152:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT4L]);
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break;
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case 153:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT5U]);
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break;
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case 154:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT5L]);
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break;
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case 155:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT6U]);
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break;
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case 156:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT6L]);
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break;
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case 157:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT7U]);
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break;
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case 158:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DBAT7L]);
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break;
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case 159:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0]);
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break;
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case 160:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 1]);
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break;
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case 161:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 2]);
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break;
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case 162:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 3]);
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break;
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case 163:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 4]);
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break;
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case 164:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 5]);
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break;
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case 165:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 6]);
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break;
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case 166:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_GQR0 + 7]);
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break;
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case 167:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_HID2]);
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break;
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case 168:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_WPAR]);
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break;
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case 169:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DMAU]);
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break;
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case 170:
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wbe32hex(reply, PowerPC::ppcState.spr[SPR_DMAL]);
|
||||
break;
|
||||
case 171:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_ECID_U]);
|
||||
break;
|
||||
case 172:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_ECID_M]);
|
||||
break;
|
||||
case 173:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_ECID_L]);
|
||||
break;
|
||||
case 174:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_USDA]);
|
||||
break;
|
||||
case 175:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_SDA]);
|
||||
break;
|
||||
case 176:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_HID4]);
|
||||
break;
|
||||
case 177:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_TDCL]);
|
||||
break;
|
||||
case 178:
|
||||
wbe32hex(reply, PowerPC::ppcState.spr[SPR_TDCH]);
|
||||
break;
|
||||
default:
|
||||
return SendReply("E01");
|
||||
break;
|
||||
@ -777,6 +1128,114 @@ static void WriteRegister()
|
||||
case 142:
|
||||
PowerPC::ppcState.spr[SPR_THRM3] = re32hex(bufptr);
|
||||
break;
|
||||
case 143:
|
||||
PowerPC::ppcState.spr[SPR_IBAT4U] = re32hex(bufptr);
|
||||
break;
|
||||
case 144:
|
||||
PowerPC::ppcState.spr[SPR_IBAT4L] = re32hex(bufptr);
|
||||
break;
|
||||
case 145:
|
||||
PowerPC::ppcState.spr[SPR_IBAT5U] = re32hex(bufptr);
|
||||
break;
|
||||
case 146:
|
||||
PowerPC::ppcState.spr[SPR_IBAT5L] = re32hex(bufptr);
|
||||
break;
|
||||
case 147:
|
||||
PowerPC::ppcState.spr[SPR_IBAT6U] = re32hex(bufptr);
|
||||
break;
|
||||
case 148:
|
||||
PowerPC::ppcState.spr[SPR_IBAT6L] = re32hex(bufptr);
|
||||
break;
|
||||
case 149:
|
||||
PowerPC::ppcState.spr[SPR_IBAT7U] = re32hex(bufptr);
|
||||
break;
|
||||
case 150:
|
||||
PowerPC::ppcState.spr[SPR_IBAT7L] = re32hex(bufptr);
|
||||
break;
|
||||
case 151:
|
||||
PowerPC::ppcState.spr[SPR_DBAT4U] = re32hex(bufptr);
|
||||
break;
|
||||
case 152:
|
||||
PowerPC::ppcState.spr[SPR_DBAT4L] = re32hex(bufptr);
|
||||
break;
|
||||
case 153:
|
||||
PowerPC::ppcState.spr[SPR_DBAT5U] = re32hex(bufptr);
|
||||
break;
|
||||
case 154:
|
||||
PowerPC::ppcState.spr[SPR_DBAT5L] = re32hex(bufptr);
|
||||
break;
|
||||
case 155:
|
||||
PowerPC::ppcState.spr[SPR_DBAT6U] = re32hex(bufptr);
|
||||
break;
|
||||
case 156:
|
||||
PowerPC::ppcState.spr[SPR_DBAT6L] = re32hex(bufptr);
|
||||
break;
|
||||
case 157:
|
||||
PowerPC::ppcState.spr[SPR_DBAT7U] = re32hex(bufptr);
|
||||
break;
|
||||
case 158:
|
||||
PowerPC::ppcState.spr[SPR_DBAT7L] = re32hex(bufptr);
|
||||
break;
|
||||
case 159:
|
||||
PowerPC::ppcState.spr[SPR_GQR0] = re32hex(bufptr);
|
||||
break;
|
||||
case 160:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 1] = re32hex(bufptr);
|
||||
break;
|
||||
case 161:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 2] = re32hex(bufptr);
|
||||
break;
|
||||
case 162:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 3] = re32hex(bufptr);
|
||||
break;
|
||||
case 163:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 4] = re32hex(bufptr);
|
||||
break;
|
||||
case 164:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 5] = re32hex(bufptr);
|
||||
break;
|
||||
case 165:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 6] = re32hex(bufptr);
|
||||
break;
|
||||
case 166:
|
||||
PowerPC::ppcState.spr[SPR_GQR0 + 7] = re32hex(bufptr);
|
||||
break;
|
||||
case 167:
|
||||
PowerPC::ppcState.spr[SPR_HID2] = re32hex(bufptr);
|
||||
break;
|
||||
case 168:
|
||||
PowerPC::ppcState.spr[SPR_WPAR] = re32hex(bufptr);
|
||||
break;
|
||||
case 169:
|
||||
PowerPC::ppcState.spr[SPR_DMAU] = re32hex(bufptr);
|
||||
break;
|
||||
case 170:
|
||||
PowerPC::ppcState.spr[SPR_DMAL] = re32hex(bufptr);
|
||||
break;
|
||||
case 171:
|
||||
PowerPC::ppcState.spr[SPR_ECID_U] = re32hex(bufptr);
|
||||
break;
|
||||
case 172:
|
||||
PowerPC::ppcState.spr[SPR_ECID_M] = re32hex(bufptr);
|
||||
break;
|
||||
case 173:
|
||||
PowerPC::ppcState.spr[SPR_ECID_L] = re32hex(bufptr);
|
||||
break;
|
||||
case 174:
|
||||
PowerPC::ppcState.spr[SPR_USDA] = re32hex(bufptr);
|
||||
break;
|
||||
case 175:
|
||||
PowerPC::ppcState.spr[SPR_SDA] = re32hex(bufptr);
|
||||
break;
|
||||
case 176:
|
||||
PowerPC::ppcState.spr[SPR_HID4] = re32hex(bufptr);
|
||||
break;
|
||||
case 177:
|
||||
PowerPC::ppcState.spr[SPR_TDCL] = re32hex(bufptr);
|
||||
break;
|
||||
case 178:
|
||||
PowerPC::ppcState.spr[SPR_TDCH] = re32hex(bufptr);
|
||||
break;
|
||||
default:
|
||||
return SendReply("E01");
|
||||
break;
|
||||
|
||||
@ -890,8 +890,12 @@ enum
|
||||
SPR_UPMC2 = 938,
|
||||
SPR_UPMC3 = 941,
|
||||
SPR_UPMC4 = 942,
|
||||
SPR_USDA = 943,
|
||||
SPR_SDA = 959,
|
||||
SPR_USIA = 939,
|
||||
SPR_SIA = 955,
|
||||
SPR_TDCL = 1012,
|
||||
SPR_TDCH = 1018,
|
||||
SPR_L2CR = 1017,
|
||||
SPR_ICTC = 1019,
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user