mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-03-12 06:39:14 +01:00
Remove profiled re-JIT support in JitIL.
It's extremely unsafe, unused (not exposed in the GUI and not present in any gameconfigs), and mostly obviated by fastmem. Although this type of thing could theoretically be useful someday for fastmem support with MMU, it's probably not the best way to do it, the existing implementation is way too simplistic, and it can always be dug up to provide support for a new implementation if needed. Not like it's a big deal to keep it working, but it really seems pointless.
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3b0c0e2500
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@ -409,7 +409,6 @@ void SConfig::LoadSettings()
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ini.Get("Core", "SlotB", (int*)&m_EXIDevice[1], EXIDEVICE_NONE);
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ini.Get("Core", "SerialPort1", (int*)&m_EXIDevice[2], EXIDEVICE_NONE);
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ini.Get("Core", "BBA_MAC", &m_bba_mac);
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ini.Get("Core", "ProfiledReJIT",&m_LocalCoreStartupParameter.bJITProfiledReJIT, false);
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ini.Get("Core", "TimeProfiling",&m_LocalCoreStartupParameter.bJITILTimeProfiling, false);
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ini.Get("Core", "OutputIR", &m_LocalCoreStartupParameter.bJITILOutputIR, false);
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char sidevicenum[16];
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@ -28,7 +28,7 @@ SCoreStartupParameter::SCoreStartupParameter()
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bJITLoadStoreFloatingOff(false), bJITLoadStorePairedOff(false),
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bJITFloatingPointOff(false), bJITIntegerOff(false),
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bJITPairedOff(false), bJITSystemRegistersOff(false),
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bJITBranchOff(false), bJITProfiledReJIT(false),
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bJITBranchOff(false),
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bJITILTimeProfiling(false), bJITILOutputIR(false),
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bEnableFPRF(false),
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bCPUThread(true), bDSPThread(false), bDSPHLE(true),
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@ -111,7 +111,6 @@ struct SCoreStartupParameter
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bool bJITPairedOff;
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bool bJITSystemRegistersOff;
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bool bJITBranchOff;
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bool bJITProfiledReJIT;
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bool bJITILTimeProfiling;
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bool bJITILOutputIR;
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@ -234,6 +234,4 @@ public:
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void icbi(UGeckoInstruction inst);
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};
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void ProfiledReJit();
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#endif // _JIT64_H
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@ -56,9 +56,6 @@ struct RegInfo {
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InstLoc fregs[MAX_NUMBER_OF_REGS];
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unsigned numSpills;
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unsigned numFSpills;
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bool MakeProfile;
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bool UseProfile;
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unsigned numProfiledLoads;
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unsigned exitNumber;
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RegInfo(JitIL* j, InstLoc f, unsigned insts) : Jit(j), FirstI(f), IInfo(insts), lastUsed(insts) {
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@ -68,9 +65,7 @@ struct RegInfo {
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}
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numSpills = 0;
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numFSpills = 0;
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numProfiledLoads = 0;
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exitNumber = 0;
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MakeProfile = UseProfile = false;
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}
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private:
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@ -106,7 +101,6 @@ static unsigned regReadUse(RegInfo& R, InstLoc I) {
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}
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static unsigned SlotSet[1000];
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static unsigned ProfiledLoads[1000];
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static u8 GC_ALIGNED16(FSlotSet[16*1000]);
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static OpArg regLocForSlot(RegInfo& RI, unsigned slot) {
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@ -440,47 +434,14 @@ static void regMarkMemAddress(RegInfo& RI, InstLoc I, InstLoc AI, unsigned OpNum
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regMarkUse(RI, I, AI, OpNum);
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}
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static void regClearDeadMemAddress(RegInfo& RI, InstLoc I, InstLoc AI, unsigned OpNum) {
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if (!(RI.IInfo[I - RI.FirstI] & (2 << OpNum)))
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return;
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if (isImm(*AI)) {
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unsigned addr = RI.Build->GetImmValue(AI);
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if (Memory::IsRAMAddress(addr)) {
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return;
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}
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}
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InstLoc AddrBase;
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if (getOpcode(*AI) == Add && isImm(*getOp2(AI))) {
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AddrBase = getOp1(AI);
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} else {
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AddrBase = AI;
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}
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regClearInst(RI, AddrBase);
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}
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// in 64-bit build, this returns a completely bizarre address sometimes!
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static OpArg regBuildMemAddress(RegInfo& RI, InstLoc I, InstLoc AI,
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unsigned OpNum, unsigned Size, X64Reg* dest,
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bool Profiled,
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unsigned ProfileOffset = 0) {
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unsigned OpNum, unsigned Size, X64Reg* dest) {
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if (isImm(*AI)) {
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unsigned addr = RI.Build->GetImmValue(AI);
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if (Memory::IsRAMAddress(addr)) {
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if (dest)
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*dest = regFindFreeReg(RI);
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#ifdef _M_IX86
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// 32-bit
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if (Profiled)
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return M((void*)((u8*)Memory::base + (addr & Memory::MEMVIEW32_MASK)));
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return M((void*)addr);
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#else
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// 64-bit
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if (Profiled) {
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RI.Jit->LEA(32, EAX, M((void*)(u64)addr));
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return MComplex(RBX, EAX, SCALE_1, 0);
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}
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return M((void*)(u64)addr);
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#endif
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}
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}
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unsigned offset;
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@ -512,44 +473,12 @@ static OpArg regBuildMemAddress(RegInfo& RI, InstLoc I, InstLoc AI,
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} else {
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baseReg = regEnsureInReg(RI, AddrBase);
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}
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if (Profiled) {
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// (Profiled mode isn't the default, at least for the moment)
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#ifdef _M_IX86
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return MDisp(baseReg, (u32)Memory::base + offset + ProfileOffset);
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#else
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RI.Jit->LEA(32, EAX, MDisp(baseReg, offset));
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return MComplex(RBX, EAX, SCALE_1, 0);
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#endif
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}
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return MDisp(baseReg, offset);
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}
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static void regEmitMemLoad(RegInfo& RI, InstLoc I, unsigned Size) {
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if (RI.UseProfile) {
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unsigned curLoad = ProfiledLoads[RI.numProfiledLoads++];
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if (!(curLoad & 0x0C000000)) {
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X64Reg reg;
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OpArg addr = regBuildMemAddress(RI, I, getOp1(I), 1,
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Size, ®, true,
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-(curLoad & 0xC0000000));
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RI.Jit->MOVZX(32, Size, reg, addr);
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RI.Jit->BSWAP(Size, reg);
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if (regReadUse(RI, I))
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RI.regs[reg] = I;
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return;
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}
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}
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X64Reg reg;
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OpArg addr = regBuildMemAddress(RI, I, getOp1(I), 1, Size, ®, false);
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RI.Jit->LEA(32, ECX, addr);
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if (RI.MakeProfile) {
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RI.Jit->MOV(32, M(&ProfiledLoads[RI.numProfiledLoads++]), R(ECX));
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}
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u32 mem_mask = 0;
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU || SConfig::GetInstance().m_LocalCoreStartupParameter.bTLBHack)
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mem_mask = 0x20000000;
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OpArg addr = regBuildMemAddress(RI, I, getOp1(I), 1, Size, ®);
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RI.Jit->TEST(32, R(ECX), Imm32(0x0C000000 | mem_mask));
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FixupBranch argh = RI.Jit->J_CC(CC_Z);
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@ -580,19 +509,6 @@ static void regEmitMemLoad(RegInfo& RI, InstLoc I, unsigned Size) {
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RI.regs[reg] = I;
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}
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static OpArg regSwappedImmForConst(RegInfo& RI, InstLoc I, unsigned Size) {
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unsigned imm = RI.Build->GetImmValue(I);
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if (Size == 32) {
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imm = Common::swap32(imm);
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return Imm32(imm);
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} else if (Size == 16) {
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imm = Common::swap16(imm);
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return Imm16(imm);
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} else {
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return Imm8(imm);
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}
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}
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static OpArg regImmForConst(RegInfo& RI, InstLoc I, unsigned Size) {
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unsigned imm = RI.Build->GetImmValue(I);
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if (Size == 32) {
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@ -605,42 +521,7 @@ static OpArg regImmForConst(RegInfo& RI, InstLoc I, unsigned Size) {
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}
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static void regEmitMemStore(RegInfo& RI, InstLoc I, unsigned Size) {
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if (RI.UseProfile) {
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unsigned curStore = ProfiledLoads[RI.numProfiledLoads++];
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if (!(curStore & 0x0C000000)) {
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OpArg addr = regBuildMemAddress(RI, I, getOp2(I), 2,
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Size, 0, true,
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-(curStore & 0xC0000000));
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if (isImm(*getOp1(I))) {
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RI.Jit->MOV(Size, addr, regSwappedImmForConst(RI, getOp1(I), Size));
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} else {
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RI.Jit->MOV(32, R(ECX), regLocForInst(RI, getOp1(I)));
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RI.Jit->BSWAP(Size, ECX);
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RI.Jit->MOV(Size, addr, R(ECX));
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}
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if (RI.IInfo[I - RI.FirstI] & 4)
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regClearInst(RI, getOp1(I));
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return;
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} else if ((curStore & 0xFFFFF000) == 0xCC008000) {
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regSpill(RI, EAX);
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if (isImm(*getOp1(I))) {
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RI.Jit->MOV(Size, R(ECX), regSwappedImmForConst(RI, getOp1(I), Size));
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} else {
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RI.Jit->MOV(32, R(ECX), regLocForInst(RI, getOp1(I)));
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RI.Jit->BSWAP(Size, ECX);
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}
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RI.Jit->MOV(32, R(EAX), M(&GPFifo::m_gatherPipeCount));
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RI.Jit->MOV(Size, MDisp(EAX, (u32)(u64)GPFifo::m_gatherPipe), R(ECX));
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RI.Jit->ADD(32, R(EAX), Imm8(Size >> 3));
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RI.Jit->MOV(32, M(&GPFifo::m_gatherPipeCount), R(EAX));
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RI.Jit->js.fifoBytesThisBlock += Size >> 3;
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if (RI.IInfo[I - RI.FirstI] & 4)
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regClearInst(RI, getOp1(I));
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regClearDeadMemAddress(RI, I, getOp2(I), 2);
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return;
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}
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}
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OpArg addr = regBuildMemAddress(RI, I, getOp2(I), 2, Size, 0, false);
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OpArg addr = regBuildMemAddress(RI, I, getOp2(I), 2, Size, 0);
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RI.Jit->LEA(32, ECX, addr);
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regSpill(RI, EAX);
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if (isImm(*getOp1(I))) {
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@ -648,9 +529,6 @@ static void regEmitMemStore(RegInfo& RI, InstLoc I, unsigned Size) {
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} else {
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RI.Jit->MOV(32, R(EAX), regLocForInst(RI, getOp1(I)));
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}
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if (RI.MakeProfile) {
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RI.Jit->MOV(32, M(&ProfiledLoads[RI.numProfiledLoads++]), R(ECX));
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}
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RI.Jit->SafeWriteRegToReg(EAX, ECX, Size, 0, regsInUse(RI));
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if (RI.IInfo[I - RI.FirstI] & 4)
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regClearInst(RI, getOp1(I));
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@ -704,18 +582,6 @@ static void regEmitICmpInst(RegInfo& RI, InstLoc I, CCFlags flag) {
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}
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static void regWriteExit(RegInfo& RI, InstLoc dest) {
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if (RI.MakeProfile) {
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if (isImm(*dest)) {
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RI.Jit->MOV(32, M(&PC), Imm32(RI.Build->GetImmValue(dest)));
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} else {
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RI.Jit->MOV(32, R(EAX), regLocForInst(RI, dest));
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RI.Jit->MOV(32, M(&PC), R(EAX));
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}
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RI.Jit->Cleanup();
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RI.Jit->SUB(32, M(&CoreTiming::downcount), Imm32(RI.Jit->js.downcountAmount));
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RI.Jit->JMP(((JitIL *)jit)->asm_routines.doReJit, true);
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return;
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}
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if (isImm(*dest)) {
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RI.Jit->WriteExit(RI.Build->GetImmValue(dest), RI.exitNumber++);
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} else {
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@ -729,12 +595,10 @@ static bool checkIsSNAN() {
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return MathUtil::IsSNAN(isSNANTemp[0][0]) || MathUtil::IsSNAN(isSNANTemp[1][0]);
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}
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static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool MakeProfile) {
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static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit) {
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//printf("Writing block: %x\n", js.blockStart);
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RegInfo RI(Jit, ibuild->getFirstInst(), ibuild->getNumInsts());
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RI.Build = ibuild;
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RI.UseProfile = UseProfile;
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RI.MakeProfile = MakeProfile;
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// Pass to compute liveness
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ibuild->StartBackPass();
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for (unsigned int index = (unsigned int)RI.IInfo.size() - 1; index != -1U; --index) {
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@ -1997,22 +1861,10 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
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}
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}
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//if (!RI.MakeProfile && RI.numSpills)
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// printf("Block: %x, numspills %d\n", Jit->js.blockStart, RI.numSpills);
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Jit->WriteExit(jit->js.curBlock->exitAddress[0], 0);
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Jit->UD2();
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}
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void JitIL::WriteCode() {
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DoWriteCode(&ibuild, this, false, SConfig::GetInstance().m_LocalCoreStartupParameter.bJITProfiledReJIT);
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}
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void ProfiledReJit() {
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JitIL *jitil = (JitIL *)jit;
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jitil->SetCodePtr(jitil->js.rewriteStart);
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DoWriteCode(&jitil->ibuild, jitil, true, false);
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jitil->js.curBlock->codeSize = (int)(jitil->GetCodePtr() - jitil->js.rewriteStart);
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jitil->GetBlockCache()->FinalizeBlock(jitil->js.curBlock->blockNum, jitil->jo.enableBlocklink,
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jitil->js.curBlock->normalEntry);
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DoWriteCode(&ibuild, this);
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}
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void Jit(u32 em_address);
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void ProfiledReJit();
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#endif // _JITIL_H
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@ -233,13 +233,6 @@ void JitILAsmRoutineManager::GenerateCommon()
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fifoDirectWriteXmm64 = AlignCode4();
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GenFifoXmm64Write();
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doReJit = AlignCode4();
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ABI_AlignStack(0);
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CALL(reinterpret_cast<void *>(&ProfiledReJit));
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ABI_RestoreStack(0);
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SUB(32, M(&CoreTiming::downcount), Imm8(0));
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JMP(dispatcher, true);
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GenQuantizedLoads();
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GenQuantizedStores();
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GenQuantizedSingleStores();
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@ -38,8 +38,6 @@ public:
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void Shutdown() {
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FreeCodeSpace();
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}
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const u8 *doReJit;
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};
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extern JitILAsmRoutineManager jitil_asm_routines;
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