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JitArm64: Implement memcheck for lXX/stX without update

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This commit is contained in:
JosJuice 2021-06-28 18:42:08 +02:00
parent 8c905e152a
commit ab1ceee16f
2 changed files with 10 additions and 2 deletions
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6
Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
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@ -15,6 +15,7 @@
#include "Common/Swap.h" #include "Common/Swap.h"
#include "Core/HW/Memmap.h" #include "Core/HW/Memmap.h"
#include "Core/PowerPC/Gekko.h"
#include "Core/PowerPC/JitArm64/Jit.h" #include "Core/PowerPC/JitArm64/Jit.h"
#include "Core/PowerPC/JitArm64/Jit_Util.h" #include "Core/PowerPC/JitArm64/Jit_Util.h"
#include "Core/PowerPC/JitArmCommon/BackPatch.h" #include "Core/PowerPC/JitArmCommon/BackPatch.h"
@ -120,6 +121,8 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
if (!fastmem || do_farcode) if (!fastmem || do_farcode)
{ {
const bool memcheck = jo.memcheck && !emitting_routine;
if (fastmem && do_farcode) if (fastmem && do_farcode)
{ {
in_far_code = true; in_far_code = true;
@ -223,6 +226,9 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
m_float_emit.ABI_PopRegisters(fprs_to_push, ARM64Reg::X30); m_float_emit.ABI_PopRegisters(fprs_to_push, ARM64Reg::X30);
ABI_PopRegisters(gprs_to_push); ABI_PopRegisters(gprs_to_push);
if (memcheck)
WriteConditionalExceptionExit(EXCEPTION_DSI, ARM64Reg::W0);
} }
if (in_far_code) if (in_far_code)

6
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
View File

@ -306,7 +306,6 @@ void JitArm64::lXX(UGeckoInstruction inst)
{ {
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff); JITDISABLE(bJITLoadStoreOff);
FALLBACK_IF(jo.memcheck);
u32 a = inst.RA, b = inst.RB, d = inst.RD; u32 a = inst.RA, b = inst.RB, d = inst.RD;
s32 offset = inst.SIMM_16; s32 offset = inst.SIMM_16;
@ -378,6 +377,8 @@ void JitArm64::lXX(UGeckoInstruction inst)
break; break;
} }
FALLBACK_IF(jo.memcheck && update);
SafeLoadToReg(d, update ? a : (a ? a : -1), offsetReg, flags, offset, update); SafeLoadToReg(d, update ? a : (a ? a : -1), offsetReg, flags, offset, update);
} }
@ -385,7 +386,6 @@ void JitArm64::stX(UGeckoInstruction inst)
{ {
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff); JITDISABLE(bJITLoadStoreOff);
FALLBACK_IF(jo.memcheck);
u32 a = inst.RA, b = inst.RB, s = inst.RS; u32 a = inst.RA, b = inst.RB, s = inst.RS;
s32 offset = inst.SIMM_16; s32 offset = inst.SIMM_16;
@ -444,6 +444,8 @@ void JitArm64::stX(UGeckoInstruction inst)
break; break;
} }
FALLBACK_IF(jo.memcheck && update);
SafeStoreFromReg(update ? a : (a ? a : -1), s, regOffset, flags, offset); SafeStoreFromReg(update ? a : (a ? a : -1), s, regOffset, flags, offset);
if (update) if (update)