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JitArm64_Integer: addex - Optimize InPPCState case for 0
Same optimization we did for subfex. Skip loading the carry flag into a temporary register first when we're dealing with zero. Before: 0x394bd3b8 ldrb w24, [x29, #0x2f4] 0x2a1803f9 mov w25, w24 After: 0x394bd3b9 ldrb w25, [x29, #0x2f4]
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@ -1468,40 +1468,51 @@ void JitArm64::addex(UGeckoInstruction inst)
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if (gpr.IsImm(a) && (mex || gpr.IsImm(b)))
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if (gpr.IsImm(a) && (mex || gpr.IsImm(b)))
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{
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{
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u32 i = gpr.GetImm(a), j = mex ? -1 : gpr.GetImm(b);
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const u32 i = gpr.GetImm(a), j = mex ? -1 : gpr.GetImm(b);
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const u32 imm = i + j;
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gpr.BindToRegister(d, false);
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const bool is_zero = imm == 0;
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const bool is_all_ones = imm == 0xFFFFFFFF;
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switch (js.carryFlag)
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switch (js.carryFlag)
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{
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{
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case CarryFlag::InPPCState:
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case CarryFlag::InPPCState:
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{
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{
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auto WA = gpr.GetScopedReg();
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gpr.BindToRegister(d, false);
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LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
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ARM64Reg RD = gpr.R(d);
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ADDI2R(gpr.R(d), WA, i + j, gpr.R(d));
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if (is_zero)
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{
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LDRB(IndexType::Unsigned, RD, PPC_REG, PPCSTATE_OFF(xer_ca));
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}
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else
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{
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auto WA = gpr.GetScopedReg();
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LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
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ADDI2R(RD, WA, imm, RD);
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}
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break;
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break;
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}
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}
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case CarryFlag::InHostCarry:
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case CarryFlag::InHostCarry:
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{
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{
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gpr.BindToRegister(d, false);
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ARM64Reg RD = gpr.R(d);
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ARM64Reg RD = gpr.R(d);
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MOVI2R(RD, i + j);
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MOVI2R(RD, imm);
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ADC(RD, RD, ARM64Reg::WZR);
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ADC(RD, RD, ARM64Reg::WZR);
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break;
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break;
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}
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}
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case CarryFlag::ConstantTrue:
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case CarryFlag::ConstantTrue:
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{
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{
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gpr.SetImmediate(d, i + j + 1);
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gpr.SetImmediate(d, imm + 1);
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break;
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break;
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}
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}
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case CarryFlag::ConstantFalse:
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case CarryFlag::ConstantFalse:
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{
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{
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gpr.SetImmediate(d, i + j);
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gpr.SetImmediate(d, imm);
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break;
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break;
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}
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}
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}
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}
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const bool must_have_carry = Interpreter::Helper_Carry(i, j);
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const bool must_have_carry = Interpreter::Helper_Carry(i, j);
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const bool might_have_carry = (i + j) == 0xFFFFFFFF;
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const bool might_have_carry = is_all_ones;
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if (must_have_carry)
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if (must_have_carry)
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{
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{
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