mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-03-10 19:47:40 +01:00
[ARM] Add NEON VORR and fix encoding on NEON VEOR. Remove VMRS_APSR because it is the same as VMRS(PC)
This commit is contained in:
parent
f0fc611f15
commit
beb41a8f56
@ -1069,9 +1069,6 @@ void ARMXEmitter::VSTR(ARMReg Src, ARMReg Base, s16 offset)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARMXEmitter::VMRS_APSR() {
|
|
||||||
Write32(condition | 0xEF10A10 | (15 << 12));
|
|
||||||
}
|
|
||||||
void ARMXEmitter::VMRS(ARMReg Rt) {
|
void ARMXEmitter::VMRS(ARMReg Rt) {
|
||||||
Write32(condition | (0xEF << 20) | (1 << 16) | (Rt << 12) | 0xA10);
|
Write32(condition | (0xEF << 20) | (1 << 16) | (Rt << 12) | 0xA10);
|
||||||
}
|
}
|
||||||
@ -1339,12 +1336,25 @@ void NEONXEmitter::VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
|
|||||||
{
|
{
|
||||||
bool register_quad = Vd >= Q0;
|
bool register_quad = Vd >= Q0;
|
||||||
Vd = SubBase(Vd);
|
Vd = SubBase(Vd);
|
||||||
|
Vn = SubBase(Vn);
|
||||||
Vm = SubBase(Vm);
|
Vm = SubBase(Vm);
|
||||||
|
|
||||||
Write32((0xF3 << 24) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
|
Write32((0xF3 << 24) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
|
||||||
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
|
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
|
||||||
| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
|
| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
|
||||||
}
|
}
|
||||||
|
void NEONXEmitter::VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
|
||||||
|
{
|
||||||
|
bool register_quad = Vd >= Q0;
|
||||||
|
Vd = SubBase(Vd);
|
||||||
|
Vn = SubBase(Vn);
|
||||||
|
Vm = SubBase(Vm);
|
||||||
|
|
||||||
|
Write32((0xF2 << 24) | (0x1 << 21) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
|
||||||
|
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
|
||||||
|
| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -561,7 +561,6 @@ public:
|
|||||||
void VMOV(ARMReg Dest, ARMReg Src);
|
void VMOV(ARMReg Dest, ARMReg Src);
|
||||||
void VCVT(ARMReg Dest, ARMReg Src, int flags);
|
void VCVT(ARMReg Dest, ARMReg Src, int flags);
|
||||||
|
|
||||||
void VMRS_APSR();
|
|
||||||
void VMRS(ARMReg Rt);
|
void VMRS(ARMReg Rt);
|
||||||
void VMSR(ARMReg Rt);
|
void VMSR(ARMReg Rt);
|
||||||
|
|
||||||
@ -636,6 +635,7 @@ public:
|
|||||||
void VREV16(NEONElementType Size, ARMReg Vd, ARMReg Vm);
|
void VREV16(NEONElementType Size, ARMReg Vd, ARMReg Vm);
|
||||||
|
|
||||||
void VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
|
void VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
|
||||||
|
void VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
|
||||||
|
|
||||||
void VLD1(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
|
void VLD1(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
|
||||||
void VLD2(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
|
void VLD2(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
|
||||||
|
Loading…
x
Reference in New Issue
Block a user