Jit_Integer: rlwimix: Flatten logic

This commit is contained in:
MerryMage 2020-12-28 12:53:24 +00:00
parent 0ef1fcdeb9
commit c20bb81071

View File

@ -1667,7 +1667,10 @@ void Jit64::rlwimix(UGeckoInstruction inst)
} }
else else
{ {
const bool left_shift = mask == 0U - (1U << inst.SH);
const bool right_shift = mask == (1U << inst.SH) - 1;
bool needs_test = false; bool needs_test = false;
if (mask == 0 || (a == s && inst.SH == 0)) if (mask == 0 || (a == s && inst.SH == 0))
{ {
needs_test = true; needs_test = true;
@ -1687,11 +1690,7 @@ void Jit64::rlwimix(UGeckoInstruction inst)
AndWithMask(Ra, ~mask); AndWithMask(Ra, ~mask);
OR(32, Ra, Imm32(Common::RotateLeft(gpr.Imm32(s), inst.SH) & mask)); OR(32, Ra, Imm32(Common::RotateLeft(gpr.Imm32(s), inst.SH) & mask));
} }
else if (inst.SH) else if (inst.SH && gpr.IsImm(a))
{
bool isLeftShift = mask == 0U - (1U << inst.SH);
bool isRightShift = mask == (1U << inst.SH) - 1;
if (gpr.IsImm(a))
{ {
u32 maskA = gpr.Imm32(a) & ~mask; u32 maskA = gpr.Imm32(a) & ~mask;
@ -1699,12 +1698,12 @@ void Jit64::rlwimix(UGeckoInstruction inst)
RCX64Reg Ra = gpr.Bind(a, RCMode::Write); RCX64Reg Ra = gpr.Bind(a, RCMode::Write);
RegCache::Realize(Rs, Ra); RegCache::Realize(Rs, Ra);
if (isLeftShift) if (left_shift)
{ {
MOV(32, Ra, Rs); MOV(32, Ra, Rs);
SHL(32, Ra, Imm8(inst.SH)); SHL(32, Ra, Imm8(inst.SH));
} }
else if (isRightShift) else if (right_shift)
{ {
MOV(32, Ra, Rs); MOV(32, Ra, Rs);
SHR(32, Ra, Imm8(32 - inst.SH)); SHR(32, Ra, Imm8(32 - inst.SH));
@ -1716,21 +1715,21 @@ void Jit64::rlwimix(UGeckoInstruction inst)
} }
OR(32, Ra, Imm32(maskA)); OR(32, Ra, Imm32(maskA));
} }
else else if (inst.SH)
{ {
// TODO: common cases of this might be faster with pinsrb or abuse of AH // TODO: common cases of this might be faster with pinsrb or abuse of AH
RCOpArg Rs = gpr.Use(s, RCMode::Read); RCOpArg Rs = gpr.Use(s, RCMode::Read);
RCX64Reg Ra = gpr.Bind(a, RCMode::ReadWrite); RCX64Reg Ra = gpr.Bind(a, RCMode::ReadWrite);
RegCache::Realize(Rs, Ra); RegCache::Realize(Rs, Ra);
if (isLeftShift) if (left_shift)
{ {
MOV(32, R(RSCRATCH), Rs); MOV(32, R(RSCRATCH), Rs);
SHL(32, R(RSCRATCH), Imm8(inst.SH)); SHL(32, R(RSCRATCH), Imm8(inst.SH));
AndWithMask(Ra, ~mask); AndWithMask(Ra, ~mask);
OR(32, Ra, R(RSCRATCH)); OR(32, Ra, R(RSCRATCH));
} }
else if (isRightShift) else if (right_shift)
{ {
MOV(32, R(RSCRATCH), Rs); MOV(32, R(RSCRATCH), Rs);
SHR(32, R(RSCRATCH), Imm8(32 - inst.SH)); SHR(32, R(RSCRATCH), Imm8(32 - inst.SH));
@ -1745,7 +1744,6 @@ void Jit64::rlwimix(UGeckoInstruction inst)
XOR(32, Ra, R(RSCRATCH)); XOR(32, Ra, R(RSCRATCH));
} }
} }
}
else else
{ {
RCX64Reg Rs = gpr.Bind(s, RCMode::Read); RCX64Reg Rs = gpr.Bind(s, RCMode::Read);