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DSPLLE: fixed 0x20 handling, we still don't know what it is good for

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3980 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee 2009-08-14 10:40:35 +00:00
parent 153ec6836e
commit c4dda436c6
3 changed files with 12 additions and 8 deletions
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2
Source/Core/DSPCore/Src/DSPCore.h
View File

@ -150,7 +150,7 @@
#define SR_ARITH_ZERO 0x0004
#define SR_SIGN 0x0008
#define SR_10 0x0010 // seem to be set by tst
#define SR_TOP2BITS 0x0020 // this is an odd one. (set by tst)
#define SR_TOP2BITS 0x0020 // if the upper 2 bits are equal
#define SR_LOGIC_ZERO 0x0040
#define SR_INT_ENABLE 0x0200 // Not 100% sure but duddie says so. This should replace the hack, if so.
#define SR_EXT_INT_ENABLE 0x0800 // Appears in zelda - seems to disable external interupts

16
Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
View File

@ -28,6 +28,7 @@ namespace DSPInterpreter {
void Update_SR_Register64(s64 _Value)
{
// TODO: Should also set 0x10 and 0x01
g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
if (_Value < 0)
@ -40,17 +41,20 @@ void Update_SR_Register64(s64 _Value)
g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
}
// weird
if ((_Value >> 62) == 0)
// Checks if top bits are equal, what is it good for?
if ((_Value >> 62) == 0 || _Value >> 62 == 3)
{
g_dsp.r[DSP_REG_SR] |= 0x20;
g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
}
}
void Update_SR_Register16(s16 _Value)
{
g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
// Only sets those 3 bits
if (_Value < 0)
{
g_dsp.r[DSP_REG_SR] |= SR_SIGN;
@ -61,10 +65,10 @@ void Update_SR_Register16(s16 _Value)
g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
}
// weird
if ((_Value >> 14) == 0)
// Checks if top bits are equal, what is it good for?
if ((_Value >> 14) == 0 || _Value >> 14 == 3)
{
g_dsp.r[DSP_REG_SR] |= 0x20;
g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
}
}

2
Source/Core/DSPCore/Src/DspIntArithmetic.cpp
View File

@ -461,7 +461,7 @@ void addax(const UDSPInstruction& opc)
// ADDR $acD.M, $axS.L
// 0100 0ssd xxxx xxxx
// Adds register $axS.L to accumulator $acD register.
// Adds register $axS.L to accumulator $acD.M register.
void addr(const UDSPInstruction& opc)
{
u8 areg = (opc.hex >> 8) & 0x1;