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Run code through the advanced tool 'sed' to remove trailing whitespace.

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This commit is contained in:
comex 2013-10-29 01:23:17 -04:00
parent 965b32be9c
commit c579637eaf
568 changed files with 8650 additions and 8654 deletions
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4
Source/Core/AudioCommon/Src/AOSoundStream.h
View File

@ -42,8 +42,8 @@ public:
return true;
}
virtual bool usesMixer() const {
return true;
virtual bool usesMixer() const {
return true;
}
virtual void Update();

36
Source/Core/AudioCommon/Src/AlsaSoundStream.cpp
View File

@ -57,7 +57,7 @@ void AlsaSound::SoundLoop()
// Underrun
snd_pcm_prepare(handle);
}
else if (rc < 0)
else if (rc < 0)
{
ERROR_LOG(AUDIO, "writei fail: %s", snd_strerror(rc));
}
@ -77,7 +77,7 @@ bool AlsaSound::AlsaInit()
unsigned int periods;
err = snd_pcm_open(&handle, "default", SND_PCM_STREAM_PLAYBACK, 0);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Audio open error: %s\n", snd_strerror(err));
return false;
@ -86,21 +86,21 @@ bool AlsaSound::AlsaInit()
snd_pcm_hw_params_alloca(&hwparams);
err = snd_pcm_hw_params_any(handle, hwparams);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Broken configuration for this PCM: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_hw_params_set_access(handle, hwparams, SND_PCM_ACCESS_RW_INTERLEAVED);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Access type not available: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_hw_params_set_format(handle, hwparams, SND_PCM_FORMAT_S16_LE);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Sample format not available: %s\n", snd_strerror(err));
return false;
@ -108,14 +108,14 @@ bool AlsaSound::AlsaInit()
dir = 0;
err = snd_pcm_hw_params_set_rate_near(handle, hwparams, &sample_rate, &dir);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Rate not available: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_hw_params_set_channels(handle, hwparams, 2);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Channels count not available: %s\n", snd_strerror(err));
return false;
@ -123,7 +123,7 @@ bool AlsaSound::AlsaInit()
periods = BUFFER_SIZE_MAX / FRAME_COUNT_MIN;
err = snd_pcm_hw_params_set_periods_max(handle, hwparams, &periods, &dir);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Cannot set Minimum periods: %s\n", snd_strerror(err));
return false;
@ -131,34 +131,34 @@ bool AlsaSound::AlsaInit()
buffer_size_max = BUFFER_SIZE_MAX;
err = snd_pcm_hw_params_set_buffer_size_max(handle, hwparams, &buffer_size_max);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Cannot set minimum buffer size: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_hw_params(handle, hwparams);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Unable to install hw params: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_hw_params_get_buffer_size(hwparams, &buffer_size);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Cannot get buffer size: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_hw_params_get_periods_max(hwparams, &periods, &dir);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Cannot get periods: %s\n", snd_strerror(err));
return false;
}
//periods is the number of fragments alsa can wait for during one
//periods is the number of fragments alsa can wait for during one
//buffer_size
frames_to_deliver = buffer_size / periods;
//limit the minimum size. pulseaudio advertises a minimum of 32 samples.
@ -172,28 +172,28 @@ bool AlsaSound::AlsaInit()
snd_pcm_sw_params_alloca(&swparams);
err = snd_pcm_sw_params_current(handle, swparams);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "cannot init sw params: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_sw_params_set_start_threshold(handle, swparams, 0U);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "cannot set start thresh: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_sw_params(handle, swparams);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "cannot set sw params: %s\n", snd_strerror(err));
return false;
}
err = snd_pcm_prepare(handle);
if (err < 0)
if (err < 0)
{
ERROR_LOG(AUDIO, "Unable to prepare: %s\n", snd_strerror(err));
return false;

4
Source/Core/AudioCommon/Src/AlsaSoundStream.h
View File

@ -28,8 +28,8 @@ public:
static bool isValid() {
return true;
}
virtual bool usesMixer() const {
return true;
virtual bool usesMixer() const {
return true;
}
virtual void Update();

14
Source/Core/AudioCommon/Src/AudioCommon.cpp
View File

@ -22,7 +22,7 @@
SoundStream *soundStream = nullptr;
namespace AudioCommon
{
{
SoundStream *InitSoundStream(CMixer *mixer)
{
// TODO: possible memleak with mixer
@ -51,7 +51,7 @@ namespace AudioCommon
soundStream = new PulseAudio(mixer);
else if (backend == BACKEND_OPENSLES && OpenSLESStream::isValid())
soundStream = new OpenSLESStream(mixer);
if (!soundStream && NullSound::isValid())
{
WARN_LOG(DSPHLE, "Could not initialize backend %s, using %s instead.",
@ -83,11 +83,11 @@ namespace AudioCommon
return nullptr;
}
void ShutdownSoundStream()
void ShutdownSoundStream()
{
INFO_LOG(DSPHLE, "Shutting down sound stream");
if (soundStream)
if (soundStream)
{
soundStream->Stop();
if (SConfig::GetInstance().m_DumpAudio)
@ -97,10 +97,10 @@ namespace AudioCommon
soundStream = nullptr;
}
INFO_LOG(DSPHLE, "Done shutting down sound stream");
INFO_LOG(DSPHLE, "Done shutting down sound stream");
}
std::vector<std::string> GetSoundBackends()
std::vector<std::string> GetSoundBackends()
{
std::vector<std::string> backends;
@ -125,7 +125,7 @@ namespace AudioCommon
return backends;
}
bool UseJIT()
bool UseJIT()
{
if (!Movie::IsDSPHLE() && Movie::IsPlayingInput() && Movie::IsConfigSaved())
{

2
Source/Core/AudioCommon/Src/AudioCommon.h
View File

@ -38,7 +38,7 @@ union UDSPControl
UDSPControl(u16 _Hex = 0) : Hex(_Hex) {}
};
namespace AudioCommon
namespace AudioCommon
{
SoundStream *InitSoundStream(CMixer *mixer);
void ShutdownSoundStream();

2
Source/Core/AudioCommon/Src/DSoundStream.h
View File

@ -59,7 +59,7 @@ public:
{}
virtual ~DSound() {}
virtual bool Start();
virtual void SoundLoop();
virtual void SetVolume(int volume);

16
Source/Core/AudioCommon/Src/Mixer.cpp
View File

@ -52,7 +52,7 @@ unsigned int CMixer::Mix(short* samples, unsigned int numSamples)
// interpolation loop.
u32 indexR = Common::AtomicLoad(m_indexR);
u32 indexW = Common::AtomicLoad(m_indexW);
if (m_AIplaying) {
numLeft = (numLeft > numSamples) ? numSamples : numLeft;
@ -125,8 +125,8 @@ unsigned int CMixer::Mix(short* samples, unsigned int numSamples)
*(u32*)(samples+i) = *(u32*)(s);
// memset(&samples[numLeft * 2], 0, (numSamples - numLeft) * 4);
}
// Flush cached variable
// Flush cached variable
Common::AtomicStore(m_indexR, indexR);
//when logging, also throttle HLE audio
@ -158,13 +158,13 @@ void CMixer::PushSamples(const short *samples, unsigned int num_samples)
// indexR isn't allowed to cache in the audio throttling loop as it
// needs to get updates to not deadlock.
u32 indexW = Common::AtomicLoad(m_indexW);
if (m_throttle)
{
// The auto throttle function. This loop will put a ceiling on the CPU MHz.
while (num_samples * 2 + ((indexW - Common::AtomicLoad(m_indexR)) & INDEX_MASK) >= MAX_SAMPLES * 2)
{
if (*PowerPC::GetStatePtr() != PowerPC::CPU_RUNNING || soundStream->IsMuted())
if (*PowerPC::GetStatePtr() != PowerPC::CPU_RUNNING || soundStream->IsMuted())
break;
// Shortcut key for Throttle Skipping
if (Host_GetKeyState('\t'))
@ -192,9 +192,9 @@ void CMixer::PushSamples(const short *samples, unsigned int num_samples)
{
memcpy(&m_buffer[indexW & INDEX_MASK], samples, num_samples * 4);
}
Common::AtomicAdd(m_indexW, num_samples * 2);
return;
}
@ -206,7 +206,7 @@ unsigned int CMixer::GetNumSamples()
// We also can't say the current interpolation state (specially
// the frac), so to be sure, subtract one again to be sure not
// to underflow the fifo.
u32 numSamples = ((Common::AtomicLoad(m_indexW) - Common::AtomicLoad(m_indexR)) & INDEX_MASK) / 2;
if (AudioInterface::GetAIDSampleRate() == m_sampleRate)

4
Source/Core/AudioCommon/Src/Mixer.h
View File

@ -14,7 +14,7 @@
#define RESERVED_SAMPLES (256)
class CMixer {
public:
CMixer(unsigned int AISampleRate = 48000, unsigned int DACSampleRate = 48000, unsigned int BackendSampleRate = 32000)
: m_aiSampleRate(AISampleRate)
@ -89,7 +89,7 @@ protected:
int m_channels;
WaveFileWriter g_wave_writer;
bool m_HLEready;
bool m_logAudio;

2
Source/Core/AudioCommon/Src/OpenSLESStream.cpp
View File

@ -21,7 +21,7 @@ static SLPlayItf bqPlayerPlay;
static SLAndroidSimpleBufferQueueItf bqPlayerBufferQueue;
static SLMuteSoloItf bqPlayerMuteSolo;
static SLVolumeItf bqPlayerVolume;
static CMixer *g_mixer;
static CMixer *g_mixer;
#define BUFFER_SIZE 512
#define BUFFER_SIZE_IN_SAMPLES (BUFFER_SIZE / 2)

2
Source/Core/AudioCommon/Src/PulseAudioStream.h
View File

@ -24,7 +24,7 @@ public:
PulseAudio(CMixer *mixer);
virtual bool Start();
virtual void Stop();
virtual void Stop();
static bool isValid() {return true;}

4
Source/Core/AudioCommon/Src/SoundStream.h
View File

@ -21,11 +21,11 @@ protected:
WaveFileWriter g_wave_writer;
bool m_muted;
public:
public:
SoundStream(CMixer *mixer) : m_mixer(mixer), threadData(0), m_logAudio(false), m_muted(false) {}
virtual ~SoundStream() { delete m_mixer; }
static bool isValid() { return false; }
static bool isValid() { return false; }
virtual CMixer *GetMixer() const { return m_mixer; }
virtual bool Start() { return false; }
virtual void SetVolume(int) {}

2
Source/Core/AudioCommon/Src/WaveFile.cpp
View File

@ -121,7 +121,7 @@ void WaveFileWriter::AddStereoSamplesBE(const short *sample_data, u32 count)
if (count > BUF_SIZE * 2)
PanicAlert("WaveFileWriter - buffer too small (count = %u).", count);
if (skip_silence)
if (skip_silence)
{
bool all_zero = true;

2
Source/Core/AudioCommon/Src/XAudio2Stream.h
View File

@ -52,7 +52,7 @@ private:
public:
XAudio2(CMixer *mixer);
virtual ~XAudio2();
virtual bool Start();
virtual void Stop();

36
Source/Core/AudioCommon/Src/aldlist.cpp
View File

@ -1,17 +1,17 @@
/*
* Copyright (c) 2006, Creative Labs Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification, are permitted provided
* that the following conditions are met:
*
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions
* and the following disclaimer in the documentation and/or other materials provided with the distribution.
* * Neither the name of Creative Labs Inc. nor the names of its contributors may be used to endorse or
* promote products derived from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
@ -36,7 +36,7 @@
#endif
/*
/*
* Init call
*/
ALDeviceList::ALDeviceList()
@ -61,30 +61,30 @@ ALDeviceList::ALDeviceList()
defaultDeviceName = (char *)alcGetString(NULL, ALC_DEFAULT_DEVICE_SPECIFIER);
index = 0;
// go through device list (each device terminated with a single NULL, list terminated with double NULL)
while (devices != NULL && strlen(devices) > 0)
while (devices != NULL && strlen(devices) > 0)
{
if (strcmp(defaultDeviceName, devices) == 0)
if (strcmp(defaultDeviceName, devices) == 0)
{
defaultDeviceIndex = index;
}
ALCdevice *device = alcOpenDevice(devices);
if (device)
if (device)
{
ALCcontext *context = alcCreateContext(device, NULL);
if (context)
if (context)
{
alcMakeContextCurrent(context);
// if new actual device name isn't already in the list, then add it...
actualDeviceName = alcGetString(device, ALC_DEVICE_SPECIFIER);
bool bNewName = true;
for (s32 i = 0; i < GetNumDevices(); i++)
for (s32 i = 0; i < GetNumDevices(); i++)
{
if (strcmp(GetDeviceName(i), actualDeviceName) == 0)
if (strcmp(GetDeviceName(i), actualDeviceName) == 0)
{
bNewName = false;
}
}
if ((bNewName) && (actualDeviceName != NULL) && (strlen(actualDeviceName) > 0))
if ((bNewName) && (actualDeviceName != NULL) && (strlen(actualDeviceName) > 0))
{
ALDeviceInfo.bSelected = true;
ALDeviceInfo.strDeviceName = actualDeviceName;
@ -107,7 +107,7 @@ ALDeviceList::ALDeviceList()
ALDeviceInfo.pvstrExtensions->push_back("AL_EXT_LINEAR_DISTANCE");
if (alIsExtensionPresent("AL_EXT_EXPONENT_DISTANCE") == AL_TRUE)
ALDeviceInfo.pvstrExtensions->push_back("AL_EXT_EXPONENT_DISTANCE");
if (alIsExtensionPresent("EAX2.0") == AL_TRUE)
ALDeviceInfo.pvstrExtensions->push_back("EAX2.0");
if (alIsExtensionPresent("EAX3.0") == AL_TRUE)
@ -139,7 +139,7 @@ ALDeviceList::ALDeviceList()
ResetFilters();
}
/*
/*
* Exit call
*/
ALDeviceList::~ALDeviceList()
@ -159,10 +159,10 @@ ALDeviceList::~ALDeviceList()
*/
s32 ALDeviceList::GetNumDevices()
{
return (s32)vDeviceInfo.size();
return (s32)vDeviceInfo.size();
}
/*
/*
* Returns the device name at an index in the complete device list
*/
char * ALDeviceList::GetDeviceName(s32 index)
@ -210,7 +210,7 @@ bool ALDeviceList::IsExtensionSupported(s32 index, char *szExtName)
if (!strcasecmp(ext.c_str(), szExtName)) {
bReturn = true;
break;
}
}
}
}
@ -225,7 +225,7 @@ s32 ALDeviceList::GetDefaultDevice()
return defaultDeviceIndex;
}
/*
/*
* Deselects devices which don't have the specified minimum version
*/
void ALDeviceList::FilterDevicesMinVer(s32 major, s32 minor)
@ -239,7 +239,7 @@ void ALDeviceList::FilterDevicesMinVer(s32 major, s32 minor)
}
}
/*
/*
* Deselects devices which don't have the specified maximum version
*/
void ALDeviceList::FilterDevicesMaxVer(s32 major, s32 minor)

20
Source/Core/Common/Src/ArmCPUDetect.cpp
View File

@ -34,7 +34,7 @@ char *GetCPUString()
auto const fp = file.GetHandle();
if (!fp)
return 0;
while (fgets(buf, sizeof(buf), fp))
{
if (strncmp(buf, marker, sizeof(marker) - 1))
@ -43,7 +43,7 @@ char *GetCPUString()
cpu_string = strndup(cpu_string, strlen(cpu_string) - 1); // Strip the newline
break;
}
return cpu_string;
}
@ -110,7 +110,7 @@ bool CheckCPUFeature(const char *feature)
auto const fp = file.GetHandle();
if (!fp)
return 0;
while (fgets(buf, sizeof(buf), fp))
{
if (strncmp(buf, marker, sizeof(marker) - 1))
@ -120,11 +120,11 @@ bool CheckCPUFeature(const char *feature)
while (token != NULL)
{
if (strstr(token, feature))
return true;
return true;
token = strtok(NULL, " ");
}
}
return false;
}
#endif
@ -144,14 +144,14 @@ int GetCoreCount()
auto const fp = file.GetHandle();
if (!fp)
return 0;
while (fgets(buf, sizeof(buf), fp))
{
if (strncmp(buf, marker, sizeof(marker) - 1))
continue;
++cores;
}
return cores;
#endif
}
@ -170,10 +170,10 @@ void CPUInfo::Detect()
HTT = false;
OS64bit = false;
CPU64bit = false;
Mode64bit = false;
Mode64bit = false;
vendor = VENDOR_ARM;
// Get the information about the CPU
// Get the information about the CPU
num_cores = GetCoreCount();
#if defined(__SYMBIAN32__) || defined(BLACKBERRY) || defined(IOS)
bool isVFP3 = false;

42
Source/Core/Common/Src/ArmEmitter.cpp
View File

@ -104,7 +104,7 @@ bool ARMXEmitter::TrySetValue_TwoOp(ARMReg reg, u32 val)
}
if (ops > 2)
return false;
bool first = true;
for (int i = 0; i < 16; i++, val >>=2) {
if (val & 0x3) {
@ -418,7 +418,7 @@ void ARMXEmitter::SetJumpTarget(FixupBranch const &branch)
branch.ptr);
if(branch.type == 0) // B
*(u32*)branch.ptr = (u32)(branch.condition | (10 << 24) | ((distance >> 2) &
0x00FFFFFF));
0x00FFFFFF));
else // BL
*(u32*)branch.ptr = (u32)(branch.condition | 0x0B000000 | ((distance >> 2)
& 0x00FFFFFF));
@ -497,7 +497,7 @@ void ARMXEmitter::WriteShiftedDataOp(u32 op, bool SetFlags, ARMReg dest, ARMReg
Write32(condition | (13 << 21) | (SetFlags << 20) | (dest << 12) | op2.Imm5() | (op << 4) | src);
}
// IMM, REG, IMMSREG, RSR
// IMM, REG, IMMSREG, RSR
// -1 for invalid if the instruction doesn't support that
const s32 InstOps[][4] = {{16, 0, 0, 0}, // AND(s)
{17, 1, 1, 1}, // EOR(s)
@ -517,7 +517,7 @@ const s32 InstOps[][4] = {{16, 0, 0, 0}, // AND(s)
{31, 15, 15, 15}, // MVN(s)
{24, -1, -1, -1}, // MOVW
{26, -1, -1, -1}, // MOVT
};
};
const char *InstNames[] = { "AND",
"EOR",
@ -586,7 +586,7 @@ void ARMXEmitter::WriteInstruction (u32 Op, ARMReg Rd, ARMReg Rn, Operand2 Rm, b
}
}
if (op == -1)
_dbg_assert_msg_(DYNA_REC, false, "%s not yet support %d", InstNames[Op], Rm.GetType());
_dbg_assert_msg_(DYNA_REC, false, "%s not yet support %d", InstNames[Op], Rm.GetType());
Write32(condition | (op << 21) | (SetFlags ? (1 << 20) : 0) | Rn << 16 | Rd << 12 | Data);
}
@ -678,7 +678,7 @@ void ARMXEmitter::SXTH (ARMReg dest, ARMReg op2, u8 rotation)
{
SXTAH(dest, (ARMReg)15, op2, rotation);
}
void ARMXEmitter::SXTAH(ARMReg dest, ARMReg src, ARMReg op2, u8 rotation)
void ARMXEmitter::SXTAH(ARMReg dest, ARMReg src, ARMReg op2, u8 rotation)
{
// bits ten and 11 are the rotation amount, see 8.8.232 for more
// information
@ -688,7 +688,7 @@ void ARMXEmitter::RBIT(ARMReg dest, ARMReg src)
{
Write32(condition | (0x6F << 20) | (0xF << 16) | (dest << 12) | (0xF3 << 4) | src);
}
void ARMXEmitter::REV (ARMReg dest, ARMReg src)
void ARMXEmitter::REV (ARMReg dest, ARMReg src)
{
Write32(condition | (0x6BF << 16) | (dest << 12) | (0xF3 << 4) | src);
}
@ -768,7 +768,7 @@ void ARMXEmitter::WriteStoreOp(u32 Op, ARMReg Rt, ARMReg Rn, Operand2 Rm, bool R
bool SignedLoad = false;
if (op == -1)
_dbg_assert_msg_(DYNA_REC, false, "%s does not support %d", LoadStoreNames[Op], Rm.GetType());
_dbg_assert_msg_(DYNA_REC, false, "%s does not support %d", LoadStoreNames[Op], Rm.GetType());
switch (Op)
{
@ -910,7 +910,7 @@ u32 EncodeVn(ARMReg Vn)
{
bool quad_reg = Vn >= Q0;
bool double_reg = Vn >= D0;
ARMReg Reg = SubBase(Vn);
if (quad_reg)
return ((Reg & 0xF) << 16) | ((Reg & 0x10) << 3);
@ -980,7 +980,7 @@ void ARMXEmitter::WriteVFPDataOp(u32 Op, ARMReg Vd, ARMReg Vn, ARMReg Vm)
VFPEnc enc = VFPOps[Op][quad_reg];
if (enc.opc1 == -1 && enc.opc2 == -1)
_dbg_assert_msg_(DYNA_REC, false, "%s does not support %s", VFPOpNames[Op], quad_reg ? "NEON" : "VFP");
_dbg_assert_msg_(DYNA_REC, false, "%s does not support %s", VFPOpNames[Op], quad_reg ? "NEON" : "VFP");
u32 VdEnc = EncodeVd(Vd);
u32 VnEnc = EncodeVn(Vn);
u32 VmEnc = EncodeVm(Vm);
@ -995,7 +995,7 @@ void ARMXEmitter::WriteVFPDataOp6bit(u32 Op, ARMReg Vd, ARMReg Vn, ARMReg Vm, u3
VFPEnc enc = VFPOps[Op][quad_reg];
if (enc.opc1 == -1 && enc.opc2 == -1)
_dbg_assert_msg_(DYNA_REC, false, "%s does not support %s", VFPOpNames[Op], quad_reg ? "NEON" : "VFP");
_dbg_assert_msg_(DYNA_REC, false, "%s does not support %s", VFPOpNames[Op], quad_reg ? "NEON" : "VFP");
u32 VdEnc = EncodeVd(Vd);
u32 VnEnc = EncodeVn(Vn);
u32 VmEnc = EncodeVm(Vm);
@ -1112,7 +1112,7 @@ void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src)
if (Dest < D0)
{
// Moving to a Neon register FROM ARM Reg
Dest = (ARMReg)(Dest - S0);
Dest = (ARMReg)(Dest - S0);
Write32(condition | (0xE0 << 20) | ((Dest & 0x1E) << 15) | (Src << 12) \
| (0xA << 8) | ((Dest & 0x1) << 7) | (1 << 4));
return;
@ -1121,9 +1121,9 @@ void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src)
{
// Move 64bit from Arm reg
ARMReg Src2 = (ARMReg)(Src + 1);
Dest = SubBase(Dest);
Dest = SubBase(Dest);
Write32(condition | (0xC4 << 20) | (Src2 << 16) | (Src << 12) \
| (0xB << 8) | ((Dest & 0x10) << 1) | (1 << 4) | (Dest & 0xF));
| (0xB << 8) | ((Dest & 0x10) << 1) | (1 << 4) | (Dest & 0xF));
return;
}
}
@ -1146,7 +1146,7 @@ void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src)
ARMReg Dest2 = (ARMReg)(Dest + 1);
Src = SubBase(Src);
Write32(condition | (0xC5 << 20) | (Dest2 << 16) | (Dest << 12) \
| (0xB << 8) | ((Dest & 0x10) << 1) | (1 << 4) | (Src & 0xF));
| (0xB << 8) | ((Dest & 0x10) << 1) | (1 << 4) | (Src & 0xF));
return;
}
}
@ -1178,7 +1178,7 @@ void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src)
// Double and quad
if (Quad)
{
_dbg_assert_msg_(DYNA_REC, cpu_info.bNEON, "Trying to use quad registers when you don't support ASIMD.");
_dbg_assert_msg_(DYNA_REC, cpu_info.bNEON, "Trying to use quad registers when you don't support ASIMD.");
// Gets encoded as a Double register
Write32((0xF2 << 24) | ((Dest & 0x10) << 18) | (2 << 20) | ((Src & 0xF) << 16) \
| ((Dest & 0xF) << 12) | (1 << 8) | ((Src & 0x10) << 3) | (1 << 6) \
@ -1728,11 +1728,11 @@ void NEONXEmitter::VSUB(NEONElementType Size, ARMReg Vd, ARMReg Vn, ARMReg Vm)
void NEONXEmitter::VLD1(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align, ARMReg Rm)
{
u32 spacing = 0x7; // Only support loading to 1 reg
u32 spacing = 0x7; // Only support loading to 1 reg
// Gets encoded as a double register
Vd = SubBase(Vd);
Write32((0xF4 << 24) | ((Vd & 0x10) << 18) | (1 << 21) | (Rn << 16)
Write32((0xF4 << 24) | ((Vd & 0x10) << 18) | (1 << 21) | (Rn << 16)
| ((Vd & 0xF) << 12) | (spacing << 8) | (encodedSize(Size) << 6)
| (align << 4) | Rm);
}
@ -1743,7 +1743,7 @@ void NEONXEmitter::VLD2(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignmen
// Gets encoded as a double register
Vd = SubBase(Vd);
Write32((0xF4 << 24) | ((Vd & 0x10) << 18) | (1 << 21) | (Rn << 16)
Write32((0xF4 << 24) | ((Vd & 0x10) << 18) | (1 << 21) | (Rn << 16)
| ((Vd & 0xF) << 12) | (spacing << 8) | (encodedSize(Size) << 6)
| (align << 4) | Rm);
}
@ -1754,7 +1754,7 @@ void NEONXEmitter::VST1(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignmen
// Gets encoded as a double register
Vd = SubBase(Vd);
Write32((0xF4 << 24) | ((Vd & 0x10) << 18) | (Rn << 16)
Write32((0xF4 << 24) | ((Vd & 0x10) << 18) | (Rn << 16)
| ((Vd & 0xF) << 12) | (spacing << 8) | (encodedSize(Size) << 6)
| (align << 4) | Rm);
}
@ -1805,7 +1805,7 @@ void NEONXEmitter::VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
Vm = SubBase(Vm);
Write32((0xF2 << 24) | (0x1 << 21) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3)
| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
}

24
Source/Core/Common/Src/ArmEmitter.h
View File

@ -66,7 +66,7 @@ enum ARMReg
D8, D9, D10, D11, D12, D13, D14, D15,
D16, D17, D18, D19, D20, D21, D22, D23,
D24, D25, D26, D27, D28, D29, D30, D31,
// ASIMD Quad-Word registers
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7,
Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15,
@ -142,11 +142,11 @@ public:
{
return Type;
}
Operand2() {}
Operand2() {}
Operand2(u32 imm, OpType type = TYPE_IMM)
{
Type = type;
Value = imm;
{
Type = type;
Value = imm;
Rotation = 0;
}
@ -343,7 +343,7 @@ u32 EncodeVd(ARMReg Vd);
u32 EncodeVn(ARMReg Vn);
u32 EncodeVm(ARMReg Vm);
// Subtracts the base from the register to give us the real one
ARMReg SubBase(ARMReg Reg);
ARMReg SubBase(ARMReg Reg);
class ARMXEmitter
{
@ -474,7 +474,7 @@ public:
void MOVW(ARMReg dest, Operand2 op2);
void MOVT(ARMReg dest, Operand2 op2, bool TopBits = false);
// UDIV and SDIV are only available on CPUs that have
// UDIV and SDIV are only available on CPUs that have
// the idiva hardare capacity
void UDIV(ARMReg dest, ARMReg dividend, ARMReg divisor);
void SDIV(ARMReg dest, ARMReg dividend, ARMReg divisor);
@ -526,7 +526,7 @@ public:
// None of these will be created with conditional since ARM
// is deprecating conditional execution of ASIMD instructions.
// ASIMD instructions don't even have a conditional encoding.
// VFP Only
void VLDR(ARMReg Dest, ARMReg Base, s16 offset);
void VSTR(ARMReg Src, ARMReg Base, s16 offset);
@ -574,7 +574,7 @@ public:
enum NEONElementType
{
I_8 = (1 << 0),
I_8 = (1 << 0),
I_16 = (1 << 1),
I_32 = (1 << 2),
I_64 = (1 << 3),
@ -597,7 +597,7 @@ class NEONXEmitter
private:
ARMXEmitter *_emit;
inline void Write32(u32 value) { _emit->Write32(value); }
inline u32 encodedSize(u32 value)
{
if (value & I_8)
@ -612,7 +612,7 @@ private:
_dbg_assert_msg_(DYNA_REC, false, "Passed invalid size to integer NEON instruction");
return 0;
}
void VREVX(u32 size, NEONElementType Size, ARMReg Vd, ARMReg Vm);
public:
@ -703,7 +703,7 @@ public:
// Always clear code space with breakpoints, so that if someone accidentally executes
// uninitialized, it just breaks into the debugger.
void ClearCodeSpace()
void ClearCodeSpace()
{
// x86/64: 0xCC = breakpoint
memset(region, 0xCC, region_size);

2
Source/Core/Common/Src/BreakPoints.cpp
View File

@ -107,7 +107,7 @@ void BreakPoints::Clear()
}
);
}
m_BreakPoints.clear();
}

5
Source/Core/Common/Src/ChunkFile.h
View File

@ -180,7 +180,6 @@ public:
void Do(T& x)
{
static_assert(IsTriviallyCopyable(T), "Only sane for trivially copyable types");
DoVoid((void*)&x, sizeof(x));
}
@ -321,7 +320,7 @@ public:
if (!File::Exists(_rFilename))
return false;
// Check file size
const u64 fileSize = File::GetSize(_rFilename);
static const u64 headerSize = sizeof(SChunkHeader);
@ -374,7 +373,7 @@ public:
u8* ptr = &buffer[0];
PointerWrap p(&ptr, PointerWrap::MODE_READ);
_class.DoState(p);
INFO_LOG(COMMON, "ChunkReader: Done loading %s" , _rFilename.c_str());
return true;
}

14
Source/Core/Common/Src/CommonFuncs.h
View File

@ -27,7 +27,7 @@ struct ArraySizeImpl : public std::extent<T>
#define b2(x) ( (x) | ( (x) >> 1) )
#define b4(x) ( b2(x) | ( b2(x) >> 2) )
#define b8(x) ( b4(x) | ( b4(x) >> 4) )
#define b16(x) ( b8(x) | ( b8(x) >> 8) )
#define b16(x) ( b8(x) | ( b8(x) >> 8) )
#define b32(x) (b16(x) | (b16(x) >>16) )
#define ROUND_UP_POW2(x) (b32(x - 1) + 1)
@ -95,12 +95,12 @@ inline u64 _rotr64(u64 x, unsigned int shift){
#define unlink _unlink
#define snprintf _snprintf
#define vscprintf _vscprintf
// Locale Cross-Compatibility
#define locale_t _locale_t
#define freelocale _free_locale
#define newlocale(mask, locale, base) _create_locale(mask, locale)
#define LC_GLOBAL_LOCALE ((locale_t)-1)
#define LC_ALL_MASK LC_ALL
#define LC_COLLATE_MASK LC_COLLATE
@ -108,7 +108,7 @@ inline u64 _rotr64(u64 x, unsigned int shift){
#define LC_MONETARY_MASK LC_MONETARY
#define LC_NUMERIC_MASK LC_NUMERIC
#define LC_TIME_MASK LC_TIME
inline locale_t uselocale(locale_t new_locale)
{
// Retrieve the current per thread locale setting
@ -184,8 +184,8 @@ inline u16 swap16(u16 _data) {return _byteswap_ushort(_data);}
inline u32 swap32(u32 _data) {return _byteswap_ulong (_data);}
inline u64 swap64(u64 _data) {return _byteswap_uint64(_data);}
#elif _M_ARM
inline u16 swap16 (u16 _data) { u32 data = _data; __asm__ ("rev16 %0, %1\n" : "=l" (data) : "l" (data)); return (u16)data;}
inline u32 swap32 (u32 _data) {__asm__ ("rev %0, %1\n" : "=l" (_data) : "l" (_data)); return _data;}
inline u16 swap16 (u16 _data) { u32 data = _data; __asm__ ("rev16 %0, %1\n" : "=l" (data) : "l" (data)); return (u16)data;}
inline u32 swap32 (u32 _data) {__asm__ ("rev %0, %1\n" : "=l" (_data) : "l" (_data)); return _data;}
inline u64 swap64(u64 _data) {return ((u64)swap32(_data) << 32) | swap32(_data >> 32);}
#elif __linux__
inline u16 swap16(u16 _data) {return bswap_16(_data);}
@ -242,7 +242,7 @@ template <typename T>
inline T FromBigEndian(T data)
{
//static_assert(std::is_arithmetic<T>::value, "function only makes sense with arithmetic types");
swap<sizeof(data)>(reinterpret_cast<u8*>(&data));
return data;
}

24
Source/Core/Common/Src/ConsoleListener.cpp
View File

@ -87,7 +87,7 @@ bool ConsoleListener::IsOpen()
/*
LetterSpace: SetConsoleScreenBufferSize and SetConsoleWindowInfo are
dependent on each other, that's the reason for the additional checks.
dependent on each other, that's the reason for the additional checks.
*/
void ConsoleListener::BufferWidthHeight(int BufferWidth, int BufferHeight, int ScreenWidth, int ScreenHeight, bool BufferFirst)
{
@ -226,7 +226,7 @@ void ConsoleListener::PixelSpace(int Left, int Top, int Width, int Height, bool
BytesWritten += cAttrWritten;
coordScreen = GetCoordinates(BytesWritten, LBufWidth);
}
}
const int OldCursor = ConInfo.dwCursorPosition.Y * ConInfo.dwSize.X + ConInfo.dwCursorPosition.X;
COORD Coo = GetCoordinates(OldCursor, LBufWidth);
@ -311,23 +311,23 @@ void ConsoleListener::Log(LogTypes::LOG_LEVELS Level, const char *Text)
}
// Clear console screen
void ConsoleListener::ClearScreen(bool Cursor)
{
{
#if defined(_WIN32)
COORD coordScreen = { 0, 0 };
DWORD cCharsWritten;
CONSOLE_SCREEN_BUFFER_INFO csbi;
DWORD dwConSize;
COORD coordScreen = { 0, 0 };
DWORD cCharsWritten;
CONSOLE_SCREEN_BUFFER_INFO csbi;
DWORD dwConSize;
HANDLE hConsole = GetStdHandle(STD_OUTPUT_HANDLE);
HANDLE hConsole = GetStdHandle(STD_OUTPUT_HANDLE);
GetConsoleScreenBufferInfo(hConsole, &csbi);
GetConsoleScreenBufferInfo(hConsole, &csbi);
dwConSize = csbi.dwSize.X * csbi.dwSize.Y;
// Write space to the entire console
FillConsoleOutputCharacter(hConsole, TEXT(' '), dwConSize, coordScreen, &cCharsWritten);
GetConsoleScreenBufferInfo(hConsole, &csbi);
FillConsoleOutputCharacter(hConsole, TEXT(' '), dwConSize, coordScreen, &cCharsWritten);
GetConsoleScreenBufferInfo(hConsole, &csbi);
FillConsoleOutputAttribute(hConsole, csbi.wAttributes, dwConSize, coordScreen, &cCharsWritten);
// Reset cursor
if (Cursor) SetConsoleCursorPosition(hConsole, coordScreen);
if (Cursor) SetConsoleCursorPosition(hConsole, coordScreen);
#endif
}

4
Source/Core/Common/Src/Crypto/ec.cpp
View File

@ -323,7 +323,7 @@ void point_mul(u8 *d, const u8 *a, u8 *b) // a is bignum
}
}
void silly_random(u8 * rndArea, u8 count)
void silly_random(u8 * rndArea, u8 count)
{
u16 i;
srand((unsigned) (time(NULL)));
@ -331,7 +331,7 @@ void silly_random(u8 * rndArea, u8 count)
for(i=0;i<count;i++)
{
rndArea[i]=rand();
}
}
}
void generate_ecdsa(u8 *R, u8 *S, const u8 *k, u8 *hash)

26
Source/Core/Common/Src/ExtendedTrace.cpp
View File

@ -30,7 +30,7 @@ using namespace std;
void PCSTR2LPTSTR( PCSTR lpszIn, LPTSTR lpszOut )
{
#if defined(UNICODE)||defined(_UNICODE)
ULONG index = 0;
ULONG index = 0;
PCSTR lpAct = lpszIn;
for( ; ; lpAct++ )
@ -38,7 +38,7 @@ void PCSTR2LPTSTR( PCSTR lpszIn, LPTSTR lpszOut )
lpszOut[index++] = (TCHAR)(*lpAct);
if ( *lpAct == 0 )
break;
}
}
#else
// This is trivial :)
strcpy( lpszOut, lpszIn );
@ -102,7 +102,7 @@ BOOL InitSymInfo( PCSTR lpszInitialSymbolPath )
CHAR lpszSymbolPath[BUFFERSIZE];
DWORD symOptions = SymGetOptions();
symOptions |= SYMOPT_LOAD_LINES;
symOptions |= SYMOPT_LOAD_LINES;
symOptions &= ~SYMOPT_UNDNAME;
SymSetOptions( symOptions );
InitSymbolPath( lpszSymbolPath, lpszInitialSymbolPath );
@ -154,15 +154,15 @@ static BOOL GetFunctionInfoFromAddresses( ULONG fnAddress, ULONG stackAddress, L
#ifndef _M_X64
DWORD dwDisp = 0;
if ( SymGetSymFromAddr( GetCurrentProcess(), (ULONG)fnAddress, &dwDisp, pSym ) )
#else
#else
//makes it compile but hell im not sure if this works...
DWORD64 dwDisp = 0;
if ( SymGetSymFromAddr( GetCurrentProcess(), (ULONG)fnAddress, (PDWORD64)&dwDisp, pSym ) )
#endif
{
// Make the symbol readable for humans
UnDecorateSymbolName( pSym->Name, lpszNonUnicodeUnDSymbol, BUFFERSIZE,
UNDNAME_COMPLETE |
UnDecorateSymbolName( pSym->Name, lpszNonUnicodeUnDSymbol, BUFFERSIZE,
UNDNAME_COMPLETE |
UNDNAME_NO_THISTYPE |
UNDNAME_NO_SPECIAL_SYMS |
UNDNAME_NO_MEMBER_TYPE |
@ -224,7 +224,7 @@ static BOOL GetFunctionInfoFromAddresses( ULONG fnAddress, ULONG stackAddress, L
_tcscat( lpszSymbol, lpszParsed );
ret = TRUE;
}
}
GlobalFree( pSym );
return ret;
@ -330,14 +330,14 @@ void StackTrace( HANDLE hThread, const char* lpszMessage, FILE *file )
PrintFunctionAndSourceInfo(file, callStack);
for( ULONG index = 0; ; index++ )
for( ULONG index = 0; ; index++ )
{
bResult = StackWalk(
IMAGE_FILE_MACHINE_I386,
hProcess,
hThread,
&callStack,
NULL,
NULL,
NULL,
SymFunctionTableAccess,
SymGetModuleBase,
@ -346,7 +346,7 @@ void StackTrace( HANDLE hThread, const char* lpszMessage, FILE *file )
if ( index == 0 )
continue;
if( !bResult || callStack.AddrFrame.Offset == 0 )
if( !bResult || callStack.AddrFrame.Offset == 0 )
break;
PrintFunctionAndSourceInfo(file, callStack);
@ -387,14 +387,14 @@ void StackTrace(HANDLE hThread, const char* lpszMessage, FILE *file, DWORD eip,
PrintFunctionAndSourceInfo(file, callStack);
for( ULONG index = 0; ; index++ )
for( ULONG index = 0; ; index++ )
{
bResult = StackWalk(
IMAGE_FILE_MACHINE_I386,
hProcess,
hThread,
&callStack,
NULL,
NULL,
NULL,
SymFunctionTableAccess,
SymGetModuleBase,
@ -403,7 +403,7 @@ void StackTrace(HANDLE hThread, const char* lpszMessage, FILE *file, DWORD eip,
if ( index == 0 )
continue;
if( !bResult || callStack.AddrFrame.Offset == 0 )
if( !bResult || callStack.AddrFrame.Offset == 0 )
break;
PrintFunctionAndSourceInfo(file, callStack);

4
Source/Core/Common/Src/FPURoundMode.h
View File

@ -35,12 +35,12 @@ namespace FPURoundMode
void SetRoundMode(u32 mode);
void SetPrecisionMode(u32 mode);
void SetSIMDMode(u32 mode);
/*
* There are two different flavors of float to int conversion:
* _mm_cvtps_epi32() and _mm_cvttps_epi32().
* _mm_cvtps_epi32() and _mm_cvttps_epi32().
*
* The first rounds according to the MXCSR rounding bits.
* The second one always uses round towards zero.

2
Source/Core/Common/Src/FifoQueue.h
View File

@ -48,7 +48,7 @@ public:
// create the element, add it to the queue
m_write_ptr->current = std::forward<Arg>(t);
// set the next pointer to a new element ptr
// then advance the write pointer
// then advance the write pointer
ElementPtr* new_ptr = new ElementPtr();
AtomicStoreRelease(m_write_ptr->next, new_ptr);
m_write_ptr = new_ptr;

60
Source/Core/Common/Src/FileUtil.cpp
View File

@ -92,7 +92,7 @@ bool IsDirectory(const std::string &filename)
#endif
if (result < 0) {
WARN_LOG(COMMON, "IsDirectory: stat failed on %s: %s",
WARN_LOG(COMMON, "IsDirectory: stat failed on %s: %s",
filename.c_str(), GetLastErrorMsg());
return false;
}
@ -106,7 +106,7 @@ bool Delete(const std::string &filename)
{
INFO_LOG(COMMON, "Delete: file %s", filename.c_str());
// Return true because we care about the file no
// Return true because we care about the file no
// being there, not the actual delete.
if (!Exists(filename))
{
@ -124,13 +124,13 @@ bool Delete(const std::string &filename)
#ifdef _WIN32
if (!DeleteFile(UTF8ToTStr(filename).c_str()))
{
WARN_LOG(COMMON, "Delete: DeleteFile failed on %s: %s",
WARN_LOG(COMMON, "Delete: DeleteFile failed on %s: %s",
filename.c_str(), GetLastErrorMsg());
return false;
}
#else
if (unlink(filename.c_str()) == -1) {
WARN_LOG(COMMON, "Delete: unlink failed on %s: %s",
WARN_LOG(COMMON, "Delete: unlink failed on %s: %s",
filename.c_str(), GetLastErrorMsg());
return false;
}
@ -234,10 +234,10 @@ bool DeleteDir(const std::string &filename)
return false;
}
// renames file srcFilename to destFilename, returns true on success
// renames file srcFilename to destFilename, returns true on success
bool Rename(const std::string &srcFilename, const std::string &destFilename)
{
INFO_LOG(COMMON, "Rename: %s --> %s",
INFO_LOG(COMMON, "Rename: %s --> %s",
srcFilename.c_str(), destFilename.c_str());
#ifdef _WIN32
auto sf = UTF8ToTStr(srcFilename);
@ -256,7 +256,7 @@ bool Rename(const std::string &srcFilename, const std::string &destFilename)
if (rename(srcFilename.c_str(), destFilename.c_str()) == 0)
return true;
#endif
ERROR_LOG(COMMON, "Rename: failed %s --> %s: %s",
ERROR_LOG(COMMON, "Rename: failed %s --> %s: %s",
srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg());
return false;
}
@ -296,16 +296,16 @@ bool RenameSync(const std::string &srcFilename, const std::string &destFilename)
return true;
}
// copies file srcFilename to destFilename, returns true on success
// copies file srcFilename to destFilename, returns true on success
bool Copy(const std::string &srcFilename, const std::string &destFilename)
{
INFO_LOG(COMMON, "Copy: %s --> %s",
INFO_LOG(COMMON, "Copy: %s --> %s",
srcFilename.c_str(), destFilename.c_str());
#ifdef _WIN32
if (CopyFile(UTF8ToTStr(srcFilename).c_str(), UTF8ToTStr(destFilename).c_str(), FALSE))
return true;
ERROR_LOG(COMMON, "Copy: failed %s --> %s: %s",
ERROR_LOG(COMMON, "Copy: failed %s --> %s: %s",
srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg());
return false;
#else
@ -319,7 +319,7 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename)
FILE *input = fopen(srcFilename.c_str(), "rb");
if (!input)
{
ERROR_LOG(COMMON, "Copy: input failed %s --> %s: %s",
ERROR_LOG(COMMON, "Copy: input failed %s --> %s: %s",
srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg());
return false;
}
@ -329,7 +329,7 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename)
if (!output)
{
fclose(input);
ERROR_LOG(COMMON, "Copy: output failed %s --> %s: %s",
ERROR_LOG(COMMON, "Copy: output failed %s --> %s: %s",
srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg());
return false;
}
@ -343,8 +343,8 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename)
{
if (ferror(input) != 0)
{
ERROR_LOG(COMMON,
"Copy: failed reading from source, %s --> %s: %s",
ERROR_LOG(COMMON,
"Copy: failed reading from source, %s --> %s: %s",
srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg());
goto bail;
}
@ -354,8 +354,8 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename)
int wnum = fwrite(buffer, sizeof(char), rnum, output);
if (wnum != rnum)
{
ERROR_LOG(COMMON,
"Copy: failed writing to output, %s --> %s: %s",
ERROR_LOG(COMMON,
"Copy: failed writing to output, %s --> %s: %s",
srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg());
goto bail;
}
@ -387,7 +387,7 @@ u64 GetSize(const std::string &filename)
WARN_LOG(COMMON, "GetSize: failed %s: is a directory", filename.c_str());
return 0;
}
struct stat64 buf;
#ifdef _WIN32
if (_tstat64(UTF8ToTStr(filename).c_str(), &buf) == 0)
@ -436,10 +436,10 @@ u64 GetSize(FILE *f)
return size;
}
// creates an empty file filename, returns true on success
// creates an empty file filename, returns true on success
bool CreateEmptyFile(const std::string &filename)
{
INFO_LOG(COMMON, "CreateEmptyFile: %s", filename.c_str());
INFO_LOG(COMMON, "CreateEmptyFile: %s", filename.c_str());
if (!File::IOFile(filename, "wb"))
{
@ -489,7 +489,7 @@ u32 ScanDirectoryTree(const std::string &directory, FSTEntry& parentEntry)
#endif
// check for "." and ".."
if (((virtualName[0] == '.') && (virtualName[1] == '\0')) ||
((virtualName[0] == '.') && (virtualName[1] == '.') &&
((virtualName[0] == '.') && (virtualName[1] == '.') &&
(virtualName[2] == '\0')))
continue;
entry.virtualName = virtualName;
@ -504,14 +504,14 @@ u32 ScanDirectoryTree(const std::string &directory, FSTEntry& parentEntry)
foundEntries += (u32)entry.size;
}
else
{ // is a file
{ // is a file
entry.isDirectory = false;
entry.size = GetSize(entry.physicalName.c_str());
}
++foundEntries;
// Push into the tree
parentEntry.children.push_back(entry);
#ifdef _WIN32
parentEntry.children.push_back(entry);
#ifdef _WIN32
} while (FindNextFile(hFind, &ffd) != 0);
FindClose(hFind);
#else
@ -556,7 +556,7 @@ bool DeleteDirRecursively(const std::string &directory)
// check for "." and ".."
if (((virtualName[0] == '.') && (virtualName[1] == '\0')) ||
((virtualName[0] == '.') && (virtualName[1] == '.') &&
((virtualName[0] == '.') && (virtualName[1] == '.') &&
(virtualName[2] == '\0')))
continue;
@ -592,7 +592,7 @@ bool DeleteDirRecursively(const std::string &directory)
closedir(dirp);
#endif
File::DeleteDir(directory);
return true;
}
@ -653,7 +653,7 @@ void CopyDir(const std::string &source_path, const std::string &dest_path)
std::string GetCurrentDir()
{
char *dir;
// Get the current working directory (getcwd uses malloc)
// Get the current working directory (getcwd uses malloc)
if (!(dir = __getcwd(NULL, 0))) {
ERROR_LOG(COMMON, "GetCurrentDirectory failed: %s",
@ -687,7 +687,7 @@ std::string GetTempFilenameForAtomicWrite(const std::string &path)
}
#if defined(__APPLE__)
std::string GetBundleDirectory()
std::string GetBundleDirectory()
{
CFURLRef BundleRef;
char AppBundlePath[MAXPATHLEN];
@ -798,8 +798,8 @@ const std::string& GetUserPath(const unsigned int DirIDX, const std::string &new
if (File::Exists(ROOT_DIR DIR_SEP USERDATA_DIR))
paths[D_USER_IDX] = ROOT_DIR DIR_SEP USERDATA_DIR DIR_SEP;
else
paths[D_USER_IDX] = std::string(getenv("HOME") ?
getenv("HOME") : getenv("PWD") ?
paths[D_USER_IDX] = std::string(getenv("HOME") ?
getenv("HOME") : getenv("PWD") ?
getenv("PWD") : "") + DIR_SEP DOLPHIN_DATA_DIR DIR_SEP;
#endif
@ -917,7 +917,7 @@ const std::string& GetUserPath(const unsigned int DirIDX, const std::string &new
paths[D_WIIUSER_IDX] = paths[D_WIIROOT_IDX] + DIR_SEP;
paths[D_WIIWC24_IDX] = paths[D_WIIUSER_IDX] + WII_WC24CONF_DIR DIR_SEP;
paths[D_WIISYSCONF_IDX] = paths[D_WIIUSER_IDX] + WII_SYSCONF_DIR + DIR_SEP;
paths[D_WIISYSCONF_IDX] = paths[D_WIIUSER_IDX] + WII_SYSCONF_DIR + DIR_SEP;
paths[F_WIISYSCONF_IDX] = paths[D_WIISYSCONF_IDX] + WII_SYSCONF;
}

12
Source/Core/Common/Src/FileUtil.h
View File

@ -56,7 +56,7 @@ enum {
namespace File
{
// FileSystem tree node/
// FileSystem tree node/
struct FSTEntry
{
bool isDirectory;
@ -94,16 +94,16 @@ bool Delete(const std::string &filename);
// Deletes a directory filename, returns true on success
bool DeleteDir(const std::string &filename);
// renames file srcFilename to destFilename, returns true on success
// renames file srcFilename to destFilename, returns true on success
bool Rename(const std::string &srcFilename, const std::string &destFilename);
// ditto, but syncs the source file and, on Unix, syncs the directories after rename
bool RenameSync(const std::string &srcFilename, const std::string &destFilename);
// copies file srcFilename to destFilename, returns true on success
// copies file srcFilename to destFilename, returns true on success
bool Copy(const std::string &srcFilename, const std::string &destFilename);
// creates an empty file filename, returns true on success
// creates an empty file filename, returns true on success
bool CreateEmptyFile(const std::string &filename);
// Scans the directory tree gets, starting from _Directory and adds the
@ -157,10 +157,10 @@ public:
IOFile(const std::string& filename, const char openmode[]);
~IOFile();
IOFile(IOFile&& other);
IOFile& operator=(IOFile&& other);
void Swap(IOFile& other);
bool Open(const std::string& filename, const char openmode[]);

32
Source/Core/Common/Src/Hash.cpp
View File

@ -115,15 +115,15 @@ inline u64 getblock(const u64 * p, int i)
inline void bmix64(u64 & h1, u64 & h2, u64 & k1, u64 & k2, u64 & c1, u64 & c2)
{
k1 *= c1;
k1 = _rotl64(k1,23);
k1 *= c1;
k1 = _rotl64(k1,23);
k1 *= c2;
h1 ^= k1;
h1 += h2;
h2 = _rotl64(h2,41);
k2 *= c2;
k2 *= c2;
k2 = _rotl64(k2,23);
k2 *= c1;
h2 ^= k2;
@ -250,7 +250,7 @@ u64 GetCRC32(const u8 *src, int len, u32 samples)
}
/*
/*
* NOTE: This hash function is used for custom texture loading/dumping, so
* it should not be changed, which would require all custom textures to be
* recalculated for their new hash values. If the hashing function is
@ -273,7 +273,7 @@ u64 GetHashHiresTexture(const u8 *src, int len, u32 samples)
u64 k = data[0];
data+=Step;
k *= m;
k ^= k >> r;
k ^= k >> r;
k *= m;
h ^= k;
h *= m;
@ -292,13 +292,13 @@ u64 GetHashHiresTexture(const u8 *src, int len, u32 samples)
case 1: h ^= u64(data2[0]);
h *= m;
};
h ^= h >> r;
h *= m;
h ^= h >> r;
return h;
}
}
#else
// CRC32 hash using the SSE4.2 instruction
u64 GetCRC32(const u8 *src, int len, u32 samples)
@ -351,15 +351,15 @@ inline u32 fmix32(u32 h)
inline void bmix32(u32 & h1, u32 & h2, u32 & k1, u32 & k2, u32 & c1, u32 & c2)
{
k1 *= c1;
k1 = _rotl(k1,11);
k1 *= c1;
k1 = _rotl(k1,11);
k1 *= c2;
h1 ^= k1;
h1 += h2;
h2 = _rotl(h2,17);
k2 *= c2;
k2 *= c2;
k2 = _rotl(k2,11);
k2 *= c1;
h2 ^= k2;
@ -405,7 +405,7 @@ u64 GetMurmurHash3(const u8* src, int len, u32 samples)
//----------
// tail
const u8 * tail = (const u8*)(data + nblocks*8);
u32 k1 = 0;
@ -439,7 +439,7 @@ u64 GetMurmurHash3(const u8* src, int len, u32 samples)
out[0] = h1;
out[1] = h2;
return *((u64 *)&out);
}
@ -463,11 +463,11 @@ u64 GetHashHiresTexture(const u8 *src, int len, u32 samples)
{
u64 k = data[0];
data+=Step;
k *= m;
k ^= k >> r;
k *= m;
k ^= k >> r;
k *= m;
h ^= k;
h *= m;
h *= m;
}
const u8 * data2 = (const u8*)end;
@ -483,7 +483,7 @@ u64 GetHashHiresTexture(const u8 *src, int len, u32 samples)
case 1: h ^= u64(data2[0]);
h *= m;
};
h ^= h >> r;
h *= m;
h ^= h >> r;

14
Source/Core/Common/Src/IniFile.cpp
View File

@ -81,10 +81,10 @@ void IniFile::Section::Set(const char* key, bool newValue, bool defaultValue)
Delete(key);
}
void IniFile::Section::Set(const char* key, const std::vector<std::string>& newValues)
void IniFile::Section::Set(const char* key, const std::vector<std::string>& newValues)
{
std::string temp;
// Join the strings with ,
// Join the strings with ,
std::vector<std::string>::const_iterator it;
for (it = newValues.begin(); it != newValues.end(); ++it)
{
@ -124,13 +124,13 @@ bool IniFile::Section::Get(const char* key, std::vector<std::string>& out)
size_t subStart = temp.find_first_not_of(",");
size_t subEnd;
// split by ,
// split by ,
while (subStart != std::string::npos)
{
// Find next ,
// Find next ,
subEnd = temp.find_first_of(",", subStart);
if (subStart != subEnd)
// take from first char until next ,
if (subStart != subEnd)
// take from first char until next ,
out.push_back(StripSpaces(temp.substr(subStart, subEnd - subStart)));
// Find the next non , char
subStart = temp.find_first_not_of(",", subEnd);
@ -435,7 +435,7 @@ bool IniFile::Get(const char* sectionName, const char* key, std::string* value,
return section->Get(key, value, defaultValue);
}
bool IniFile::Get(const char *sectionName, const char* key, std::vector<std::string>& values)
bool IniFile::Get(const char *sectionName, const char* key, std::vector<std::string>& values)
{
Section *section = GetSection(sectionName);
if (!section)

4
Source/Core/Common/Src/IniFile.h
View File

@ -53,12 +53,12 @@ public:
void Set(const char* key, double newValue) {
Set(key, StringFromFormat("%f", newValue).c_str());
}
void Set(const char* key, int newValue, int defaultValue);
void Set(const char* key, int newValue) {
Set(key, StringFromInt(newValue).c_str());
}
void Set(const char* key, bool newValue, bool defaultValue);
void Set(const char* key, bool newValue) {
Set(key, StringFromBool(newValue).c_str());

6
Source/Core/Common/Src/LinearDiskCache.h
View File

@ -63,7 +63,7 @@ public:
m_file.seekg(0, std::ios::beg);
std::fstream::pos_type start_pos = m_file.tellg();
std::streamoff file_size = end_pos - start_pos;
if (m_file.is_open() && ValidateHeader())
{
// good header, read some key/value pairs
@ -86,7 +86,7 @@ public:
// read key/value and pass to reader
if (Read(&key) &&
Read(value, value_size) &&
Read(value, value_size) &&
Read(&entry_number) &&
entry_number == m_num_entries+1)
{
@ -114,7 +114,7 @@ public:
WriteHeader();
return 0;
}
void Sync()
{
m_file.flush();

4
Source/Core/Common/Src/Log.h
View File

@ -6,7 +6,7 @@
#define _LOG_H_
#define NOTICE_LEVEL 1 // VERY important information that is NOT errors. Like startup and OSReports.
#define ERROR_LEVEL 2 // Critical errors
#define ERROR_LEVEL 2 // Critical errors
#define WARNING_LEVEL 3 // Something is suspicious.
#define INFO_LEVEL 4 // General information.
#define DEBUG_LEVEL 5 // Detailed debugging - might make things slow.
@ -40,7 +40,7 @@ enum LOG_TYPE
MEMMAP,
MEMCARD_MANAGER,
OSREPORT,
PAD,
PAD,
PROCESSORINTERFACE,
PIXELENGINE,
SERIALINTERFACE,

6
Source/Core/Common/Src/LogManager.cpp
View File

@ -13,7 +13,7 @@
#include "Thread.h"
#include "FileUtil.h"
void GenericLog(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
void GenericLog(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
const char *file, int line, const char* fmt, ...)
{
va_list args;
@ -110,7 +110,7 @@ LogManager::~LogManager()
delete m_debuggerLog;
}
void LogManager::Log(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
void LogManager::Log(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
const char *file, int line, const char *format, va_list args)
{
char temp[MAX_MSGLEN];
@ -128,7 +128,7 @@ void LogManager::Log(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
file, line, level_to_char[(int)level],
log->GetShortName(), temp);
#ifdef ANDROID
Host_SysMessage(msg);
Host_SysMessage(msg);
#endif
log->Trigger(level, msg);
}

4
Source/Core/Common/Src/LogManager.h
View File

@ -55,7 +55,7 @@ class LogContainer
{
public:
LogContainer(const char* shortName, const char* fullName, bool enable = false);
const char* GetShortName() const { return m_shortName; }
const char* GetFullName() const { return m_fullName; }
@ -99,7 +99,7 @@ public:
static u32 GetMaxLevel() { return MAX_LOGLEVEL; }
void Log(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
void Log(LogTypes::LOG_LEVELS level, LogTypes::LOG_TYPE type,
const char *file, int line, const char *fmt, va_list args);
void SetLogLevel(LogTypes::LOG_TYPE type, LogTypes::LOG_LEVELS level)

12
Source/Core/Common/Src/MathUtil.cpp
View File

@ -17,7 +17,7 @@ u32 ClassifyDouble(double dvalue)
value.d = dvalue;
u64 sign = value.i & DOUBLE_SIGN;
u64 exp = value.i & DOUBLE_EXP;
if (exp > DOUBLE_ZERO && exp < DOUBLE_EXP)
if (exp > DOUBLE_ZERO && exp < DOUBLE_EXP)
{
// Nice normalized number.
return sign ? PPC_FPCLASS_NN : PPC_FPCLASS_PN;
@ -57,7 +57,7 @@ u32 ClassifyFloat(float fvalue)
value.f = fvalue;
u32 sign = value.i & FLOAT_SIGN;
u32 exp = value.i & FLOAT_EXP;
if (exp > FLOAT_ZERO && exp < FLOAT_EXP)
if (exp > FLOAT_ZERO && exp < FLOAT_EXP)
{
// Nice normalized number.
return sign ? PPC_FPCLASS_NN : PPC_FPCLASS_PN;
@ -76,13 +76,13 @@ u32 ClassifyFloat(float fvalue)
// Denormalized number.
return sign ? PPC_FPCLASS_ND : PPC_FPCLASS_PD;
}
}
else if (exp)
}
else if (exp)
{
// Infinite
return sign ? PPC_FPCLASS_NINF : PPC_FPCLASS_PINF;
}
else
}
else
{
//Zero
return sign ? PPC_FPCLASS_NZ : PPC_FPCLASS_PZ;

4
Source/Core/Common/Src/MathUtil.h
View File

@ -105,7 +105,7 @@ struct Rectangle
Rectangle(T theLeft, T theTop, T theRight, T theBottom)
: left(theLeft), top(theTop), right(theRight), bottom(theBottom)
{ }
bool operator==(const Rectangle& r) { return left==r.left && top==r.top && right==r.right && bottom==r.bottom; }
T GetWidth() const { return abs(right - left); }
@ -123,7 +123,7 @@ struct Rectangle
// If the rectangle is in a coordinate system with an upper-left origin,
// use this Clamp.
void ClampUL(T x1, T y1, T x2, T y2)
void ClampUL(T x1, T y1, T x2, T y2)
{
if (left < x1) left = x1;
if (right > x2) right = x2;

2
Source/Core/Common/Src/MemArena.cpp
View File

@ -257,7 +257,7 @@ u8 *MemoryMap_Setup(const MemoryView *views, int num_views, u32 flags, MemArena
{
base_attempts++;
base = (u8 *)base_addr;
if (Memory_TryBase(base, views, num_views, flags, arena))
if (Memory_TryBase(base, views, num_views, flags, arena))
{
INFO_LOG(MEMMAP, "Found valid memory base at %p after %i tries.", base, base_attempts);
base_attempts = 0;

42
Source/Core/Common/Src/MsgHandler.h
View File

@ -16,7 +16,7 @@ enum MSG_TYPE
CRITICAL
};
typedef bool (*MsgAlertHandler)(const char* caption, const char* text,
typedef bool (*MsgAlertHandler)(const char* caption, const char* text,
bool yes_no, int Style);
typedef std::string (*StringTranslator)(const char* text);
@ -32,29 +32,29 @@ void SetEnableAlert(bool enable);
#ifndef GEKKO
#ifdef _WIN32
#define SuccessAlert(format, ...) MsgAlert(false, INFORMATION, format, __VA_ARGS__)
#define PanicAlert(format, ...) MsgAlert(false, WARNING, format, __VA_ARGS__)
#define PanicYesNo(format, ...) MsgAlert(true, WARNING, format, __VA_ARGS__)
#define AskYesNo(format, ...) MsgAlert(true, QUESTION, format, __VA_ARGS__)
#define CriticalAlert(format, ...) MsgAlert(false, CRITICAL, format, __VA_ARGS__)
#define SuccessAlert(format, ...) MsgAlert(false, INFORMATION, format, __VA_ARGS__)
#define PanicAlert(format, ...) MsgAlert(false, WARNING, format, __VA_ARGS__)
#define PanicYesNo(format, ...) MsgAlert(true, WARNING, format, __VA_ARGS__)
#define AskYesNo(format, ...) MsgAlert(true, QUESTION, format, __VA_ARGS__)
#define CriticalAlert(format, ...) MsgAlert(false, CRITICAL, format, __VA_ARGS__)
// Use these macros (that do the same thing) if the message should be translated.
#define SuccessAlertT(format, ...) MsgAlert(false, INFORMATION, format, __VA_ARGS__)
#define PanicAlertT(format, ...) MsgAlert(false, WARNING, format, __VA_ARGS__)
#define PanicYesNoT(format, ...) MsgAlert(true, WARNING, format, __VA_ARGS__)
#define AskYesNoT(format, ...) MsgAlert(true, QUESTION, format, __VA_ARGS__)
#define CriticalAlertT(format, ...) MsgAlert(false, CRITICAL, format, __VA_ARGS__)
#define SuccessAlertT(format, ...) MsgAlert(false, INFORMATION, format, __VA_ARGS__)
#define PanicAlertT(format, ...) MsgAlert(false, WARNING, format, __VA_ARGS__)
#define PanicYesNoT(format, ...) MsgAlert(true, WARNING, format, __VA_ARGS__)
#define AskYesNoT(format, ...) MsgAlert(true, QUESTION, format, __VA_ARGS__)
#define CriticalAlertT(format, ...) MsgAlert(false, CRITICAL, format, __VA_ARGS__)
#else
#define SuccessAlert(format, ...) MsgAlert(false, INFORMATION, format, ##__VA_ARGS__)
#define PanicAlert(format, ...) MsgAlert(false, WARNING, format, ##__VA_ARGS__)
#define PanicYesNo(format, ...) MsgAlert(true, WARNING, format, ##__VA_ARGS__)
#define AskYesNo(format, ...) MsgAlert(true, QUESTION, format, ##__VA_ARGS__)
#define CriticalAlert(format, ...) MsgAlert(false, CRITICAL, format, ##__VA_ARGS__)
#define SuccessAlert(format, ...) MsgAlert(false, INFORMATION, format, ##__VA_ARGS__)
#define PanicAlert(format, ...) MsgAlert(false, WARNING, format, ##__VA_ARGS__)
#define PanicYesNo(format, ...) MsgAlert(true, WARNING, format, ##__VA_ARGS__)
#define AskYesNo(format, ...) MsgAlert(true, QUESTION, format, ##__VA_ARGS__)
#define CriticalAlert(format, ...) MsgAlert(false, CRITICAL, format, ##__VA_ARGS__)
// Use these macros (that do the same thing) if the message should be translated.
#define SuccessAlertT(format, ...) MsgAlert(false, INFORMATION, format, ##__VA_ARGS__)
#define PanicAlertT(format, ...) MsgAlert(false, WARNING, format, ##__VA_ARGS__)
#define PanicYesNoT(format, ...) MsgAlert(true, WARNING, format, ##__VA_ARGS__)
#define AskYesNoT(format, ...) MsgAlert(true, QUESTION, format, ##__VA_ARGS__)
#define CriticalAlertT(format, ...) MsgAlert(false, CRITICAL, format, ##__VA_ARGS__)
#define SuccessAlertT(format, ...) MsgAlert(false, INFORMATION, format, ##__VA_ARGS__)
#define PanicAlertT(format, ...) MsgAlert(false, WARNING, format, ##__VA_ARGS__)
#define PanicYesNoT(format, ...) MsgAlert(true, WARNING, format, ##__VA_ARGS__)
#define AskYesNoT(format, ...) MsgAlert(true, QUESTION, format, ##__VA_ARGS__)
#define CriticalAlertT(format, ...) MsgAlert(false, CRITICAL, format, ##__VA_ARGS__)
#endif
#else
// GEKKO

2
Source/Core/Common/Src/NandPaths.cpp
View File

@ -58,7 +58,7 @@ bool CheckTitleTMD(u64 _titleID)
bool CheckTitleTIK(u64 _titleID)
{
const std::string ticketFileName = Common::GetTicketFileName(_titleID);
const std::string ticketFileName = Common::GetTicketFileName(_titleID);
if (File::Exists(ticketFileName))
{
File::IOFile pTIKFile(ticketFileName, "rb");

2
Source/Core/Common/Src/StdConditionVariable.h
View File

@ -9,7 +9,7 @@
#define __has_include(s) 0
#endif
#if GCC_VERSION >= GCC_VER(4,4,0) && __GXX_EXPERIMENTAL_CXX0X__
#if GCC_VERSION >= GCC_VER(4,4,0) && __GXX_EXPERIMENTAL_CXX0X__
// GCC 4.4 provides <condition_variable>
#include <condition_variable>

10
Source/Core/Common/Src/StdMutex.h
View File

@ -108,7 +108,7 @@ public:
return (0 != TryEnterCriticalSection(&m_handle));
#else
return !pthread_mutex_trylock(&m_handle);
#endif
#endif
}
native_handle_type native_handle()
@ -283,10 +283,10 @@ public:
swap(other);
return *this;
}
#ifdef USE_RVALUE_REFERENCES
unique_lock(const unique_lock&) /*= delete*/;
unique_lock(unique_lock&& other)
: pm(NULL), owns(false)
{
@ -295,7 +295,7 @@ public:
: pm(NULL), owns(false)
{
// ugly const_cast to get around lack of rvalue references
unique_lock& other = const_cast<unique_lock&>(u);
unique_lock& other = const_cast<unique_lock&>(u);
#endif
swap(other);
}
@ -316,7 +316,7 @@ public:
//bool try_lock_for(const chrono::duration<Rep, Period>& rel_time);
//template <class Clock, class Duration>
//bool try_lock_until(const chrono::time_point<Clock, Duration>& abs_time);
void unlock()
{
mutex()->unlock();

6
Source/Core/Common/Src/StdThread.h
View File

@ -213,7 +213,7 @@ public:
std::swap(m_handle, other.m_handle);
#endif
}
static unsigned hardware_concurrency()
{
#ifdef _WIN32
@ -227,7 +227,7 @@ public:
private:
id m_id;
#ifdef _WIN32
native_handle_type m_handle;
#endif
@ -247,7 +247,7 @@ private:
m_id = id();
#endif
}
template <typename C>
class Func
{

16
Source/Core/Common/Src/StringUtil.cpp
View File

@ -109,11 +109,11 @@ std::string ArrayToString(const u8 *data, u32 size, int line_len, bool spaces)
{
std::ostringstream oss;
oss << std::setfill('0') << std::hex;
for (int line = 0; size; ++data, --size)
{
oss << std::setw(2) << (int)*data;
if (line_len == ++line)
{
oss << '\n';
@ -156,7 +156,7 @@ bool TryParse(const std::string &str, u32 *const output)
errno = 0;
unsigned long value = strtoul(str.c_str(), &endptr, 0);
if (!endptr || *endptr)
return false;
@ -284,7 +284,7 @@ std::string ReplaceAll(std::string result, const std::string& src, const std::st
//#include <string>
//#include <assert.h>
const char HEX2DEC[256] =
const char HEX2DEC[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0 */ 16,16,16,16, 16,16,16,16, 16,16,16,16, 16,16,16,16,
@ -317,7 +317,7 @@ std::string UriDecode(const std::string & sSrc)
const unsigned char * pSrc = (const unsigned char *)sSrc.c_str();
const size_t SRC_LEN = sSrc.length();
const unsigned char * const SRC_END = pSrc + SRC_LEN;
const unsigned char * const SRC_LAST_DEC = SRC_END - 2; // last decodable '%'
const unsigned char * const SRC_LAST_DEC = SRC_END - 2; // last decodable '%'
char * const pStart = new char[SRC_LEN];
char * pEnd = pStart;
@ -384,7 +384,7 @@ std::string UriEncode(const std::string & sSrc)
for (; pSrc < SRC_END; ++pSrc)
{
if (SAFE[*pSrc])
if (SAFE[*pSrc])
*pEnd++ = *pSrc;
else
{
@ -494,10 +494,10 @@ std::string CodeToUTF8(const char* fromcode, const std::basic_string<T>& input)
out_buffer.resize(out_buffer_size - dst_bytes);
out_buffer.swap(result);
iconv_close(conv_desc);
}
return result;
}

2
Source/Core/Common/Src/StringUtil.h
View File

@ -58,7 +58,7 @@ template <typename N>
static bool TryParse(const std::string &str, N *const output)
{
std::istringstream iss(str);
N tmp = 0;
if (iss >> tmp)
{

8
Source/Core/Common/Src/SysConf.cpp
View File

@ -38,11 +38,11 @@ bool SysConf::LoadFromFile(const char *filename)
GenerateSysConf();
return true;
}
u64 size = File::GetSize(filename);
if (size != SYSCONF_SIZE)
{
if (AskYesNoT("Your SYSCONF file is the wrong size.\nIt should be 0x%04x (but is 0x%04llx)\nDo you want to generate a new one?",
if (AskYesNoT("Your SYSCONF file is the wrong size.\nIt should be 0x%04x (but is 0x%04llx)\nDo you want to generate a new one?",
SYSCONF_SIZE, size))
{
GenerateSysConf();
@ -314,7 +314,7 @@ void SysConf::GenerateSysConf()
}
const u16 end_data_offset = Common::swap16(current_offset);
g.WriteBytes(&end_data_offset, 2);
// Write the items
const u8 null_byte = 0;
for (int i = 0; i != 27; ++i)
@ -398,7 +398,7 @@ void SysConf::UpdateLocation()
if (m_IsValid)
Save();
// Clear the old filename and set the default filename to the new user path
// Clear the old filename and set the default filename to the new user path
// So that it can be generated if the file does not exist in the new location
m_Filename.clear();
m_FilenameDefault = File::GetUserPath(F_WIISYSCONF_IDX);

6
Source/Core/Common/Src/Thread.cpp
View File

@ -28,7 +28,7 @@ int CurrentThreadId()
return 0;
#endif
}
#ifdef _WIN32
void SetThreadAffinity(std::thread::native_handle_type thread, u32 mask)
@ -55,7 +55,7 @@ void SwitchCurrentThread()
// Sets the debugger-visible name of the current thread.
// Uses undocumented (actually, it is now documented) trick.
// http://msdn.microsoft.com/library/default.asp?url=/library/en-us/vsdebug/html/vxtsksettingthreadname.asp
// This is implemented much nicer in upcoming msvc++, see:
// http://msdn.microsoft.com/en-us/library/xcb2z8hs(VS.100).aspx
void SetCurrentThreadName(const char* szThreadName)
@ -84,7 +84,7 @@ void SetCurrentThreadName(const char* szThreadName)
__except(EXCEPTION_CONTINUE_EXECUTION)
{}
}
#else // !WIN32, so must be POSIX threads
void SetThreadAffinity(std::thread::native_handle_type thread, u32 mask)

8
Source/Core/Common/Src/Thread.h
View File

@ -32,7 +32,7 @@ int CurrentThreadId();
void SetThreadAffinity(std::thread::native_handle_type thread, u32 mask);
void SetCurrentThreadAffinity(u32 mask);
class Event
{
public:
@ -137,7 +137,7 @@ private:
const size_t m_count;
volatile size_t m_waiting;
};
void SleepCurrentThread(int ms);
void SwitchCurrentThread(); // On Linux, this is equal to sleep 1ms
@ -148,9 +148,9 @@ inline void YieldCPU()
{
std::this_thread::yield();
}
void SetCurrentThreadName(const char *name);
} // namespace Common
#endif // _THREAD_H_

2
Source/Core/Common/Src/Version.cpp
View File

@ -29,7 +29,7 @@ const char *scm_rev_str = "Dolphin "
#else
#ifdef _M_ARM
#define NP_ARCH "ARM"
#else
#else
#define NP_ARCH "x86"
#endif
#endif

34
Source/Core/Common/Src/x64ABI.cpp
View File

@ -13,7 +13,7 @@ unsigned int XEmitter::ABI_GetAlignedFrameSize(unsigned int frameSize, bool noPr
// On platforms other than Windows 32-bit: At the beginning of a function,
// the stack pointer is 4/8 bytes less than a multiple of 16; however, the
// function prolog immediately subtracts an appropriate amount to align
// it, so no alignment is required around a call.
// it, so no alignment is required around a call.
// In the functions generated by ThunkManager::ProtectFunction and some
// others, we add the necessary subtraction (and 0x20 bytes shadow space
// for Win64) into this rather than having a separate prolog.
@ -497,12 +497,12 @@ void XEmitter::ABI_PushAllCalleeSavedRegsAndAdjustStack() {
//we only want to do this once
PUSH(RBP);
MOV(64, R(RBP), R(RSP));
PUSH(RBX);
PUSH(RSI);
PUSH(RBX);
PUSH(RSI);
PUSH(RDI);
PUSH(R12);
PUSH(R13);
PUSH(R14);
PUSH(R12);
PUSH(R13);
PUSH(R14);
PUSH(R15);
SUB(64, R(RSP), Imm8(0x28));
//TODO: Also preserve XMM0-3?
@ -511,12 +511,12 @@ void XEmitter::ABI_PushAllCalleeSavedRegsAndAdjustStack() {
void XEmitter::ABI_PopAllCalleeSavedRegsAndAdjustStack() {
ADD(64, R(RSP), Imm8(0x28));
POP(R15);
POP(R14);
POP(R13);
POP(R14);
POP(R13);
POP(R12);
POP(RDI);
POP(RSI);
POP(RBX);
POP(RSI);
POP(RBX);
POP(RBP);
}
@ -526,10 +526,10 @@ void XEmitter::ABI_PopAllCalleeSavedRegsAndAdjustStack() {
void XEmitter::ABI_PushAllCalleeSavedRegsAndAdjustStack() {
PUSH(RBP);
MOV(64, R(RBP), R(RSP));
PUSH(RBX);
PUSH(R12);
PUSH(R13);
PUSH(R14);
PUSH(RBX);
PUSH(R12);
PUSH(R13);
PUSH(R14);
PUSH(R15);
SUB(64, R(RSP), Imm8(8));
}
@ -537,10 +537,10 @@ void XEmitter::ABI_PushAllCalleeSavedRegsAndAdjustStack() {
void XEmitter::ABI_PopAllCalleeSavedRegsAndAdjustStack() {
ADD(64, R(RSP), Imm8(8));
POP(R15);
POP(R14);
POP(R13);
POP(R14);
POP(R13);
POP(R12);
POP(RBX);
POP(RBX);
POP(RBP);
}

2
Source/Core/Common/Src/x64ABI.h
View File

@ -48,7 +48,7 @@
#else // 64 bit calling convention
#ifdef _WIN32 // 64-bit Windows - the really exotic calling convention
#ifdef _WIN32 // 64-bit Windows - the really exotic calling convention
#define ABI_PARAM1 RCX
#define ABI_PARAM2 RDX

34
Source/Core/Common/Src/x64Analyzer.cpp
View File

@ -10,7 +10,7 @@ bool DisassembleMov(const unsigned char *codePtr, InstructionInfo *info)
u8 rex = 0;
u8 codeByte = 0;
u8 codeByte2 = 0;
//Check for regular prefix
info->operandSize = 4;
info->zeroExtend = false;
@ -28,7 +28,7 @@ bool DisassembleMov(const unsigned char *codePtr, InstructionInfo *info)
{
info->operandSize = 2;
codePtr++;
}
}
else if (*codePtr == 0x67)
{
codePtr++;
@ -47,17 +47,17 @@ bool DisassembleMov(const unsigned char *codePtr, InstructionInfo *info)
codeByte = *codePtr++;
// Skip two-byte opcode byte
bool twoByte = false;
if(codeByte == 0x0F)
// Skip two-byte opcode byte
bool twoByte = false;
if(codeByte == 0x0F)
{
twoByte = true;
twoByte = true;
codeByte2 = *codePtr++;
}
if (!twoByte)
{
if ((codeByte & 0xF0) == 0x80 ||
if ((codeByte & 0xF0) == 0x80 ||
((codeByte & 0xF8) == 0xC0 && (codeByte & 0x0E) != 0x02))
{
modRMbyte = *codePtr++;
@ -66,20 +66,20 @@ bool DisassembleMov(const unsigned char *codePtr, InstructionInfo *info)
}
else
{
if (((codeByte2 & 0xF0) == 0x00 && (codeByte2 & 0x0F) >= 0x04 && (codeByte2 & 0x0D) != 0x0D) ||
(codeByte2 & 0xF0) == 0x30 ||
codeByte2 == 0x77 ||
(codeByte2 & 0xF0) == 0x80 ||
((codeByte2 & 0xF0) == 0xA0 && (codeByte2 & 0x07) <= 0x02) ||
(codeByte2 & 0xF8) == 0xC8)
if (((codeByte2 & 0xF0) == 0x00 && (codeByte2 & 0x0F) >= 0x04 && (codeByte2 & 0x0D) != 0x0D) ||
(codeByte2 & 0xF0) == 0x30 ||
codeByte2 == 0x77 ||
(codeByte2 & 0xF0) == 0x80 ||
((codeByte2 & 0xF0) == 0xA0 && (codeByte2 & 0x07) <= 0x02) ||
(codeByte2 & 0xF8) == 0xC8)
{
// No mod R/M byte
// No mod R/M byte
}
else
else
{
modRMbyte = *codePtr++;
hasModRM = true;
}
}
}
if (hasModRM)
@ -99,7 +99,7 @@ bool DisassembleMov(const unsigned char *codePtr, InstructionInfo *info)
}
else
{
//info->scaledReg =
//info->scaledReg =
}
}
if (mrm.mod == 1 || mrm.mod == 2)

14
Source/Core/Common/Src/x64CPUDetect.cpp
View File

@ -114,19 +114,19 @@ void CPUInfo::Detect()
OS64bit = (f64 == TRUE) ? true : false;
#endif
#endif
// Set obvious defaults, for extra safety
if (Mode64bit) {
bSSE = true;
bSSE2 = true;
bLongMode = true;
}
// Assume CPU supports the CPUID instruction. Those that don't can barely
// boot modern OS:es anyway.
int cpu_id[4];
memset(cpu_string, 0, sizeof(cpu_string));
// Detect CPU's CPUID capabilities, and grab cpu string
__cpuid(cpu_id, 0x00000000);
u32 max_std_fn = cpu_id[0]; // EAX
@ -141,10 +141,10 @@ void CPUInfo::Detect()
vendor = VENDOR_AMD;
else
vendor = VENDOR_OTHER;
// Set reasonable default brand string even if brand string not available.
strcpy(brand_string, cpu_string);
// Detect family and other misc stuff.
bool ht = false;
HTT = ht;
@ -189,7 +189,7 @@ void CPUInfo::Detect()
}
num_cores = (logical_cpu_count == 0) ? 1 : logical_cpu_count;
if (max_ex_fn >= 0x80000008) {
// Get number of cores. This is a bit complicated. Following AMD manual here.
__cpuid(cpu_id, 0x80000008);
@ -210,7 +210,7 @@ void CPUInfo::Detect()
// Use AMD's new method.
num_cores = (cpu_id[2] & 0xFF) + 1;
}
}
}
}
// Turn the cpu info into a string we can show

46
Source/Core/Common/Src/x64Emitter.cpp
View File

@ -16,7 +16,7 @@ struct NormalOpDef
u8 toRm8, toRm32, fromRm8, fromRm32, imm8, imm32, simm8, ext;
};
static const NormalOpDef nops[11] =
static const NormalOpDef nops[11] =
{
{0x00, 0x01, 0x02, 0x03, 0x80, 0x81, 0x83, 0}, //ADD
{0x10, 0x11, 0x12, 0x13, 0x80, 0x81, 0x83, 2}, //ADC
@ -230,7 +230,7 @@ void OpArg::WriteRest(XEmitter *emit, int extraBytes, X64Reg _operandReg,
SIB = true;
}
if (scale == SCALE_ATREG && ((_offsetOrBaseReg & 7) == 4))
if (scale == SCALE_ATREG && ((_offsetOrBaseReg & 7) == 4))
{
SIB = true;
ireg = _offsetOrBaseReg;
@ -255,7 +255,7 @@ void OpArg::WriteRest(XEmitter *emit, int extraBytes, X64Reg _operandReg,
int oreg = _offsetOrBaseReg;
if (SIB)
oreg = 4;
// TODO(ector): WTF is this if about? I don't remember writing it :-)
//if (RIP)
// oreg = 5;
@ -268,7 +268,7 @@ void OpArg::WriteRest(XEmitter *emit, int extraBytes, X64Reg _operandReg,
int ss;
switch (scale)
{
case SCALE_NONE: _offsetOrBaseReg = 4; ss = 0; break; //RSP
case SCALE_NONE: _offsetOrBaseReg = 4; ss = 0; break; //RSP
case SCALE_1: ss = 0; break;
case SCALE_2: ss = 1; break;
case SCALE_4: ss = 2; break;
@ -299,7 +299,7 @@ void OpArg::WriteRest(XEmitter *emit, int extraBytes, X64Reg _operandReg,
// B = base register# upper bit
void XEmitter::Rex(int w, int r, int x, int b)
{
w = w ? 1 : 0;
w = w ? 1 : 0;
r = r ? 1 : 0;
x = x ? 1 : 0;
b = b ? 1 : 0;
@ -495,7 +495,7 @@ void XEmitter::NOP(int count)
}
break;
}
}
}
void XEmitter::PAUSE() {Write8(0xF3); NOP();} //use in tight spinloops for energy saving on some cpu
void XEmitter::CLC() {Write8(0xF8);} //clear carry
@ -557,8 +557,8 @@ void XEmitter::CBW(int bits)
void XEmitter::PUSH(X64Reg reg) {WriteSimple1Byte(32, 0x50, reg);}
void XEmitter::POP(X64Reg reg) {WriteSimple1Byte(32, 0x58, reg);}
void XEmitter::PUSH(int bits, const OpArg &reg)
{
void XEmitter::PUSH(int bits, const OpArg &reg)
{
if (reg.IsSimpleReg())
PUSH(reg.GetSimpleReg());
else if (reg.IsImm())
@ -594,7 +594,7 @@ void XEmitter::PUSH(int bits, const OpArg &reg)
}
void XEmitter::POP(int /*bits*/, const OpArg &reg)
{
{
if (reg.IsSimpleReg())
POP(reg.GetSimpleReg());
else
@ -787,7 +787,7 @@ void XEmitter::WriteShift(int bits, OpArg dest, OpArg &shift, int ext)
}
if ((shift.IsSimpleReg() && shift.GetSimpleReg() != ECX) || (shift.IsImm() && shift.GetImmBits() != 8))
{
_assert_msg_(DYNA_REC, 0, "WriteShift - illegal argument");
_assert_msg_(DYNA_REC, 0, "WriteShift - illegal argument");
}
dest.operandReg = ext;
if (bits == 16) Write8(0x66);
@ -834,7 +834,7 @@ void XEmitter::WriteBitTest(int bits, OpArg &dest, OpArg &index, int ext)
}
if ((index.IsImm() && index.GetImmBits() != 8))
{
_assert_msg_(DYNA_REC, 0, "WriteBitTest - illegal argument");
_assert_msg_(DYNA_REC, 0, "WriteBitTest - illegal argument");
}
if (bits == 16) Write8(0x66);
if (index.IsImm())
@ -871,7 +871,7 @@ void XEmitter::SHRD(int bits, OpArg dest, OpArg src, OpArg shift)
}
if ((shift.IsSimpleReg() && shift.GetSimpleReg() != ECX) || (shift.IsImm() && shift.GetImmBits() != 8))
{
_assert_msg_(DYNA_REC, 0, "SHRD - illegal shift");
_assert_msg_(DYNA_REC, 0, "SHRD - illegal shift");
}
if (bits == 16) Write8(0x66);
X64Reg operand = src.GetSimpleReg();
@ -901,7 +901,7 @@ void XEmitter::SHLD(int bits, OpArg dest, OpArg src, OpArg shift)
}
if ((shift.IsSimpleReg() && shift.GetSimpleReg() != ECX) || (shift.IsImm() && shift.GetImmBits() != 8))
{
_assert_msg_(DYNA_REC, 0, "SHLD - illegal shift");
_assert_msg_(DYNA_REC, 0, "SHLD - illegal shift");
}
if (bits == 16) Write8(0x66);
X64Reg operand = src.GetSimpleReg();
@ -954,13 +954,13 @@ void OpArg::WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &o
_assert_msg_(DYNA_REC, 0, "WriteNormalOp - Writing to Imm (!toRM)");
}
if (operand.scale == SCALE_IMM8 && bits == 8)
if (operand.scale == SCALE_IMM8 && bits == 8)
{
emit->Write8(nops[op].imm8);
immToWrite = 8;
}
else if ((operand.scale == SCALE_IMM16 && bits == 16) ||
(operand.scale == SCALE_IMM32 && bits == 32) ||
(operand.scale == SCALE_IMM32 && bits == 32) ||
(operand.scale == SCALE_IMM32 && bits == 64))
{
emit->Write8(nops[op].imm32);
@ -1056,11 +1056,11 @@ void XEmitter::SBB (int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(t
void XEmitter::AND (int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(this, bits, nrmAND, a1, a2);}
void XEmitter::OR (int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(this, bits, nrmOR , a1, a2);}
void XEmitter::XOR (int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(this, bits, nrmXOR, a1, a2);}
void XEmitter::MOV (int bits, const OpArg &a1, const OpArg &a2)
void XEmitter::MOV (int bits, const OpArg &a1, const OpArg &a2)
{
#ifdef _DEBUG
_assert_msg_(DYNA_REC, !a1.IsSimpleReg() || !a2.IsSimpleReg() || a1.GetSimpleReg() != a2.GetSimpleReg(), "Redundant MOV @ %p - bug in JIT?",
code);
_assert_msg_(DYNA_REC, !a1.IsSimpleReg() || !a2.IsSimpleReg() || a1.GetSimpleReg() != a2.GetSimpleReg(), "Redundant MOV @ %p - bug in JIT?",
code);
#endif
WriteNormalOp(this, bits, nrmMOV, a1, a2);
}
@ -1188,7 +1188,7 @@ void XEmitter::MOVQ_xmm(OpArg arg, X64Reg src) {
void XEmitter::WriteMXCSR(OpArg arg, int ext)
{
if (arg.IsImm() || arg.IsSimpleReg())
if (arg.IsImm() || arg.IsSimpleReg())
_assert_msg_(DYNA_REC, 0, "MXCSR - invalid operand");
arg.operandReg = ext;
@ -1248,8 +1248,8 @@ void XEmitter::MAXPD(X64Reg regOp, OpArg arg) {WriteSSEOp(64, sseMAX, true, re
void XEmitter::SQRTPS(X64Reg regOp, OpArg arg) {WriteSSEOp(32, sseSQRT, true, regOp, arg);}
void XEmitter::SQRTPD(X64Reg regOp, OpArg arg) {WriteSSEOp(64, sseSQRT, true, regOp, arg);}
void XEmitter::RSQRTPS(X64Reg regOp, OpArg arg) {WriteSSEOp(32, sseRSQRT, true, regOp, arg);}
void XEmitter::SHUFPS(X64Reg regOp, OpArg arg, u8 shuffle) {WriteSSEOp(32, sseSHUF, true, regOp, arg,1); Write8(shuffle);}
void XEmitter::SHUFPD(X64Reg regOp, OpArg arg, u8 shuffle) {WriteSSEOp(64, sseSHUF, true, regOp, arg,1); Write8(shuffle);}
void XEmitter::SHUFPS(X64Reg regOp, OpArg arg, u8 shuffle) {WriteSSEOp(32, sseSHUF, true, regOp, arg,1); Write8(shuffle);}
void XEmitter::SHUFPD(X64Reg regOp, OpArg arg, u8 shuffle) {WriteSSEOp(64, sseSHUF, true, regOp, arg,1); Write8(shuffle);}
void XEmitter::COMISS(X64Reg regOp, OpArg arg) {WriteSSEOp(32, sseCOMIS, true, regOp, arg);} //weird that these should be packed
void XEmitter::COMISD(X64Reg regOp, OpArg arg) {WriteSSEOp(64, sseCOMIS, true, regOp, arg);} //ordered
@ -1300,7 +1300,7 @@ void XEmitter::UNPCKHPS(X64Reg dest, OpArg arg) {WriteSSEOp(32, 0x15, true, dest
void XEmitter::UNPCKLPD(X64Reg dest, OpArg arg) {WriteSSEOp(64, 0x14, true, dest, arg);}
void XEmitter::UNPCKHPD(X64Reg dest, OpArg arg) {WriteSSEOp(64, 0x15, true, dest, arg);}
void XEmitter::MOVDDUP(X64Reg regOp, OpArg arg)
void XEmitter::MOVDDUP(X64Reg regOp, OpArg arg)
{
if (cpu_info.bSSE3)
{
@ -1456,7 +1456,7 @@ void XEmitter::FWAIT()
}
void XEmitter::RTDSC() { Write8(0x0F); Write8(0x31); }
// helper routines for setting pointers
void XEmitter::CallCdeclFunction3(void* fnptr, u32 arg0, u32 arg1, u32 arg2)
{

156
Source/Core/Common/Src/x64Emitter.h
View File

@ -17,7 +17,7 @@ enum X64Reg
{
EAX = 0, EBX = 3, ECX = 1, EDX = 2,
ESI = 6, EDI = 7, EBP = 5, ESP = 4,
RAX = 0, RBX = 3, RCX = 1, RDX = 2,
RSI = 6, RDI = 7, RBP = 5, RSP = 4,
R8 = 8, R9 = 9, R10 = 10,R11 = 11,
@ -30,7 +30,7 @@ enum X64Reg
AX = 0, BX = 3, CX = 1, DX = 2,
SI = 6, DI = 7, BP = 5, SP = 4,
XMM0=0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
XMM0=0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15,
INVALID_REG = 0xFFFFFFFF
@ -43,7 +43,7 @@ enum CCFlags
CC_B = 2, CC_C = 2, CC_NAE = 2,
CC_NB = 3, CC_NC = 3, CC_AE = 3,
CC_Z = 4, CC_E = 4,
CC_NZ = 5, CC_NE = 5,
CC_NZ = 5, CC_NE = 5,
CC_BE = 6, CC_NA = 6,
CC_NBE = 7, CC_A = 7,
CC_S = 8,
@ -264,7 +264,7 @@ public:
u8 *GetWritableCodePtr();
// Looking for one of these? It's BANNED!! Some instructions are slow on modern CPU
// INC, DEC, LOOP, LOOPNE, LOOPE, ENTER, LEAVE, XCHG, XLAT, REP MOVSB/MOVSD, REP SCASD + other string instr.,
// INC, DEC, LOOP, LOOPNE, LOOPE, ENTER, LEAVE, XCHG, XLAT, REP MOVSB/MOVSD, REP SCASD + other string instr.,
// INC and DEC are slow on Intel Core, but not on AMD. They create a
// false flag dependency because they only update a subset of the flags.
// XCHG is SLOW and should be avoided.
@ -353,7 +353,7 @@ public:
void DIV(int bits, OpArg src);
void IDIV(int bits, OpArg src);
// Shift
// Shift
void ROL(int bits, OpArg dest, OpArg shift);
void ROR(int bits, OpArg dest, OpArg shift);
void RCL(int bits, OpArg dest, OpArg shift);
@ -408,7 +408,7 @@ public:
// Sign/zero extension
void MOVSX(int dbits, int sbits, X64Reg dest, OpArg src); //automatically uses MOVSXD if necessary
void MOVZX(int dbits, int sbits, X64Reg dest, OpArg src);
void MOVZX(int dbits, int sbits, X64Reg dest, OpArg src);
// WARNING - These two take 11-13 cycles and are VectorPath! (AMD64)
void STMXCSR(OpArg memloc);
@ -422,40 +422,40 @@ public:
void FWAIT();
// SSE/SSE2: Floating point arithmetic
void ADDSS(X64Reg regOp, OpArg arg);
void ADDSD(X64Reg regOp, OpArg arg);
void SUBSS(X64Reg regOp, OpArg arg);
void SUBSD(X64Reg regOp, OpArg arg);
void MULSS(X64Reg regOp, OpArg arg);
void MULSD(X64Reg regOp, OpArg arg);
void DIVSS(X64Reg regOp, OpArg arg);
void DIVSD(X64Reg regOp, OpArg arg);
void MINSS(X64Reg regOp, OpArg arg);
void MINSD(X64Reg regOp, OpArg arg);
void MAXSS(X64Reg regOp, OpArg arg);
void MAXSD(X64Reg regOp, OpArg arg);
void SQRTSS(X64Reg regOp, OpArg arg);
void SQRTSD(X64Reg regOp, OpArg arg);
void ADDSS(X64Reg regOp, OpArg arg);
void ADDSD(X64Reg regOp, OpArg arg);
void SUBSS(X64Reg regOp, OpArg arg);
void SUBSD(X64Reg regOp, OpArg arg);
void MULSS(X64Reg regOp, OpArg arg);
void MULSD(X64Reg regOp, OpArg arg);
void DIVSS(X64Reg regOp, OpArg arg);
void DIVSD(X64Reg regOp, OpArg arg);
void MINSS(X64Reg regOp, OpArg arg);
void MINSD(X64Reg regOp, OpArg arg);
void MAXSS(X64Reg regOp, OpArg arg);
void MAXSD(X64Reg regOp, OpArg arg);
void SQRTSS(X64Reg regOp, OpArg arg);
void SQRTSD(X64Reg regOp, OpArg arg);
void RSQRTSS(X64Reg regOp, OpArg arg);
// SSE/SSE2: Floating point bitwise (yes)
void CMPSS(X64Reg regOp, OpArg arg, u8 compare);
void CMPSD(X64Reg regOp, OpArg arg, u8 compare);
void ANDSS(X64Reg regOp, OpArg arg);
void ANDSD(X64Reg regOp, OpArg arg);
void ANDNSS(X64Reg regOp, OpArg arg);
void ANDNSD(X64Reg regOp, OpArg arg);
void ORSS(X64Reg regOp, OpArg arg);
void ORSD(X64Reg regOp, OpArg arg);
void XORSS(X64Reg regOp, OpArg arg);
void XORSD(X64Reg regOp, OpArg arg);
void CMPSS(X64Reg regOp, OpArg arg, u8 compare);
void CMPSD(X64Reg regOp, OpArg arg, u8 compare);
void ANDSS(X64Reg regOp, OpArg arg);
void ANDSD(X64Reg regOp, OpArg arg);
void ANDNSS(X64Reg regOp, OpArg arg);
void ANDNSD(X64Reg regOp, OpArg arg);
void ORSS(X64Reg regOp, OpArg arg);
void ORSD(X64Reg regOp, OpArg arg);
void XORSS(X64Reg regOp, OpArg arg);
void XORSD(X64Reg regOp, OpArg arg);
// SSE/SSE2: Floating point packed arithmetic (x4 for float, x2 for double)
void ADDPS(X64Reg regOp, OpArg arg);
void ADDPD(X64Reg regOp, OpArg arg);
void SUBPS(X64Reg regOp, OpArg arg);
void SUBPD(X64Reg regOp, OpArg arg);
void CMPPS(X64Reg regOp, OpArg arg, u8 compare);
void ADDPS(X64Reg regOp, OpArg arg);
void ADDPD(X64Reg regOp, OpArg arg);
void SUBPS(X64Reg regOp, OpArg arg);
void SUBPD(X64Reg regOp, OpArg arg);
void CMPPS(X64Reg regOp, OpArg arg, u8 compare);
void CMPPD(X64Reg regOp, OpArg arg, u8 compare);
void MULPS(X64Reg regOp, OpArg arg);
void MULPD(X64Reg regOp, OpArg arg);
@ -470,8 +470,8 @@ public:
void RSQRTPS(X64Reg regOp, OpArg arg);
// SSE/SSE2: Floating point packed bitwise (x4 for float, x2 for double)
void ANDPS(X64Reg regOp, OpArg arg);
void ANDPD(X64Reg regOp, OpArg arg);
void ANDPS(X64Reg regOp, OpArg arg);
void ANDPD(X64Reg regOp, OpArg arg);
void ANDNPS(X64Reg regOp, OpArg arg);
void ANDNPD(X64Reg regOp, OpArg arg);
void ORPS(X64Reg regOp, OpArg arg);
@ -480,9 +480,9 @@ public:
void XORPD(X64Reg regOp, OpArg arg);
// SSE/SSE2: Shuffle components. These are tricky - see Intel documentation.
void SHUFPS(X64Reg regOp, OpArg arg, u8 shuffle);
void SHUFPD(X64Reg regOp, OpArg arg, u8 shuffle);
void SHUFPS(X64Reg regOp, OpArg arg, u8 shuffle);
void SHUFPD(X64Reg regOp, OpArg arg, u8 shuffle);
// SSE/SSE2: Useful alternative to shuffle in some cases.
void MOVDDUP(X64Reg regOp, OpArg arg);
@ -554,51 +554,51 @@ public:
void PUNPCKLDQ(X64Reg dest, const OpArg &arg);
void PAND(X64Reg dest, OpArg arg);
void PANDN(X64Reg dest, OpArg arg);
void PXOR(X64Reg dest, OpArg arg);
void POR(X64Reg dest, OpArg arg);
void PANDN(X64Reg dest, OpArg arg);
void PXOR(X64Reg dest, OpArg arg);
void POR(X64Reg dest, OpArg arg);
void PADDB(X64Reg dest, OpArg arg);
void PADDW(X64Reg dest, OpArg arg);
void PADDD(X64Reg dest, OpArg arg);
void PADDQ(X64Reg dest, OpArg arg);
void PADDW(X64Reg dest, OpArg arg);
void PADDD(X64Reg dest, OpArg arg);
void PADDQ(X64Reg dest, OpArg arg);
void PADDSB(X64Reg dest, OpArg arg);
void PADDSW(X64Reg dest, OpArg arg);
void PADDUSB(X64Reg dest, OpArg arg);
void PADDUSW(X64Reg dest, OpArg arg);
void PADDSB(X64Reg dest, OpArg arg);
void PADDSW(X64Reg dest, OpArg arg);
void PADDUSB(X64Reg dest, OpArg arg);
void PADDUSW(X64Reg dest, OpArg arg);
void PSUBB(X64Reg dest, OpArg arg);
void PSUBW(X64Reg dest, OpArg arg);
void PSUBD(X64Reg dest, OpArg arg);
void PSUBQ(X64Reg dest, OpArg arg);
void PSUBB(X64Reg dest, OpArg arg);
void PSUBW(X64Reg dest, OpArg arg);
void PSUBD(X64Reg dest, OpArg arg);
void PSUBQ(X64Reg dest, OpArg arg);
void PSUBSB(X64Reg dest, OpArg arg);
void PSUBSW(X64Reg dest, OpArg arg);
void PSUBUSB(X64Reg dest, OpArg arg);
void PSUBUSW(X64Reg dest, OpArg arg);
void PSUBSB(X64Reg dest, OpArg arg);
void PSUBSW(X64Reg dest, OpArg arg);
void PSUBUSB(X64Reg dest, OpArg arg);
void PSUBUSW(X64Reg dest, OpArg arg);
void PAVGB(X64Reg dest, OpArg arg);
void PAVGW(X64Reg dest, OpArg arg);
void PAVGB(X64Reg dest, OpArg arg);
void PAVGW(X64Reg dest, OpArg arg);
void PCMPEQB(X64Reg dest, OpArg arg);
void PCMPEQW(X64Reg dest, OpArg arg);
void PCMPEQD(X64Reg dest, OpArg arg);
void PCMPEQB(X64Reg dest, OpArg arg);
void PCMPEQW(X64Reg dest, OpArg arg);
void PCMPEQD(X64Reg dest, OpArg arg);
void PCMPGTB(X64Reg dest, OpArg arg);
void PCMPGTW(X64Reg dest, OpArg arg);
void PCMPGTD(X64Reg dest, OpArg arg);
void PCMPGTB(X64Reg dest, OpArg arg);
void PCMPGTW(X64Reg dest, OpArg arg);
void PCMPGTD(X64Reg dest, OpArg arg);
void PEXTRW(X64Reg dest, OpArg arg, u8 subreg);
void PINSRW(X64Reg dest, OpArg arg, u8 subreg);
void PMADDWD(X64Reg dest, OpArg arg);
void PSADBW(X64Reg dest, OpArg arg);
void PMADDWD(X64Reg dest, OpArg arg);
void PSADBW(X64Reg dest, OpArg arg);
void PMAXSW(X64Reg dest, OpArg arg);
void PMAXUB(X64Reg dest, OpArg arg);
void PMINSW(X64Reg dest, OpArg arg);
void PMINUB(X64Reg dest, OpArg arg);
void PMAXSW(X64Reg dest, OpArg arg);
void PMAXUB(X64Reg dest, OpArg arg);
void PMINSW(X64Reg dest, OpArg arg);
void PMINUB(X64Reg dest, OpArg arg);
void PMOVMSKB(X64Reg dest, OpArg arg);
void PSHUFB(X64Reg dest, OpArg arg);
@ -625,7 +625,7 @@ public:
void ABI_CallFunctionC16(void *func, u16 param1);
void ABI_CallFunctionCC16(void *func, u32 param1, u16 param2);
// These only support u32 parameters, but that's enough for a lot of uses.
// These will destroy the 1 or 2 first "parameter regs".
void ABI_CallFunctionC(void *func, u32 param1);
@ -666,12 +666,12 @@ public:
void CallCdeclFunction5(void* fnptr, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4);
void CallCdeclFunction6(void* fnptr, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4, u32 arg5);
#if defined(_M_IX86)
#if defined(_M_IX86)
#define CallCdeclFunction3_I(a,b,c,d) CallCdeclFunction3((void *)(a), (b), (c), (d))
#define CallCdeclFunction4_I(a,b,c,d,e) CallCdeclFunction4((void *)(a), (b), (c), (d), (e))
#define CallCdeclFunction5_I(a,b,c,d,e,f) CallCdeclFunction5((void *)(a), (b), (c), (d), (e), (f))
#define CallCdeclFunction6_I(a,b,c,d,e,f,g) CallCdeclFunction6((void *)(a), (b), (c), (d), (e), (f), (g))
#define CallCdeclFunction4_I(a,b,c,d,e) CallCdeclFunction4((void *)(a), (b), (c), (d), (e))
#define CallCdeclFunction5_I(a,b,c,d,e,f) CallCdeclFunction5((void *)(a), (b), (c), (d), (e), (f))
#define CallCdeclFunction6_I(a,b,c,d,e,f,g) CallCdeclFunction6((void *)(a), (b), (c), (d), (e), (f), (g))
#define DECLARE_IMPORT(x)
@ -722,7 +722,7 @@ public:
// Always clear code space with breakpoints, so that if someone accidentally executes
// uninitialized, it just breaks into the debugger.
void ClearCodeSpace()
void ClearCodeSpace()
{
// x86/64: 0xCC = breakpoint
memset(region, 0xCC, region_size);

6
Source/Core/Common/Src/x64FPURoundMode.cpp
View File

@ -30,7 +30,7 @@ namespace FPURoundMode
#ifdef _M_IX86
// This shouldn't really be needed anymore since we use SSE
#ifdef _WIN32
const int table[4] =
const int table[4] =
{
_RC_NEAR,
_RC_CHOP,
@ -39,7 +39,7 @@ namespace FPURoundMode
};
_set_controlfp(_MCW_RC, table[mode]);
#else
const unsigned short table[4] =
const unsigned short table[4] =
{
FPU_ROUND_NEAR,
FPU_ROUND_CHOP,
@ -81,7 +81,7 @@ namespace FPURoundMode
}
void SetSIMDMode(u32 mode)
{
static const u32 ssetable[4] =
static const u32 ssetable[4] =
{
(0 << 13) | MASKS,
(3 << 13) | MASKS,

34
Source/Core/Core/Src/ActionReplay.cpp
View File

@ -38,13 +38,13 @@ enum
{
// Zero Code Types
ZCODE_END = 0x00,
ZCODE_NORM = 0x02,
ZCODE_ROW = 0x03,
ZCODE_NORM = 0x02,
ZCODE_ROW = 0x03,
ZCODE_04 = 0x04,
// Conditional Codes
CONDTIONAL_EQUAL = 0x01,
CONDTIONAL_NOT_EQUAL = 0x02,
CONDTIONAL_NOT_EQUAL = 0x02,
CONDTIONAL_LESS_THAN_SIGNED = 0x03,
CONDTIONAL_GREATER_THAN_SIGNED = 0x04,
CONDTIONAL_LESS_THAN_UNSIGNED = 0x05,
@ -59,14 +59,14 @@ enum
// Data Types
DATATYPE_8BIT = 0x00,
DATATYPE_16BIT = 0x01,
DATATYPE_32BIT = 0x02,
DATATYPE_16BIT = 0x01,
DATATYPE_32BIT = 0x02,
DATATYPE_32BIT_FLOAT = 0x03,
// Normal Code 0 Subtypes
SUB_RAM_WRITE = 0x00,
SUB_WRITE_POINTER = 0x01,
SUB_ADD_CODE = 0x02,
SUB_WRITE_POINTER = 0x01,
SUB_ADD_CODE = 0x02,
SUB_MASTER_CODE = 0x03,
};
@ -114,8 +114,8 @@ bool CompareValues(const u32 val1, const u32 val2, const int type);
void LoadCodes(IniFile &globalIni, IniFile &localIni, bool forceLoad)
{
// Parses the Action Replay section of a game ini file.
if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableCheats
&& !forceLoad)
if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableCheats
&& !forceLoad)
return;
arCodes.clear();
@ -196,7 +196,7 @@ void LoadCodes(IniFile &globalIni, IniFile &localIni, bool forceLoad)
else
{
SplitString(line, '-', pieces);
if (pieces.size() == 3 && pieces[0].size() == 4 && pieces[1].size() == 4 && pieces[2].size() == 5)
if (pieces.size() == 3 && pieces[0].size() == 4 && pieces[1].size() == 4 && pieces[2].size() == 5)
{
// Encrypted AR code
// Decryption is done in "blocks", so we must push blocks into a vector,
@ -231,7 +231,7 @@ void LoadCodes(std::vector<ARCode> &_arCodes, IniFile &globalIni, IniFile& local
void LogInfo(const char *format, ...)
{
if (!b_RanOnce)
if (!b_RanOnce)
{
if (LogManager::GetMaxLevel() >= LogTypes::LINFO || logSelf)
{
@ -257,7 +257,7 @@ void RunAllActive()
{
if (SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableCheats)
{
for (auto& activeCode : activeCodes)
for (auto& activeCode : activeCodes)
{
if (activeCode.active)
{
@ -390,7 +390,7 @@ bool RunCode(const ARCode &arcode)
doMemoryCopy = true;
val_last = data;
}
else
else
{
LogInfo("ZCode: Fill And Slide");
doFillNSlide = true;
@ -398,9 +398,9 @@ bool RunCode(const ARCode &arcode)
}
break;
default:
default:
LogInfo("ZCode: Unknown");
PanicAlertT("Zero code unknown to dolphin: %08x", zcode);
PanicAlertT("Zero code unknown to dolphin: %08x", zcode);
return false;
break;
}
@ -702,7 +702,7 @@ bool ZeroCode_FillAndSlide(const u32 val_last, const ARAddr addr, const u32 data
case DATATYPE_8BIT:
LogInfo("8-bit Write");
LogInfo("--------");
for (int i = 0; i < write_num; ++i)
for (int i = 0; i < write_num; ++i)
{
Memory::Write_U8(val & 0xFF, curr_addr);
curr_addr += addr_incr;
@ -766,7 +766,7 @@ bool ZeroCode_MemoryCopy(const u32 val_last, const ARAddr addr, const u32 data)
LogInfo("Size: %08x", num_bytes);
if ((data & ~0x7FFF) == 0x0000)
{
{
if ((data >> 24) != 0x0)
{ // Memory Copy With Pointers Support
LogInfo("Memory Copy With Pointers Support");

2
Source/Core/Core/Src/ArmMemTools.cpp
View File

@ -66,7 +66,7 @@ void sigsegv_handler(int signal, siginfo_t *info, void *raw_context)
void *fault_memory_ptr = (void*)ctx->arm_r10;
u8 *fault_instruction_ptr = (u8 *)ctx->arm_pc;
if (!JitInterface::IsInCodeSpace(fault_instruction_ptr)) {
// Let's not prevent debugging.
return;

16
Source/Core/Core/Src/Boot/Boot.cpp
View File

@ -41,11 +41,11 @@ void CBoot::Load_FST(bool _bIsWii)
return;
// copy first 20 bytes of disc to start of Mem 1
VolumeHandler::ReadToPtr(Memory::GetPointer(0x80000000), 0, 0x20);
VolumeHandler::ReadToPtr(Memory::GetPointer(0x80000000), 0, 0x20);
// copy of game id
Memory::Write_U32(Memory::Read_U32(0x80000000), 0x80003180);
u32 shift = 0;
if (_bIsWii)
shift = 2;
@ -137,7 +137,7 @@ bool CBoot::LoadMapFromFilename()
return false;
}
// If ipl.bin is not found, this function does *some* of what BS1 does:
// If ipl.bin is not found, this function does *some* of what BS1 does:
// loading IPL(BS2) and jumping to it.
// It does not initialize the hardware or anything else like BS1 does.
bool CBoot::Load_BS2(const std::string& _rBootROMFilename)
@ -190,7 +190,7 @@ bool CBoot::Load_BS2(const std::string& _rBootROMFilename)
// Third boot step after BootManager and Core. See Call schedule in BootManager.cpp
bool CBoot::BootUp()
{
SCoreStartupParameter& _StartupPara =
SCoreStartupParameter& _StartupPara =
SConfig::GetInstance().m_LocalCoreStartupParameter;
NOTICE_LOG(BOOT, "Booting %s", _StartupPara.m_strFilename.c_str());
@ -295,7 +295,7 @@ bool CBoot::BootUp()
NOTICE_LOG(BOOT, "Setting DVDRoot %s", _StartupPara.m_strDVDRoot.c_str());
VolumeHandler::SetVolumeDirectory(_StartupPara.m_strDVDRoot, dolWii, _StartupPara.m_strApploader, _StartupPara.m_strFilename);
BS2Success = EmulatedBS2(dolWii);
}
}
DVDInterface::SetDiscInside(VolumeHandler::IsValid());
@ -326,7 +326,7 @@ bool CBoot::BootUp()
if (elfWii != _StartupPara.bWii)
{
PanicAlertT("Warning - starting ELF in wrong console mode!");
}
}
bool BS2Success = false;
@ -347,7 +347,7 @@ bool CBoot::BootUp()
// TODO: auto-convert elf to dol, so we can load them :)
VolumeHandler::SetVolumeDirectory(_StartupPara.m_strDVDRoot, elfWii);
BS2Success = EmulatedBS2(elfWii);
}
}
else if (!_StartupPara.m_strDefaultGCM.empty())
{
NOTICE_LOG(BOOT, "Loading default ISO %s", _StartupPara.m_strDefaultGCM.c_str());
@ -364,7 +364,7 @@ bool CBoot::BootUp()
else // Poor man's bootup
{
Load_FST(elfWii);
Boot_ELF(_StartupPara.m_strFilename.c_str());
Boot_ELF(_StartupPara.m_strFilename.c_str());
}
UpdateDebugger_MapLoaded();
Dolphin_Debugger::AddAutoBreakpoints();

8
Source/Core/Core/Src/Boot/Boot_DOL.cpp
View File

@ -20,7 +20,7 @@ CDolLoader::CDolLoader(const char* _szFilename)
u8* const tmpBuffer = new u8[(size_t)size];
{
File::IOFile pStream(_szFilename, "rb");
File::IOFile pStream(_szFilename, "rb");
pStream.ReadBytes(tmpBuffer, (size_t)size);
}
@ -44,19 +44,19 @@ CDolLoader::~CDolLoader()
}
void CDolLoader::Initialize(u8* _pBuffer, u32 _Size)
{
{
memcpy(&m_dolheader, _pBuffer, sizeof(SDolHeader));
// swap memory
u32* p = (u32*)&m_dolheader;
for (size_t i = 0; i < (sizeof(SDolHeader)/sizeof(u32)); i++)
for (size_t i = 0; i < (sizeof(SDolHeader)/sizeof(u32)); i++)
p[i] = Common::swap32(p[i]);
for (auto& sect : text_section)
sect = NULL;
for (auto& sect : data_section)
sect = NULL;
u32 HID4_pattern = 0x7c13fba6;
u32 HID4_mask = 0xfc1fffff;

8
Source/Core/Core/Src/Boot/Boot_ELF.cpp
View File

@ -21,10 +21,10 @@ bool CBoot::IsElfWii(const char *filename)
File::IOFile f(filename, "rb");
f.ReadBytes(mem, (size_t)filesize);
}
// Use the same method as the DOL loader uses: search for mfspr from HID4,
// which should only be used in Wii ELFs.
//
//
// Likely to have some false positives/negatives, patches implementing a
// better heuristic are welcome.
@ -63,7 +63,7 @@ bool CBoot::Boot_ELF(const char *filename)
File::IOFile f(filename, "rb");
f.ReadBytes(mem, (size_t)filesize);
}
ElfReader reader(mem);
reader.LoadInto(0x80000000);
if (!reader.LoadSymbols())
@ -75,7 +75,7 @@ bool CBoot::Boot_ELF(const char *filename)
{
HLE::PatchFunctions();
}
PC = reader.GetEntryPoint();
delete[] mem;

6
Source/Core/Core/Src/Boot/Boot_WiiWAD.cpp
View File

@ -45,7 +45,7 @@ typedef struct {
bool CBoot::Boot_WiiWAD(const char* _pFilename)
{
std::string state_filename(Common::GetTitleDataPath(TITLEID_SYSMENU) + WII_STATE);
if (File::Exists(state_filename))
@ -53,7 +53,7 @@ bool CBoot::Boot_WiiWAD(const char* _pFilename)
File::IOFile state_file(state_filename, "r+b");
StateFlags state;
state_file.ReadBytes(&state, sizeof(StateFlags));
state.type = 0x03; // TYPE_RETURN
state.checksum = state_checksum((u32*)&state.flags, sizeof(StateFlags)-4);
@ -79,7 +79,7 @@ bool CBoot::Boot_WiiWAD(const char* _pFilename)
u64 titleID = ContentLoader.GetTitleID();
// create data directory
File::CreateFullPath(Common::GetTitleDataPath(titleID));
if (titleID == TITLEID_SYSMENU)
HLE_IPC_CreateVirtualFATFilesystem();
// setup wii mem

10
Source/Core/Core/Src/Boot/ElfReader.cpp
View File

@ -64,7 +64,7 @@ ElfReader::ElfReader(void *ptr)
byteswapHeader(*header);
segments = (Elf32_Phdr *)(base + header->e_phoff);
sections = (Elf32_Shdr *)(base + header->e_shoff);
sections = (Elf32_Shdr *)(base + header->e_shoff);
for (int i = 0; i < GetNumSegments(); i++)
{
@ -98,7 +98,7 @@ bool ElfReader::LoadInto(u32 vaddr)
// sectionOffsets = new u32[GetNumSections()];
// sectionAddrs = new u32[GetNumSections()];
// Should we relocate?
bRelocate = (header->e_type != ET_EXEC);
@ -123,7 +123,7 @@ bool ElfReader::LoadInto(u32 vaddr)
Elf32_Phdr *p = segments + i;
INFO_LOG(MASTER_LOG, "Type: %i Vaddr: %08x Filesz: %i Memsz: %i ", p->p_type, p->p_vaddr, p->p_filesz, p->p_memsz);
if (p->p_type == PT_LOAD)
{
segmentVAddr[i] = baseAddress + p->p_vaddr;
@ -154,7 +154,7 @@ bool ElfReader::LoadInto(u32 vaddr)
{
Elf32_Shdr *s = &sections[i];
const char *name = GetSectionName(i);
u32 writeAddr = s->sh_addr + baseAddress;
sectionOffsets[i] = writeAddr - vaddr;
sectionAddrs[i] = writeAddr;
@ -162,7 +162,7 @@ bool ElfReader::LoadInto(u32 vaddr)
if (s->sh_flags & SHF_ALLOC)
{
LOG(MASTER_LOG,"Data Section found: %s Sitting at %08x, size %08x", name, writeAddr, s->sh_size);
}
else
{

6
Source/Core/Core/Src/Boot/ElfReader.h
View File

@ -26,15 +26,15 @@ private:
Elf32_Ehdr *header;
Elf32_Phdr *segments;
Elf32_Shdr *sections;
u32 *sectionAddrs;
bool bRelocate;
u32 entryPoint;
public:
public:
ElfReader(void *ptr);
~ElfReader() { }
u32 Read32(int off) const { return base32[off>>2]; }
// Quick accessors

30
Source/Core/Core/Src/Boot/ElfTypes.h
View File

@ -107,12 +107,12 @@ enum ElfSectionFlags
SHF_MASKPROC =0xF0000000,
};
// Symbol binding
#define STB_LOCAL 0
#define STB_GLOBAL 1
#define STB_WEAK 2
#define STB_LOPROC 13
#define STB_HIPROC 15
// Symbol binding
#define STB_LOCAL 0
#define STB_GLOBAL 1
#define STB_WEAK 2
#define STB_LOPROC 13
#define STB_HIPROC 15
// Symbol types
#define STT_NOTYPE 0
@ -191,7 +191,7 @@ typedef unsigned int Elf32_Word;
// ELF file header
struct Elf32_Ehdr
struct Elf32_Ehdr
{
unsigned char e_ident[EI_NIDENT];
Elf32_Half e_type;
@ -210,7 +210,7 @@ struct Elf32_Ehdr
};
// Section header
struct Elf32_Shdr
struct Elf32_Shdr
{
Elf32_Word sh_name;
Elf32_Word sh_type;
@ -225,7 +225,7 @@ struct Elf32_Shdr
};
// Segment header
struct Elf32_Phdr
struct Elf32_Phdr
{
Elf32_Word p_type;
Elf32_Off p_offset;
@ -238,7 +238,7 @@ struct Elf32_Phdr
};
// Symbol table entry
struct Elf32_Sym
struct Elf32_Sym
{
Elf32_Word st_name;
Elf32_Addr st_value;
@ -253,13 +253,13 @@ struct Elf32_Sym
#define ELF32_ST_INFO(b,t) (((b)<<4)+((t)&0xf))
// Relocation entries
struct Elf32_Rel
struct Elf32_Rel
{
Elf32_Addr r_offset;
Elf32_Word r_info;
};
struct Elf32_Rela
struct Elf32_Rela
{
Elf32_Addr r_offset;
Elf32_Word r_info;
@ -271,13 +271,13 @@ struct Elf32_Rela
#define ELF32_R_INFO(s,t) (((s)<<8 )+(unsigned char)(t))
struct Elf32_Dyn
struct Elf32_Dyn
{
Elf32_Sword d_tag;
union
union
{
Elf32_Word d_val;
Elf32_Addr d_ptr;
Elf32_Addr d_ptr;
} d_un;
};

4
Source/Core/Core/Src/BootManager.cpp
View File

@ -9,7 +9,7 @@
// Call sequence: This file has one of the first function called when a game is booted,
// the boot sequence in the code is:
// DolphinWX: FrameTools.cpp StartGame
// Core BootManager.cpp BootCore
// Core.cpp Init Thread creation
@ -141,7 +141,7 @@ bool BootCore(const std::string& _rFilename)
// Flush possible changes to SYSCONF to file
SConfig::GetInstance().m_SYSCONF->Save();
}
}
}
// movie settings
if (Movie::IsPlayingInput() && Movie::IsConfigSaved())

4
Source/Core/Core/Src/ConfigManager.cpp
View File

@ -171,8 +171,8 @@ void SConfig::SaveSettings()
#ifdef USE_GDBSTUB
ini.Set("General", "GDBPort", m_LocalCoreStartupParameter.iGDBPort);
#endif
// Interface
// Interface
ini.Set("Interface", "ConfirmStop", m_LocalCoreStartupParameter.bConfirmStop);
ini.Set("Interface", "UsePanicHandlers", m_LocalCoreStartupParameter.bUsePanicHandlers);
ini.Set("Interface", "OnScreenDisplayMessages", m_LocalCoreStartupParameter.bOnScreenDisplayMessages);

2
Source/Core/Core/Src/Core.h
View File

@ -66,7 +66,7 @@ inline void DisplayMessage(const std::string &message, int time_in_ms)
{
DisplayMessage(message.c_str(), time_in_ms);
}
std::string GetStateFileName();
void SetStateFileName(std::string val);

24
Source/Core/Core/Src/CoreTiming.cpp
View File

@ -113,7 +113,7 @@ void Init()
slicelength = maxSliceLength;
globalTimer = 0;
idledCycles = 0;
ev_lost = RegisterEvent("_lost_event", &EmptyTimedCallback);
}
@ -187,7 +187,7 @@ void DoState(PointerWrap &p)
u64 GetTicks()
{
return (u64)globalTimer;
return (u64)globalTimer;
}
u64 GetIdleTicks()
@ -251,7 +251,7 @@ void AddEventToQueue(Event* ne)
// This must be run ONLY from within the cpu thread
// cyclesIntoFuture may be VERY inaccurate if called from anything else
// than Advance
// than Advance
void ScheduleEvent(int cyclesIntoFuture, int event_type, u64 userdata)
{
Event *ne = GetNewEvent();
@ -266,7 +266,7 @@ void RegisterAdvanceCallback(void (*callback)(int cyclesExecuted))
advanceCallback = callback;
}
bool IsScheduled(int event_type)
bool IsScheduled(int event_type)
{
if (!first)
return false;
@ -297,7 +297,7 @@ void RemoveEvent(int event_type)
break;
}
}
if (!first)
return;
@ -394,7 +394,7 @@ void Advance()
{
if (first->time <= globalTimer)
{
// LOG(POWERPC, "[Scheduler] %s (%lld, %lld) ",
// LOG(POWERPC, "[Scheduler] %s (%lld, %lld) ",
// event_types[first->type].name ? event_types[first->type].name : "?", (u64)globalTimer, (u64)first->time);
Event* evt = first;
first = first->next;
@ -407,7 +407,7 @@ void Advance()
}
}
if (!first)
if (!first)
{
WARN_LOG(POWERPC, "WARNING - no events in queue. Setting downcount to 10000");
downcount += 10000;
@ -437,9 +437,9 @@ void LogPendingEvents()
void Idle()
{
//DEBUG_LOG(POWERPC, "Idle");
//When the FIFO is processing data we must not advance because in this way
//the VI will be desynchronized. So, We are waiting until the FIFO finish and
//the VI will be desynchronized. So, We are waiting until the FIFO finish and
//while we process only the events required by the FIFO.
while (g_video_backend->Video_IsPossibleWaitingSetDrawDone())
{
@ -449,7 +449,7 @@ void Idle()
idledCycles += downcount;
downcount = 0;
Advance();
}
@ -463,11 +463,11 @@ std::string GetScheduledEventsSummary()
unsigned int t = ptr->type;
if (t >= event_types.size())
PanicAlertT("Invalid event type %i", t);
const char *name = event_types[ptr->type].name;
if (!name)
name = "[unknown]";
text += StringFromFormat("%s : %i %08x%08x\n", event_types[ptr->type].name, ptr->time, ptr->userdata >> 32, ptr->userdata);
ptr = ptr->next;
}

4
Source/Core/Core/Src/DSP/DSPAccelerator.cpp
View File

@ -73,7 +73,7 @@ u16 dsp_read_aram_d3()
break;
}
if (Address >= EndAddress)
if (Address >= EndAddress)
{
// Set address back to start address. (never seen this here!)
Address = (g_dsp.ifx_regs[DSP_ACSAH] << 16) | g_dsp.ifx_regs[DSP_ACSAL];
@ -131,7 +131,7 @@ u16 dsp_read_accelerator()
Address++;
break;
case 0x19: // 8-bit PCM audio
val = DSPHost_ReadHostMemory(Address) << 8;
val = DSPHost_ReadHostMemory(Address) << 8;
g_dsp.ifx_regs[DSP_YN2] = g_dsp.ifx_regs[DSP_YN1];
g_dsp.ifx_regs[DSP_YN1] = val;
Address++;

18
Source/Core/Core/Src/DSP/DSPAnalyzer.cpp
View File

@ -43,20 +43,20 @@ const u16 idle_skip_sigs[NUM_IDLE_SIGS][MAX_IDLE_SIG_SIZE + 1] =
{ 0x26fc, // lrs $AC0.M, @DMBH
0x02a0, 0x8000, // andf $AC0.M, #0x8000
0x029c, 0xFFFF, // jlnz 0x????
0, 0 },
0, 0 },
{ 0x27fc, // lrs $AC1.M, @DMBH
0x03a0, 0x8000, // andf $AC1.M, #0x8000
0x029c, 0xFFFF, // jlnz 0x????
0, 0 },
0, 0 },
// From Zelda:
{ 0x00de, 0xFFFE, // LR $AC0.M, @CMBH
0x02c0, 0x8000, // ANDCF $AC0.M, #0x8000
0x02c0, 0x8000, // ANDCF $AC0.M, #0x8000
0x029c, 0xFFFF, // JLNZ 0x05cf
0 },
// From Zelda - experimental
{ 0x00da, 0x0352, // lr $AX0.H, @0x0352
0x8600, // tstaxh $AX0.H
0x0295, 0xFFFF, // jz 0x????
0x0295, 0xFFFF, // jz 0x????
0, 0 }
};
@ -112,11 +112,11 @@ void AnalyzeRange(int start_addr, int end_addr)
// If an instruction potentially raises exceptions, mark the following
// instruction as needing to check for exceptions
if (opcode->opcode == 0x00c0 ||
opcode->opcode == 0x1800 ||
opcode->opcode == 0x1880 ||
opcode->opcode == 0x1900 ||
opcode->opcode == 0x1980 ||
if (opcode->opcode == 0x00c0 ||
opcode->opcode == 0x1800 ||
opcode->opcode == 0x1880 ||
opcode->opcode == 0x1900 ||
opcode->opcode == 0x1980 ||
opcode->opcode == 0x2000 ||
opcode->extended
)

4
Source/Core/Core/Src/DSP/DSPBreakpoints.h
View File

@ -16,7 +16,7 @@ public:
{
Clear();
}
// is address breakpoint
bool IsAddressBreakPoint(u32 addr)
{
@ -27,7 +27,7 @@ public:
bool Add(u32 addr, bool temp=false)
{
bool was_one = b[addr] != 0;
if (!was_one)
{
b[addr] = temp ? 2 : 1;

8
Source/Core/Core/Src/DSP/DSPCodeUtil.cpp
View File

@ -54,7 +54,7 @@ bool Disassemble(const std::vector<u16> &code, bool line_numbers, std::string &t
}
bool Compare(const std::vector<u16> &code1, const std::vector<u16> &code2)
{
{
if (code1.size() != code2.size())
printf("Size difference! 1=%i 2=%i\n", (int)code1.size(), (int)code2.size());
u32 count_equal = 0;
@ -94,7 +94,7 @@ bool Compare(const std::vector<u16> &code1, const std::vector<u16> &code2)
return code1.size() == code2.size() && code1.size() == count_equal;
}
void GenRandomCode(u32 size, std::vector<u16> &code)
void GenRandomCode(u32 size, std::vector<u16> &code)
{
code.resize(size);
for (u32 i = 0; i < size; i++)
@ -149,7 +149,7 @@ void CodesToHeader(const std::vector<u16> *codes, const std::vector<std::string>
reserveSize += (u32)codes_padded.at(i).size();
}
header.clear();
header.reserve(reserveSize * 4);
sprintf(buffer, "#define NUM_UCODES %u\n\n", numCodes);
@ -172,7 +172,7 @@ void CodesToHeader(const std::vector<u16> *codes, const std::vector<std::string>
continue;
header.append("\t{\n\t\t");
for (u32 j = 0; j < codes_padded.at(i).size(); j++)
for (u32 j = 0; j < codes_padded.at(i).size(); j++)
{
if (j && ((j & 15) == 0))
header.append("\n\t\t");

8
Source/Core/Core/Src/DSP/DSPCore.cpp
View File

@ -52,7 +52,7 @@ static bool LoadRom(const char *fname, int size_in_words, u16 *rom)
{
pFile.ReadArray(rom, size_in_words);
pFile.Close();
// Byteswap the rom.
for (int i = 0; i < size_in_words; i++)
rom[i] = Common::swap16(rom[i]);
@ -139,7 +139,7 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename,
cyclesLeft = 0;
init_hax = false;
dspjit = NULL;
g_dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);
g_dsp.iram = (u16*)AllocateMemoryPages(DSP_IRAM_BYTE_SIZE);
g_dsp.dram = (u16*)AllocateMemoryPages(DSP_DRAM_BYTE_SIZE);
@ -198,7 +198,7 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename,
WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);
// Initialize JIT, if necessary
if(bUsingJIT)
if(bUsingJIT)
dspjit = new DSPEmitter();
core_state = DSPCORE_RUNNING;
@ -250,7 +250,7 @@ void DSPCore_CheckExternalInterrupt()
// Signal the SPU about new mail
DSPCore_SetException(EXP_INT);
g_dsp.cr &= ~CR_EXTERNAL_INT;
}

2
Source/Core/Core/Src/DSP/DSPCore.h
View File

@ -222,7 +222,7 @@ struct SDSP
#if PROFILE
u16 err_pc;
#endif
// This is NOT the same cr as r.cr.
// This register is shared with the main emulation, see DSP.cpp
// The engine has control over 0x0C07 of this reg.

16
Source/Core/Core/Src/DSP/DSPEmitter.cpp
View File

@ -25,7 +25,7 @@ DSPEmitter::DSPEmitter() : gpr(*this), storeIndex(-1), storeIndex2(-1)
blocks = new DSPCompiledCode[MAX_BLOCKS];
blockLinks = new Block[MAX_BLOCKS];
blockSize = new u16[MAX_BLOCKS];
compileSR = 0;
compileSR |= SR_INT_ENABLE;
compileSR |= SR_EXT_INT_ENABLE;
@ -42,7 +42,7 @@ DSPEmitter::DSPEmitter() : gpr(*this), storeIndex(-1), storeIndex2(-1)
}
}
DSPEmitter::~DSPEmitter()
DSPEmitter::~DSPEmitter()
{
delete[] blocks;
delete[] blockLinks;
@ -62,7 +62,7 @@ void DSPEmitter::ClearIRAM()
g_dsp.reset_dspjit_codespace = true;
}
void DSPEmitter::ClearIRAMandDSPJITCodespaceReset()
void DSPEmitter::ClearIRAMandDSPJITCodespaceReset()
{
ClearCodeSpace();
CompileDispatcher();
@ -101,9 +101,9 @@ void DSPEmitter::checkExceptions(u32 retval)
bool DSPEmitter::FlagsNeeded()
{
if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) ||
(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
return true;
if (!(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_START_OF_INST) ||
(DSPAnalyzer::code_flags[compilePC] & DSPAnalyzer::CODE_UPDATE_SR))
return true;
else
return false;
}
@ -168,7 +168,7 @@ void DSPEmitter::EmitInstruction(UDSPInstruction inst)
}
}
}
// Main instruction
if (!opTable[inst]->jitFunc)
{
@ -352,7 +352,7 @@ void DSPEmitter::Compile(u16 start_addr)
}
}
if (blockSize[start_addr] == 0)
if (blockSize[start_addr] == 0)
{
// just a safeguard, should never happen anymore.
// if it does we might get stuck over in RunForCycles.

2
Source/Core/Core/Src/DSP/DSPEmitter.h
View File

@ -264,7 +264,7 @@ private:
// The index of the last stored ext value (compile time).
int storeIndex;
int storeIndex2;
// Counts down.
// int cycles;

6
Source/Core/Core/Src/DSP/DSPHWInterface.cpp
View File

@ -120,7 +120,7 @@ void gdsp_ifx_write(u32 addr, u32 val)
case DSP_DIRQ:
if (val & 0x1)
DSPHost_InterruptRequest();
else
else
INFO_LOG(DSPLLE, "Unknown Interrupt Request pc=%04x (%04x)", g_dsp.pc, val);
break;
@ -156,7 +156,7 @@ void gdsp_ifx_write(u32 addr, u32 val)
case DSP_GAIN:
if (val)
{
INFO_LOG(DSPLLE,"Gain Written: 0x%04x", val);
INFO_LOG(DSPLLE,"Gain Written: 0x%04x", val);
}
case DSP_DSPA:
case DSP_DSMAH:
@ -241,7 +241,7 @@ static void gdsp_idma_in(u16 dsp_addr, u32 addr, u32 size)
u8* dst = ((u8*)g_dsp.iram);
for (u32 i = 0; i < size; i += 2)
{
{
*(u16*)&dst[dsp_addr + i] = Common::swap16(*(const u16*)&g_dsp.cpu_ram[(addr + i) & 0x0fffffff]);
}
WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);

12
Source/Core/Core/Src/DSP/DSPIntCCUtil.cpp
View File

@ -27,7 +27,7 @@ void Update_SR_Register64(s64 _Value, bool carry, bool overflow)
if (overflow)
{
g_dsp.r.sr |= SR_OVERFLOW;
g_dsp.r.sr |= SR_OVERFLOW_STICKY;
g_dsp.r.sr |= SR_OVERFLOW_STICKY;
}
// 0x04
@ -79,14 +79,14 @@ void Update_SR_Register16(s16 _Value, bool carry, bool overflow, bool overS32)
g_dsp.r.sr |= SR_ARITH_ZERO;
}
// 0x08
// 0x08
if (_Value < 0)
{
g_dsp.r.sr |= SR_SIGN;
}
// 0x10
if (overS32)
if (overS32)
{
g_dsp.r.sr |= SR_OVER_S32;
}
@ -100,7 +100,7 @@ void Update_SR_Register16(s16 _Value, bool carry, bool overflow, bool overS32)
void Update_SR_LZ(bool value)
{
if (value == true)
if (value == true)
g_dsp.r.sr |= SR_LOGIC_ZERO;
else
g_dsp.r.sr &= ~SR_LOGIC_ZERO;
@ -156,11 +156,11 @@ bool CheckCondition(u8 _Condition)
return isLess() || isZero();
case 0x4: // NZ - Not Zero
return !isZero();
case 0x5: // Z - Zero
case 0x5: // Z - Zero
return isZero();
case 0x6: // NC - Not carry
return !isCarry();
case 0x7: // C - Carry
case 0x7: // C - Carry
return isCarry();
case 0x8: // ? - Not over s32
return !isOverS32();

2
Source/Core/Core/Src/DSP/DSPIntCCUtil.h
View File

@ -26,7 +26,7 @@ inline bool isCarry(u64 val, u64 result) {
}
inline bool isCarry2(u64 val, u64 result) {
return (val>=result);
return (val>=result);
}
inline bool isOverflow(s64 val1, s64 val2, s64 res) {

32
Source/Core/Core/Src/DSP/DSPIntExtOps.cpp
View File

@ -7,7 +7,7 @@
#include "DSPIntExtOps.h"
//not needed for game ucodes (it slows down interpreter/dspjit32 + easier to compare int VS dspjit64 without it)
//#define PRECISE_BACKLOG
//#define PRECISE_BACKLOG
// Extended opcodes do not exist on their own. These opcodes can only be
// attached to opcodes that allow extending (8 (or 7) lower bits of opcode not used by
@ -29,7 +29,7 @@ inline static void writeToBackLog(int i, int idx, u16 value)
namespace DSPInterpreter
{
namespace Ext
namespace Ext
{
inline bool IsSameMemArea(u16 a, u16 b)
@ -63,7 +63,7 @@ void ir(const UDSPInstruction opc)
void nr(const UDSPInstruction opc)
{
u8 reg = opc & 0x3;
writeToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg]));
}
@ -87,7 +87,7 @@ void mv(const UDSPInstruction opc)
break;
}
}
// S @$arD, $acS.S
// xxxx xxxx 001s s0dd
// Store value of $acS.S in the memory pointed by register $arD.
@ -136,14 +136,14 @@ void sn(const UDSPInstruction opc)
// L $axD.D, @$arS
// xxxx xxxx 01dd d0ss
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Post increment register $arS.
void l(const UDSPInstruction opc)
{
u8 sreg = opc & 0x3;
u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT))
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT))
{
u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]);
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
@ -160,14 +160,14 @@ void l(const UDSPInstruction opc)
// LN $axD.D, @$arS
// xxxx xxxx 01dd d0ss
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Add indexing register $ixS to register $arS.
void ln(const UDSPInstruction opc)
{
u8 sreg = opc & 0x3;
u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT))
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT))
{
u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]);
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
@ -196,7 +196,7 @@ void ls(const UDSPInstruction opc)
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0]));
writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
}
@ -269,7 +269,7 @@ void sl(const UDSPInstruction opc)
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
}
// SLN $acS.m, $axD.D
@ -329,7 +329,7 @@ void slnm(const UDSPInstruction opc)
// LD $ax0.d, $ax1.r, @$arS
// xxxx xxxx 11dr 00ss
// example for "nx'ld $AX0.L, $AX1.L, @$AR3"
// Loads the word pointed by AR0 to AX0.H, then loads the word pointed by AR3 to AX0.L.
// Loads the word pointed by AR0 to AX0.H, then loads the word pointed by AR3 to AX0.L.
// Increments AR0 and AR3.
// If AR0 and AR3 point into the same memory page (upper 6 bits of addr are the same -> games are not doing that!)
// then the value pointed by AR0 is loaded to BOTH AX0.H and AX0.L.
@ -545,18 +545,18 @@ void zeroWriteBackLog()
#endif
}
void zeroWriteBackLogPreserveAcc(u8 acc)
void zeroWriteBackLogPreserveAcc(u8 acc)
{
#ifdef PRECISE_BACKLOG
for (int i = 0; writeBackLogIdx[i] != -1; i++)
{
// acc0
if ((acc == 0) &&
if ((acc == 0) &&
((writeBackLogIdx[i] == DSP_REG_ACL0) || (writeBackLogIdx[i] == DSP_REG_ACM0) || (writeBackLogIdx[i] == DSP_REG_ACH0)))
continue;
// acc1
if ((acc == 1) &&
if ((acc == 1) &&
((writeBackLogIdx[i] == DSP_REG_ACL1) || (writeBackLogIdx[i] == DSP_REG_ACM1) || (writeBackLogIdx[i] == DSP_REG_ACH1)))
continue;

6
Source/Core/Core/Src/DSP/DSPIntExtOps.h
View File

@ -30,12 +30,12 @@
// Extended opcode support.
// Many opcode have the lower 0xFF (some only 0x7f) free - there, an opcode extension
// can be stored.
// can be stored.
namespace DSPInterpreter
{
namespace Ext
{
{
void l(const UDSPInstruction opc);
void ln(const UDSPInstruction opc);
void ls(const UDSPInstruction opc);
@ -61,7 +61,7 @@ void dr(const UDSPInstruction opc);
void ir(const UDSPInstruction opc);
void nr(const UDSPInstruction opc);
void nop(const UDSPInstruction opc);
} // end namespace Ext
} // end namespace DSPinterpeter

22
Source/Core/Core/Src/DSP/DSPIntUtil.h
View File

@ -57,7 +57,7 @@ static inline u16 dsp_increase_addr_reg(u16 reg, s16 _ix)
u32 ar = g_dsp.r.ar[reg];
u32 wr = g_dsp.r.wr[reg];
s32 ix = _ix;
u32 mx = (wr | 1) << 1;
u32 nar = ar + ix;
u32 dar = (nar ^ ar ^ ix) & mx;
@ -75,7 +75,7 @@ static inline u16 dsp_increase_addr_reg(u16 reg, s16 _ix)
return nar;
}
static inline u16 dsp_decrease_addr_reg(u16 reg, s16 _ix)
static inline u16 dsp_decrease_addr_reg(u16 reg, s16 _ix)
{
u32 ar = g_dsp.r.ar[reg];
u32 wr = g_dsp.r.wr[reg];
@ -98,23 +98,23 @@ static inline u16 dsp_decrease_addr_reg(u16 reg, s16 _ix)
return nar;
}
static inline u16 dsp_increment_addr_reg(u16 reg)
static inline u16 dsp_increment_addr_reg(u16 reg)
{
u32 ar = g_dsp.r.ar[reg];
u32 wr = g_dsp.r.wr[reg];
u32 nar = ar + 1;
if ((nar ^ ar) > ((wr | 1) << 1))
nar -= wr + 1;
return nar;
}
static inline u16 dsp_decrement_addr_reg(u16 reg)
static inline u16 dsp_decrement_addr_reg(u16 reg)
{
u32 ar = g_dsp.r.ar[reg];
u32 wr = g_dsp.r.wr[reg];
u32 nar = ar + wr;
if (((nar ^ ar) & ((wr | 1) << 1)) > wr)
@ -244,9 +244,9 @@ static inline void dsp_op_write_reg(int _reg, u16 val)
}
}
static inline void dsp_conditional_extend_accum(int reg)
static inline void dsp_conditional_extend_accum(int reg)
{
switch (reg)
switch (reg)
{
case DSP_REG_ACM0:
case DSP_REG_ACM1:
@ -344,12 +344,12 @@ inline u16 dsp_op_read_reg_and_saturate(u8 _reg)
if (g_dsp.r.sr & SR_40_MODE_BIT)
{
s64 acc = dsp_get_long_acc(_reg);
if (acc != (s32)acc)
if (acc != (s32)acc)
{
if (acc > 0)
return 0x7fff;
else
else
return 0x8000;
}
else

16
Source/Core/Core/Src/DSP/DSPInterpreter.cpp
View File

@ -36,7 +36,7 @@ volatile u32 gdsp_running;
// NOTE: These have nothing to do with g_dsp.r.cr !
void WriteCR(u16 val)
void WriteCR(u16 val)
{
// reset
if (val & 1)
@ -96,7 +96,7 @@ void Step()
u16 opc = dsp_fetch_code();
ExecuteInstruction(UDSPInstruction(opc));
if (DSPAnalyzer::code_flags[g_dsp.pc - 1] & DSPAnalyzer::CODE_LOOP_END)
HandleLoop();
}
@ -107,7 +107,7 @@ int RunCyclesThread(int cycles)
while (true)
{
if (g_dsp.cr & CR_HALT)
return 0;
return 0;
if (g_dsp.external_interrupt_waiting)
{
@ -129,7 +129,7 @@ int RunCyclesDebug(int cycles)
for (int i = 0; i < 8; i++)
{
if (g_dsp.cr & CR_HALT)
return 0;
return 0;
if (dsp_breakpoints.IsAddressBreakPoint(g_dsp.pc))
{
DSPCore_SetState(DSPCORE_STEPPING);
@ -163,7 +163,7 @@ int RunCyclesDebug(int cycles)
return 0;
}
// Now, lets run some more without idle skipping.
// Now, lets run some more without idle skipping.
for (int i = 0; i < 200; i++)
{
if (dsp_breakpoints.IsAddressBreakPoint(g_dsp.pc))
@ -189,7 +189,7 @@ int RunCycles(int cycles)
for (int i = 0; i < 8; i++)
{
if (g_dsp.cr & CR_HALT)
return 0;
return 0;
Step();
cycles--;
if (cycles < 0)
@ -213,8 +213,8 @@ int RunCycles(int cycles)
return 0;
}
// Now, lets run some more without idle skipping.
for (int i = 0; i < 200; i++)
// Now, lets run some more without idle skipping.
for (int i = 0; i < 200; i++)
{
Step();
cycles--;

2
Source/Core/Core/Src/DSP/DSPInterpreter.h
View File

@ -106,7 +106,7 @@ void asr16(const UDSPInstruction opc);
void lsl(const UDSPInstruction opc);
void lsr(const UDSPInstruction opc);
void asl(const UDSPInstruction opc);
void asr(const UDSPInstruction opc);
void asr(const UDSPInstruction opc);
void lsrn(const UDSPInstruction opc);
void asrn(const UDSPInstruction opc);
void dar(const UDSPInstruction opc);

4
Source/Core/Core/Src/DSP/DSPMemoryMap.cpp
View File

@ -50,14 +50,14 @@ u16 dsp_dmem_read(u16 addr)
{
case 0x0: // 0xxx DRAM
return g_dsp.dram[addr & DSP_DRAM_MASK];
case 0x1: // 1xxx COEF
DEBUG_LOG(DSPLLE, "%04x : Coefficient Read @ %04x", g_dsp.pc, addr);
return g_dsp.coef[addr & DSP_COEF_MASK];
case 0xf: // Fxxx HW regs
return gdsp_ifx_read(addr);
default: // Unmapped/non-existing memory
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Read from UNKNOWN (%04x) memory", g_dsp.pc, addr);
return 0;

10
Source/Core/Core/Src/DSP/DSPTables.cpp
View File

@ -19,7 +19,7 @@ void nop(const UDSPInstruction opc)
ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x", opc);
}
}
const DSPOPCTemplate opcodes[] =
{
{"NOP", 0x0000, 0xfffc, nop, &DSPEmitter::nop, 1, 0, {}, false, false, false, false, false},
@ -47,7 +47,7 @@ const DSPOPCTemplate opcodes[] =
{"RETLZ", 0x02dd, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
{"RETO", 0x02de, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
{"RET", 0x02df, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, true, false, false},
{"RTI", 0x02ff, 0xffff, DSPInterpreter::rti, &DSPEmitter::rti, 1, 0, {}, false, true, true, false, false},
{"CALLGE", 0x02b0, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false},
@ -142,7 +142,7 @@ const DSPOPCTemplate opcodes[] =
{"LSR", 0x1440, 0xfec0, DSPInterpreter::lsr, &DSPEmitter::lsr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true},
{"ASL", 0x1480, 0xfec0, DSPInterpreter::asl, &DSPEmitter::asl, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true},
{"ASR", 0x14c0, 0xfec0, DSPInterpreter::asr, &DSPEmitter::asr, 1, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 1, 0, 0, 0x003f}}, false, false, false, false, true},
{"LSRN", 0x02ca, 0xffff, DSPInterpreter::lsrn, &DSPEmitter::lsrn, 1, 0, {}, false, false, false, false, true}, // discovered by ector!
{"ASRN", 0x02cb, 0xffff, DSPInterpreter::asrn, &DSPEmitter::asrn, 1, 0, {}, false, false, false, false, true}, // discovered by ector!
@ -288,7 +288,7 @@ const DSPOPCTemplate opcodes[] =
{"MOVPZ", 0xfe00, 0xfe00, DSPInterpreter::movpz, &DSPEmitter::movpz, 1, 1, {{P_ACC, 1, 0, 8, 0x0100}}, true, false, false, false, true},
};
const DSPOPCTemplate cw =
const DSPOPCTemplate cw =
{"CW", 0x0000, 0x0000, nop, NULL, 1, 1, {{P_VAL, 2, 0, 0, 0xffff}}, false, false, false, false, false};
// extended opcodes
@ -556,7 +556,7 @@ void InitInstructionTable()
if (opTable[i] == &cw)
opTable[i] = &opcode;
else
ERROR_LOG(DSPLLE, "opcode table place %d already in use for %s", i, opcode.name);
ERROR_LOG(DSPLLE, "opcode table place %d already in use for %s", i, opcode.name);
}
}
}

2
Source/Core/Core/Src/DSP/DSPTables.h
View File

@ -29,7 +29,7 @@ enum partype_t
P_ADDR_D = 0x0006,
P_REG = 0x8000,
P_REG04 = P_REG | 0x0400, // IX
P_REG08 = P_REG | 0x0800,
P_REG08 = P_REG | 0x0800,
P_REG18 = P_REG | 0x1800,
P_REGM18 = P_REG | 0x1810, // used in multiply instructions
P_REG19 = P_REG | 0x1900,

40
Source/Core/Core/Src/DSP/DspIntArithmetic.cpp
View File

@ -119,7 +119,7 @@ void cmp(const UDSPInstruction opc)
s64 acc0 = dsp_get_long_acc(0);
s64 acc1 = dsp_get_long_acc(1);
s64 res = dsp_convert_long_acc(acc0 - acc1);
Update_SR_Register64(res, isCarry2(acc0, res), isOverflow(acc0, -acc1, res)); // CF -> influence on ABS/0xa100
zeroWriteBackLog();
}
@ -139,7 +139,7 @@ void cmpar(const UDSPInstruction opc)
s64 rr = (s16)g_dsp.r.ax[rreg-DSP_REG_AXH0].h;
rr <<= 16;
s64 res = dsp_convert_long_acc(sr - rr);
Update_SR_Register64(res, isCarry2(sr, res), isOverflow(sr, -rr, res));
zeroWriteBackLog();
}
@ -147,7 +147,7 @@ void cmpar(const UDSPInstruction opc)
// CMPI $amD, #I
// 0000 001r 1000 0000
// iiii iiii iiii iiii
// Compares mid accumulator $acD.hm ($amD) with sign extended immediate value I.
// Compares mid accumulator $acD.hm ($amD) with sign extended immediate value I.
// Although flags are being set regarding whole accumulator register.
//
// flags out: x-xx xxxx
@ -175,7 +175,7 @@ void cmpis(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(areg);
s64 val = (s8)opc;
val <<= 16;
val <<= 16;
s64 res = dsp_convert_long_acc(acc - val);
Update_SR_Register64(res, isCarry2(acc, res), isOverflow(acc, -val, res));
@ -477,7 +477,7 @@ void addaxl(const UDSPInstruction opc)
Update_SR_Register64((s64)res, isCarry(acc, res), isOverflow((s64)acc, (s64)acx, (s64)res));
}
// ADDI $amR, #I
// ADDI $amR, #I
// 0000 001r 0000 0000
// iiii iiii iiii iiii
// Adds immediate (16-bit sign extended) to mid accumulator $acD.hm.
@ -530,7 +530,7 @@ void incm(const UDSPInstruction opc)
s64 res = acc + sub;
zeroWriteBackLog();
dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg);
Update_SR_Register64(res, isCarry(acc, res), isOverflow(acc, sub, res));
@ -546,7 +546,7 @@ void inc(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x1;
s64 acc = dsp_get_long_acc(dreg);
s64 res = acc + 1;
s64 res = acc + 1;
zeroWriteBackLog();
@ -615,7 +615,7 @@ void subax(const UDSPInstruction opc)
// SUB $acD, $ac(1-D)
// 0101 110d xxxx xxxx
// Subtracts accumulator $ac(1-D) from accumulator register $acD.
// Subtracts accumulator $ac(1-D) from accumulator register $acD.
//
// flags out: x-xx xxxx
void sub(const UDSPInstruction opc)
@ -667,9 +667,9 @@ void decm(const UDSPInstruction opc)
s64 res = acc - sub;
zeroWriteBackLog();
dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg);
res = dsp_get_long_acc(dreg);
Update_SR_Register64(res, isCarry2(acc, res), isOverflow(acc, -sub, res));
}
@ -702,7 +702,7 @@ void dec(const UDSPInstruction opc)
void neg(const UDSPInstruction opc)
{
u8 dreg = (opc >> 8) & 0x1;
s64 acc = dsp_get_long_acc(dreg);
acc = 0 - acc;
@ -713,7 +713,7 @@ void neg(const UDSPInstruction opc)
}
// ABS $acD
// 1010 d001 xxxx xxxx
// 1010 d001 xxxx xxxx
// absolute value of $acD
//
// flags out: --xx xx00
@ -725,7 +725,7 @@ void abs(const UDSPInstruction opc)
if (acc < 0)
acc = 0 - acc;
zeroWriteBackLog();
dsp_set_long_acc(dreg, acc);
@ -770,7 +770,7 @@ void movr(const UDSPInstruction opc)
// MOVAX $acD, $axS
// 0110 10sd xxxx xxxx
// Moves secondary accumulator $axS to accumulator $axD.
// Moves secondary accumulator $axS to accumulator $axD.
//
// flags out: --xx xx00
void movax(const UDSPInstruction opc)
@ -833,7 +833,7 @@ void lsr16(const UDSPInstruction opc)
u64 acc = dsp_get_long_acc(areg);
acc &= 0x000000FFFFFFFFFFULL; // Lop off the extraneous sign extension our 64-bit fake accum causes
acc >>= 16;
acc >>= 16;
zeroWriteBackLog();
@ -864,10 +864,10 @@ void asr16(const UDSPInstruction opc)
// Logically shifts left accumulator $acR by number specified by value I.
//
// flags out: --xx xx00
void lsl(const UDSPInstruction opc)
void lsl(const UDSPInstruction opc)
{
u8 rreg = (opc >> 8) & 0x01;
u16 shift = opc & 0x3f;
u16 shift = opc & 0x3f;
u64 acc = dsp_get_long_acc(rreg);
acc <<= shift;
@ -895,7 +895,7 @@ void lsr(const UDSPInstruction opc)
shift = 0x40 - (opc & 0x3f);
acc >>= shift;
dsp_set_long_acc(rreg, (s64)acc);
Update_SR_Register64(dsp_get_long_acc(rreg));
}
@ -912,7 +912,7 @@ void asl(const UDSPInstruction opc)
u64 acc = dsp_get_long_acc(rreg);
acc <<= shift;
dsp_set_long_acc(rreg, acc);
Update_SR_Register64(dsp_get_long_acc(rreg));
}
@ -949,7 +949,7 @@ void asr(const UDSPInstruction opc)
// flags out: --xx xx00
void lsrn(const UDSPInstruction opc)
{
s16 shift;
s16 shift;
u16 accm = (u16)dsp_get_acc_m(1);
u64 acc = dsp_get_long_acc(0);
acc &= 0x000000FFFFFFFFFFULL;

12
Source/Core/Core/Src/DSP/DspIntBranch.cpp
View File

@ -35,8 +35,8 @@ void call(const UDSPInstruction opc)
// Generic callr implementation
// CALLRcc $R
// 0001 0111 rrr1 cccc
// Call function if condition cc has been met. Push program counter of
// instruction following "call" to call stack $st0. Set program counter to
// Call function if condition cc has been met. Push program counter of
// instruction following "call" to call stack $st0. Set program counter to
// register $R.
void callr(const UDSPInstruction opc)
{
@ -87,7 +87,7 @@ void jmprcc(const UDSPInstruction opc)
{
u8 reg = (opc >> 5) & 0x7;
g_dsp.pc = dsp_op_read_reg(reg);
}
}
}
// Generic ret implementation
@ -116,7 +116,7 @@ void rti(const UDSPInstruction opc)
}
// HALT
// 0000 0000 0020 0001
// 0000 0000 0020 0001
// Stops execution of DSP code. Sets bit DSP_CR_HALT in register DREG_CR.
void halt(const UDSPInstruction opc)
{
@ -133,7 +133,7 @@ void halt(const UDSPInstruction opc)
// continues at next opcode.
void HandleLoop()
{
// Handle looping hardware.
// Handle looping hardware.
const u16 rCallAddress = g_dsp.r.st[0];
const u16 rLoopAddress = g_dsp.r.st[2];
u16& rLoopCounter = g_dsp.r.st[3];
@ -254,7 +254,7 @@ void bloopi(const UDSPInstruction opc)
u16 cnt = opc & 0xff;
u16 loop_pc = dsp_fetch_code();
if (cnt)
if (cnt)
{
dsp_reg_store_stack(0, g_dsp.pc);
dsp_reg_store_stack(2, loop_pc);

22
Source/Core/Core/Src/DSP/DspIntLoadStore.cpp
View File

@ -13,15 +13,15 @@ namespace DSPInterpreter {
// SRS @M, $(0x18+S)
// 0010 1sss mmmm mmmm
// Move value from register $(0x18+D) to data memory pointed by address
// CR[0-7] | M. That is, the upper 8 bits of the address are the
// bottom 8 bits from CR, and the lower 8 bits are from the 8-bit immediate.
// Move value from register $(0x18+D) to data memory pointed by address
// CR[0-7] | M. That is, the upper 8 bits of the address are the
// bottom 8 bits from CR, and the lower 8 bits are from the 8-bit immediate.
// Note: pc+=2 in duddie's doc seems wrong
void srs(const UDSPInstruction opc)
{
u8 reg = ((opc >> 8) & 0x7) + 0x18;
u16 addr = (g_dsp.r.cr << 8) | (opc & 0xFF);
if (reg >= DSP_REG_ACM0)
dsp_dmem_write(addr, dsp_op_read_reg_and_saturate(reg-DSP_REG_ACM0));
else
@ -97,7 +97,7 @@ void lrr(const UDSPInstruction opc)
// LRRD $D, @$S
// 0001 1000 1ssd dddd
// Move value from data memory pointed by addressing register $S toregister $D.
// Decrement register $S.
// Decrement register $S.
void lrrd(const UDSPInstruction opc)
{
u8 sreg = (opc >> 5) & 0x3;
@ -112,7 +112,7 @@ void lrrd(const UDSPInstruction opc)
// LRRI $D, @$S
// 0001 1001 0ssd dddd
// Move value from data memory pointed by addressing register $S to register $D.
// Increment register $S.
// Increment register $S.
void lrri(const UDSPInstruction opc)
{
u8 sreg = (opc >> 5) & 0x3;
@ -127,7 +127,7 @@ void lrri(const UDSPInstruction opc)
// LRRN $D, @$S
// 0001 1001 1ssd dddd
// Move value from data memory pointed by addressing register $S to register $D.
// Add indexing register $(0x4+S) to register $S.
// Add indexing register $(0x4+S) to register $S.
void lrrn(const UDSPInstruction opc)
{
u8 sreg = (opc >> 5) & 0x3;
@ -141,8 +141,8 @@ void lrrn(const UDSPInstruction opc)
// SRR @$D, $S
// 0001 1010 0dds ssss
// Store value from source register $S to a memory location pointed by
// addressing register $D.
// Store value from source register $S to a memory location pointed by
// addressing register $D.
void srr(const UDSPInstruction opc)
{
u8 dreg = (opc >> 5) & 0x3;
@ -157,7 +157,7 @@ void srr(const UDSPInstruction opc)
// SRRD @$D, $S
// 0001 1010 1dds ssss
// Store value from source register $S to a memory location pointed by
// addressing register $D. Decrement register $D.
// addressing register $D. Decrement register $D.
void srrd(const UDSPInstruction opc)
{
u8 dreg = (opc >> 5) & 0x3;
@ -174,7 +174,7 @@ void srrd(const UDSPInstruction opc)
// SRRI @$D, $S
// 0001 1011 0dds ssss
// Store value from source register $S to a memory location pointed by
// addressing register $D. Increment register $D.
// addressing register $D. Increment register $D.
void srri(const UDSPInstruction opc)
{
u8 dreg = (opc >> 5) & 0x3;

10
Source/Core/Core/Src/DSP/DspIntMisc.cpp
View File

@ -24,14 +24,14 @@ void mrr(const UDSPInstruction opc)
dsp_op_write_reg(dreg, dsp_op_read_reg_and_saturate(sreg-DSP_REG_ACM0));
else
dsp_op_write_reg(dreg, dsp_op_read_reg(sreg));
dsp_conditional_extend_accum(dreg);
}
// LRI $D, #I
// 0000 0000 100d dddd
// iiii iiii iiii iiii
// Load immediate value I to register $D.
// Load immediate value I to register $D.
//
// DSPSpy discovery: This, and possibly other instructions that load a
// register, has a different behaviour in S40 mode if loaded to AC0.M: The
@ -47,7 +47,7 @@ void lri(const UDSPInstruction opc)
// LRIS $(0x18+D), #I
// 0000 1ddd iiii iiii
// Load immediate value I (8-bit sign extended) to accumulator register.
// Load immediate value I (8-bit sign extended) to accumulator register.
void lris(const UDSPInstruction opc)
{
u8 reg = ((opc >> 8) & 0x7) + DSP_REG_AXL0;
@ -86,7 +86,7 @@ void iar(const UDSPInstruction opc)
g_dsp.r.ar[opc & 0x3] = dsp_increment_addr_reg(opc & 0x3);
}
// SUBARN $arD
// SUBARN $arD
// 0000 0000 0000 11dd
// Subtract indexing register $ixD from an addressing register $arD.
// used only in IPL-NTSC ucode
@ -129,7 +129,7 @@ void sbset(const UDSPInstruction opc)
g_dsp.r.sr |= (1 << bit);
}
// This is a bunch of flag setters, flipping bits in SR.
// This is a bunch of flag setters, flipping bits in SR.
void srbith(const UDSPInstruction opc)
{
zeroWriteBackLog();

30
Source/Core/Core/Src/DSP/DspIntMultiplier.cpp
View File

@ -32,7 +32,7 @@ inline s64 dsp_get_multiply_prod(u16 a, u16 b, u8 sign)
return prod;
}
inline s64 dsp_multiply(u16 a, u16 b, u8 sign = 0)
{
s64 prod = dsp_get_multiply_prod(a, b, sign);
@ -120,7 +120,7 @@ void movp(const UDSPInstruction opc)
}
// MOVNP $acD
// 0111 111d xxxx xxxx
// 0111 111d xxxx xxxx
// Moves negative of multiply product from $prod register to accumulator
// $acD register.
//
@ -160,7 +160,7 @@ void movpz(const UDSPInstruction opc)
// Adds secondary accumulator $axS to product register and stores result
// in accumulator register. Low 16-bits of $acD ($acD.l) are set (round) to 0.
//
// TODO: ugly code and still small error here (+/- 1 in .m - randomly)
// TODO: ugly code and still small error here (+/- 1 in .m - randomly)
// flags out: --xx xx0x
void addpaxz(const UDSPInstruction opc)
{
@ -176,20 +176,20 @@ void addpaxz(const UDSPInstruction opc)
dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg);
Update_SR_Register64(res, isCarry(oldprod, res), false);
Update_SR_Register64(res, isCarry(oldprod, res), false);
}
//----
// MULAXH
// 1000 0011 xxxx xxxx
// Multiply $ax0.h by $ax0.h
// Multiply $ax0.h by $ax0.h
void mulaxh(const UDSPInstruction opc)
{
s64 prod = dsp_multiply(dsp_get_ax_h(0), dsp_get_ax_h(0));
zeroWriteBackLog();
dsp_set_long_prod(prod);
}
@ -206,7 +206,7 @@ void mul(const UDSPInstruction opc)
u16 axl = dsp_get_ax_l(sreg);
u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply(axh, axl);
zeroWriteBackLog();
dsp_set_long_prod(prod);
@ -277,7 +277,7 @@ void mulmvz(const UDSPInstruction opc)
u16 axl = dsp_get_ax_l(sreg);
u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply(axl, axh);
zeroWriteBackLog();
dsp_set_long_prod(prod);
@ -418,7 +418,7 @@ void mulcac(const UDSPInstruction opc)
u16 accm = dsp_get_acc_m(sreg);
u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply(accm, axh);
zeroWriteBackLog();
dsp_set_long_prod(prod);
@ -444,7 +444,7 @@ void mulcmv(const UDSPInstruction opc)
u16 accm = dsp_get_acc_m(sreg);
u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply(accm, axh);
zeroWriteBackLog();
dsp_set_long_prod(prod);
@ -457,7 +457,7 @@ void mulcmv(const UDSPInstruction opc)
// (fixed possible bug in duddie's description, s->t)
// Multiply mid part of accumulator register $acS.m by high part $axT.h of
// secondary accumulator $axT (treat them both as signed). Move product
// register before multiplication to accumulator $acR, set (round) low part of
// register before multiplication to accumulator $acR, set (round) low part of
// accumulator $acR.l to zero.
//
// flags out: --xx xx0x
@ -494,7 +494,7 @@ void maddx(const UDSPInstruction opc)
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_add(val1, val2);
zeroWriteBackLog();
dsp_set_long_prod(prod);
@ -547,7 +547,7 @@ void msubc(const UDSPInstruction opc)
{
u8 treg = (opc >> 8) & 0x1;
u8 sreg = (opc >> 9) & 0x1;
u16 accm = dsp_get_acc_m(sreg);
u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply_sub(accm, axh);
@ -565,7 +565,7 @@ void msubc(const UDSPInstruction opc)
void madd(const UDSPInstruction opc)
{
u8 sreg = (opc >> 8) & 0x1;
u16 axl = dsp_get_ax_l(sreg);
u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply_add(axl, axh);
@ -583,7 +583,7 @@ void madd(const UDSPInstruction opc)
void msub(const UDSPInstruction opc)
{
u8 sreg = (opc >> 8) & 0x1;
u16 axl = dsp_get_ax_l(sreg);
u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply_sub(axl, axh);

30
Source/Core/Core/Src/DSP/Jit/DSPJitArithmetic.cpp
View File

@ -77,7 +77,7 @@ void DSPEmitter::andcf(const UDSPInstruction opc)
// u16 val = dsp_get_acc_m(reg);
get_acc_m(reg);
// Update_SR_LZ(((val & imm) == imm) ? true : false);
// if ((val & imm) == imm)
// if ((val & imm) == imm)
// g_dsp.r.sr |= SR_LOGIC_ZERO;
// else
// g_dsp.r.sr &= ~SR_LOGIC_ZERO;
@ -117,7 +117,7 @@ void DSPEmitter::andf(const UDSPInstruction opc)
// u16 val = dsp_get_acc_m(reg);
get_acc_m(reg);
// Update_SR_LZ(((val & imm) == 0) ? true : false);
// if ((val & imm) == 0)
// if ((val & imm) == 0)
// g_dsp.r.sr |= SR_LOGIC_ZERO;
// else
// g_dsp.r.sr &= ~SR_LOGIC_ZERO;
@ -250,7 +250,7 @@ void DSPEmitter::cmpar(const UDSPInstruction opc)
// CMPI $amD, #I
// 0000 001r 1000 0000
// iiii iiii iiii iiii
// Compares mid accumulator $acD.hm ($amD) with sign extended immediate value I.
// Compares mid accumulator $acD.hm ($amD) with sign extended immediate value I.
// Although flags are being set regarding whole accumulator register.
//
// flags out: x-xx xxxx
@ -791,7 +791,7 @@ void DSPEmitter::addaxl(const UDSPInstruction opc)
#endif
}
// ADDI $amR, #I
// ADDI $amR, #I
// 0000 001r 0000 0000
// iiii iiii iiii iiii
// Adds immediate (16-bit sign extended) to mid accumulator $acD.hm.
@ -1033,7 +1033,7 @@ void DSPEmitter::subax(const UDSPInstruction opc)
// SUB $acD, $ac(1-D)
// 0101 110d xxxx xxxx
// Subtracts accumulator $ac(1-D) from accumulator register $acD.
// Subtracts accumulator $ac(1-D) from accumulator register $acD.
//
// flags out: x-xx xxxx
void DSPEmitter::sub(const UDSPInstruction opc)
@ -1125,7 +1125,7 @@ void DSPEmitter::decm(const UDSPInstruction opc)
// s64 res = acc - sub;
SUB(64, R(RAX), Imm32((u32)subtract));
// dsp_set_long_acc(dreg, res);
// res = dsp_get_long_acc(dreg);
// res = dsp_get_long_acc(dreg);
// Update_SR_Register64(res, isCarry2(acc, res), isOverflow(acc, -subtract, res));
if (FlagsNeeded())
{
@ -1155,7 +1155,7 @@ void DSPEmitter::dec(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x01;
X64Reg tmp1;
gpr.getFreeXReg(tmp1);
// s64 acc = dsp_get_long_acc(dreg);
// s64 acc = dsp_get_long_acc(dreg);
get_long_acc(dreg, tmp1);
MOV(64, R(RAX), R(tmp1));
// s64 res = acc - 1;
@ -1208,7 +1208,7 @@ void DSPEmitter::neg(const UDSPInstruction opc)
}
// ABS $acD
// 1010 d001 xxxx xxxx
// 1010 d001 xxxx xxxx
// absolute value of $acD
//
// flags out: --xx xx00
@ -1217,7 +1217,7 @@ void DSPEmitter::abs(const UDSPInstruction opc)
#ifdef _M_X64
u8 dreg = (opc >> 11) & 0x1;
// s64 acc = dsp_get_long_acc(dreg);
// s64 acc = dsp_get_long_acc(dreg);
get_long_acc(dreg);
// if (acc < 0) acc = 0 - acc;
CMP(64, R(RAX), Imm8(0));
@ -1267,7 +1267,7 @@ void DSPEmitter::movr(const UDSPInstruction opc)
// MOVAX $acD, $axS
// 0110 10sd xxxx xxxx
// Moves secondary accumulator $axS to accumulator $axD.
// Moves secondary accumulator $axS to accumulator $axD.
//
// flags out: --xx xx00
void DSPEmitter::movax(const UDSPInstruction opc)
@ -1353,7 +1353,7 @@ void DSPEmitter::lsr16(const UDSPInstruction opc)
// u64 acc = dsp_get_long_acc(areg);
get_long_acc(areg);
// acc &= 0x000000FFFFFFFFFFULL; // Lop off the extraneous sign extension our 64-bit fake accum causes
// acc >>= 16;
// acc >>= 16;
SHR(64, R(RAX), Imm8(16));
AND(64, R(RAX), Imm32(0xffffff));
// dsp_set_long_acc(areg, (s64)acc);
@ -1399,11 +1399,11 @@ void DSPEmitter::asr16(const UDSPInstruction opc)
// Logically shifts left accumulator $acR by number specified by value I.
//
// flags out: --xx xx00
void DSPEmitter::lsl(const UDSPInstruction opc)
void DSPEmitter::lsl(const UDSPInstruction opc)
{
#ifdef _M_X64
u8 rreg = (opc >> 8) & 0x01;
u16 shift = opc & 0x3f;
u16 shift = opc & 0x3f;
// u64 acc = dsp_get_long_acc(rreg);
get_long_acc(rreg);
@ -1448,7 +1448,7 @@ void DSPEmitter::lsr(const UDSPInstruction opc)
// acc >>= shift;
SHR(64, R(RAX), Imm8(shift + 24));
}
// dsp_set_long_acc(rreg, (s64)acc);
set_long_acc(rreg);
// Update_SR_Register64(dsp_get_long_acc(rreg));
@ -1531,7 +1531,7 @@ void DSPEmitter::asr(const UDSPInstruction opc)
void DSPEmitter::lsrn(const UDSPInstruction opc)
{
#ifdef _M_X64
// s16 shift;
// s16 shift;
// u16 accm = (u16)dsp_get_acc_m(1);
get_acc_m(1);
// u64 acc = dsp_get_long_acc(0);

12
Source/Core/Core/Src/DSP/Jit/DSPJitBranch.cpp
View File

@ -38,11 +38,11 @@ static void ReJitConditional(const UDSPInstruction opc, DSPEmitter& emitter)
emitter.TEST(16, R(EAX), Imm16(0x10));
break;
case 0x4: // NZ - Not Zero
case 0x5: // Z - Zero
case 0x5: // Z - Zero
emitter.TEST(16, R(EAX), Imm16(SR_ARITH_ZERO));
break;
case 0x6: // NC - Not carry
case 0x7: // C - Carry
case 0x7: // C - Carry
emitter.TEST(16, R(EAX), Imm16(SR_CARRY));
break;
case 0x8: // ? - Not over s32
@ -200,8 +200,8 @@ void r_callr(const UDSPInstruction opc, DSPEmitter& emitter)
// Generic callr implementation
// CALLRcc $R
// 0001 0111 rrr1 cccc
// Call function if condition cc has been met. Push program counter of
// instruction following "call" to call stack $st0. Set program counter to
// Call function if condition cc has been met. Push program counter of
// instruction following "call" to call stack $st0. Set program counter to
// register $R.
// NOTE: Cannot use Default(opc) here because of the need to write branch exit
void DSPEmitter::callr(const UDSPInstruction opc)
@ -261,7 +261,7 @@ void DSPEmitter::rti(const UDSPInstruction opc)
}
// HALT
// 0000 0000 0020 0001
// 0000 0000 0020 0001
// Stops execution of DSP code. Sets bit DSP_CR_HALT in register DREG_CR.
void DSPEmitter::halt(const UDSPInstruction opc)
{
@ -429,7 +429,7 @@ void DSPEmitter::bloopi(const UDSPInstruction opc)
// u16 loop_pc = dsp_fetch_code();
u16 loop_pc = dsp_imem_read(compilePC + 1);
if (cnt)
if (cnt)
{
MOV(16, R(RDX), Imm16(compilePC + 2));
dsp_reg_store_stack(0);

8
Source/Core/Core/Src/DSP/Jit/DSPJitCCUtil.cpp
View File

@ -220,8 +220,8 @@ void DSPEmitter::Update_SR_Register16_OverS32(Gen::X64Reg val)
//void DSPEmitter::Update_SR_LZ(bool value) {
// if (value == true)
// g_dsp.r[DSP_REG_SR] |= SR_LOGIC_ZERO;
// if (value == true)
// g_dsp.r[DSP_REG_SR] |= SR_LOGIC_ZERO;
// else
// g_dsp.r[DSP_REG_SR] &= ~SR_LOGIC_ZERO;
//}
@ -276,11 +276,11 @@ void DSPEmitter::Update_SR_Register16_OverS32(Gen::X64Reg val)
// return isLess() || isZero();
// case 0x4: // NZ - Not Zero
// return !isZero();
// case 0x5: // Z - Zero
// case 0x5: // Z - Zero
// return isZero();
// case 0x6: // NC - Not carry
// return !isCarry();
// case 0x7: // C - Carry
// case 0x7: // C - Carry
// return isCarry();
// case 0x8: // ? - Not over s32
// return !isOverS32();

12
Source/Core/Core/Src/DSP/Jit/DSPJitExtOps.cpp
View File

@ -44,8 +44,8 @@ void DSPEmitter::ir(const UDSPInstruction opc)
// Add corresponding indexing register $ixR to addressing register $arR.
void DSPEmitter::nr(const UDSPInstruction opc)
{
u8 reg = opc & 0x3;
u8 reg = opc & 0x3;
increase_addr_reg(reg, reg);
}
@ -106,7 +106,7 @@ void DSPEmitter::sn(const UDSPInstruction opc)
// L $axD.D, @$arS
// xxxx xxxx 01dd d0ss
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Post increment register $arS.
void DSPEmitter::l(const UDSPInstruction opc)
{
@ -130,7 +130,7 @@ void DSPEmitter::l(const UDSPInstruction opc)
// LN $axD.D, @$arS
// xxxx xxxx 01dd d0ss
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Load $axD.D/$acD.D with value from memory pointed by register $arS.
// Add indexing register $ixS to register $arS.
void DSPEmitter::ln(const UDSPInstruction opc)
{
@ -174,7 +174,7 @@ void DSPEmitter::ls(const UDSPInstruction opc)
pushExtValueFromMem(dreg, DSP_REG_AR0);
increment_addr_reg(DSP_REG_AR3);
increment_addr_reg(DSP_REG_AR0);
increment_addr_reg(DSP_REG_AR0);
}
@ -199,7 +199,7 @@ void DSPEmitter::lsn(const UDSPInstruction opc)
gpr.putXReg(tmp1);
pushExtValueFromMem(dreg, DSP_REG_AR0);
increment_addr_reg(DSP_REG_AR3);
increase_addr_reg(DSP_REG_AR0, DSP_REG_AR0);
}

20
Source/Core/Core/Src/DSP/Jit/DSPJitLoadStore.cpp
View File

@ -12,9 +12,9 @@ using namespace Gen;
// SRS @M, $(0x18+S)
// 0010 1sss mmmm mmmm
// Move value from register $(0x18+D) to data memory pointed by address
// CR[0-7] | M. That is, the upper 8 bits of the address are the
// bottom 8 bits from CR, and the lower 8 bits are from the 8-bit immediate.
// Move value from register $(0x18+D) to data memory pointed by address
// CR[0-7] | M. That is, the upper 8 bits of the address are the
// bottom 8 bits from CR, and the lower 8 bits are from the 8-bit immediate.
// Note: pc+=2 in duddie's doc seems wrong
void DSPEmitter::srs(const UDSPInstruction opc)
{
@ -130,7 +130,7 @@ void DSPEmitter::lrr(const UDSPInstruction opc)
// LRRD $D, @$S
// 0001 1000 1ssd dddd
// Move value from data memory pointed by addressing register $S toregister $D.
// Decrement register $S.
// Decrement register $S.
void DSPEmitter::lrrd(const UDSPInstruction opc)
{
u8 sreg = (opc >> 5) & 0x3;
@ -152,7 +152,7 @@ void DSPEmitter::lrrd(const UDSPInstruction opc)
// LRRI $D, @$S
// 0001 1001 0ssd dddd
// Move value from data memory pointed by addressing register $S to register $D.
// Increment register $S.
// Increment register $S.
void DSPEmitter::lrri(const UDSPInstruction opc)
{
u8 sreg = (opc >> 5) & 0x3;
@ -174,7 +174,7 @@ void DSPEmitter::lrri(const UDSPInstruction opc)
// LRRN $D, @$S
// 0001 1001 1ssd dddd
// Move value from data memory pointed by addressing register $S to register $D.
// Add indexing register $(0x4+S) to register $S.
// Add indexing register $(0x4+S) to register $S.
void DSPEmitter::lrrn(const UDSPInstruction opc)
{
u8 sreg = (opc >> 5) & 0x3;
@ -195,8 +195,8 @@ void DSPEmitter::lrrn(const UDSPInstruction opc)
// SRR @$D, $S
// 0001 1010 0dds ssss
// Store value from source register $S to a memory location pointed by
// addressing register $D.
// Store value from source register $S to a memory location pointed by
// addressing register $D.
void DSPEmitter::srr(const UDSPInstruction opc)
{
u8 dreg = (opc >> 5) & 0x3;
@ -215,7 +215,7 @@ void DSPEmitter::srr(const UDSPInstruction opc)
// SRRD @$D, $S
// 0001 1010 1dds ssss
// Store value from source register $S to a memory location pointed by
// addressing register $D. Decrement register $D.
// addressing register $D. Decrement register $D.
void DSPEmitter::srrd(const UDSPInstruction opc)
{
u8 dreg = (opc >> 5) & 0x3;
@ -236,7 +236,7 @@ void DSPEmitter::srrd(const UDSPInstruction opc)
// SRRI @$D, $S
// 0001 1011 0dds ssss
// Store value from source register $S to a memory location pointed by
// addressing register $D. Increment register $D.
// addressing register $D. Increment register $D.
void DSPEmitter::srri(const UDSPInstruction opc)
{
u8 dreg = (opc >> 5) & 0x3;

6
Source/Core/Core/Src/DSP/Jit/DSPJitMisc.cpp
View File

@ -80,7 +80,7 @@ void DSPEmitter::iar(const UDSPInstruction opc)
increment_addr_reg(opc & 0x3);
}
// SUBARN $arD
// SUBARN $arD
// 0000 0000 0000 11dd
// Subtract indexing register $ixD from an addressing register $arD.
// used only in IPL-NTSC ucode
@ -110,7 +110,7 @@ void DSPEmitter::addarn(const UDSPInstruction opc)
void DSPEmitter::setCompileSR(u16 bit)
{
// g_dsp.r[DSP_REG_SR] |= bit
OpArg sr_reg;
gpr.getReg(DSP_REG_SR,sr_reg);
@ -122,7 +122,7 @@ void DSPEmitter::setCompileSR(u16 bit)
void DSPEmitter::clrCompileSR(u16 bit)
{
// g_dsp.r[DSP_REG_SR] &= bit
OpArg sr_reg;
gpr.getReg(DSP_REG_SR,sr_reg);

8
Source/Core/Core/Src/DSP/Jit/DSPJitMultiplier.cpp
View File

@ -209,7 +209,7 @@ void DSPEmitter::movp(const UDSPInstruction opc)
}
// MOVNP $acD
// 0111 111d xxxx xxxx
// 0111 111d xxxx xxxx
// Moves negative of multiply product from $prod register to accumulator
// $acD register.
@ -286,7 +286,7 @@ void DSPEmitter::addpaxz(const UDSPInstruction opc)
// s64 oldprod = dsp_get_long_prod();
// dsp_set_long_acc(dreg, res);
// res = dsp_get_long_acc(dreg);
// Update_SR_Register64(res, isCarry(oldprod, res), false);
// Update_SR_Register64(res, isCarry(oldprod, res), false);
if (FlagsNeeded())
{
get_long_prod(RDX);
@ -308,7 +308,7 @@ void DSPEmitter::addpaxz(const UDSPInstruction opc)
// MULAXH
// 1000 0011 xxxx xxxx
// Multiply $ax0.h by $ax0.h
// Multiply $ax0.h by $ax0.h
void DSPEmitter::mulaxh(const UDSPInstruction opc)
{
#ifdef _M_X64
@ -702,7 +702,7 @@ void DSPEmitter::mulcmv(const UDSPInstruction opc)
// (fixed possible bug in duddie's description, s->t)
// Multiply mid part of accumulator register $acS.m by high part $axT.h of
// secondary accumulator $axT (treat them both as signed). Move product
// register before multiplication to accumulator $acR, set (round) low part of
// register before multiplication to accumulator $acR, set (round) low part of
// accumulator $acR.l to zero.
// flags out: --xx xx0x

2
Source/Core/Core/Src/DSP/Jit/DSPJitRegCache.cpp
View File

@ -613,7 +613,7 @@ void DSPJitRegCache::movToHostReg(int reg, bool load)
tmp = regs[reg].host_reg;
else
tmp = findSpillFreeXReg();
if (tmp == INVALID_REG)
return;

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