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JitArm64: Get rid of one MOV from lmw/stmw
This is possible now that EmitBackpatchRoutine lets the caller choose addr register. Note: The removed MOV is actually traded for one added MOV in farcode.
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c3b6e67fc7
commit
c88c6f5f18
@ -519,21 +519,26 @@ void JitArm64::lmw(UGeckoInstruction inst)
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// MMU games make use of a >= d despite this being invalid according to the PEM.
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// If a >= d occurs, we must make sure to not re-read rA after starting doing the loads.
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ARM64Reg addr_reg = ARM64Reg::W1;
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Arm64RegCache::ScopedARM64Reg addr_base_reg;
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bool a_is_addr_base_reg = false;
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if (!a)
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MOVI2R(addr_reg, offset);
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else if (gpr.IsImm(a))
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MOVI2R(addr_reg, gpr.GetImm(a) + offset);
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else if (a < d && offset + (31 - d) * 4 < 0x1000)
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a_is_addr_base_reg = true;
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else
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ADDI2R(addr_reg, gpr.R(a), offset, addr_reg);
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Arm64RegCache::ScopedARM64Reg addr_base_reg;
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if (!a_is_addr_base_reg)
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{
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addr_base_reg = gpr.GetScopedReg();
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MOV(addr_base_reg, addr_reg);
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MOVI2R(addr_base_reg, offset);
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}
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else if (gpr.IsImm(a))
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{
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addr_base_reg = gpr.GetScopedReg();
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MOVI2R(addr_base_reg, gpr.GetImm(a) + offset);
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}
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else if (a < d && offset + (31 - d) * 4 < 0x1000)
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{
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a_is_addr_base_reg = true;
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}
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else
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{
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addr_base_reg = gpr.GetScopedReg();
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ADDI2R(addr_base_reg, gpr.R(a), offset, addr_base_reg);
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}
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BitSet32 gprs_to_discard{};
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@ -576,11 +581,23 @@ void JitArm64::lmw(UGeckoInstruction inst)
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{
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gpr.BindToRegister(i, false, false);
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ARM64Reg dest_reg = gpr.R(i);
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ARM64Reg current_iteration_addr_reg = addr_reg;
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if (a_is_addr_base_reg)
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ADDI2R(addr_reg, gpr.R(a), offset + (i - d) * 4);
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else if (i != d)
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{
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const u32 current_iteration_offset = offset + (i - d) * 4;
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if (current_iteration_offset != 0)
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ADDI2R(addr_reg, gpr.R(a), current_iteration_offset);
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else
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current_iteration_addr_reg = gpr.R(a);
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}
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else
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{
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if (i != d)
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ADDI2R(addr_reg, addr_base_reg, (i - d) * 4);
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else
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current_iteration_addr_reg = addr_base_reg;
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}
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BitSet32 scratch_gprs;
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BitSet32 scratch_fprs;
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@ -588,8 +605,8 @@ void JitArm64::lmw(UGeckoInstruction inst)
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if (jo.memcheck)
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scratch_gprs[DecodeReg(ARM64Reg::W0)] = true;
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EmitBackpatchRoutine(flags, MemAccessMode::Auto, dest_reg, addr_reg, scratch_gprs,
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scratch_fprs);
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EmitBackpatchRoutine(flags, MemAccessMode::Auto, dest_reg, current_iteration_addr_reg,
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scratch_gprs, scratch_fprs);
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gpr.BindToRegister(i, false, true);
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ASSERT(dest_reg == gpr.R(i));
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@ -633,21 +650,26 @@ void JitArm64::stmw(UGeckoInstruction inst)
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gpr.Lock(ARM64Reg::W2, ARM64Reg::W30);
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ARM64Reg addr_reg = ARM64Reg::W2;
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Arm64RegCache::ScopedARM64Reg addr_base_reg;
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bool a_is_addr_base_reg = false;
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if (!a)
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MOVI2R(addr_reg, offset);
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else if (gpr.IsImm(a))
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MOVI2R(addr_reg, gpr.GetImm(a) + offset);
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else if (offset + (31 - s) * 4 < 0x1000)
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a_is_addr_base_reg = true;
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else
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ADDI2R(addr_reg, gpr.R(a), offset, addr_reg);
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Arm64GPRCache::ScopedARM64Reg addr_base_reg;
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if (!a_is_addr_base_reg)
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{
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addr_base_reg = gpr.GetScopedReg();
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MOV(addr_base_reg, addr_reg);
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MOVI2R(addr_base_reg, offset);
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}
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else if (gpr.IsImm(a))
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{
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addr_base_reg = gpr.GetScopedReg();
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MOVI2R(addr_base_reg, gpr.GetImm(a) + offset);
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}
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else if (offset + (31 - s) * 4 < 0x1000)
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{
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a_is_addr_base_reg = true;
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}
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else
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{
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addr_base_reg = gpr.GetScopedReg();
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ADDI2R(addr_base_reg, gpr.R(a), offset, addr_base_reg);
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}
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BitSet32 gprs_to_discard{};
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@ -690,17 +712,30 @@ void JitArm64::stmw(UGeckoInstruction inst)
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for (u32 i = s; i < 32; i++)
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{
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ARM64Reg src_reg = gpr.R(i);
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ARM64Reg current_iteration_addr_reg = addr_reg;
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if (a_is_addr_base_reg)
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ADDI2R(addr_reg, gpr.R(a), offset + (i - s) * 4);
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else if (i != s)
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{
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const u32 current_iteration_offset = offset + (i - s) * 4;
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if (current_iteration_offset != 0)
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ADDI2R(addr_reg, gpr.R(a), current_iteration_offset);
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else
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current_iteration_addr_reg = gpr.R(a);
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}
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else
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{
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if (i != s)
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ADDI2R(addr_reg, addr_base_reg, (i - s) * 4);
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else
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current_iteration_addr_reg = addr_base_reg;
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}
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BitSet32 scratch_gprs;
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BitSet32 scratch_fprs;
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scratch_gprs[DecodeReg(addr_reg)] = true;
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EmitBackpatchRoutine(flags, MemAccessMode::Auto, src_reg, addr_reg, scratch_gprs, scratch_fprs);
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EmitBackpatchRoutine(flags, MemAccessMode::Auto, src_reg, current_iteration_addr_reg,
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scratch_gprs, scratch_fprs);
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// To reduce register pressure and to avoid getting a pipeline-unfriendly long run of stores
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// after this instruction, flush registers that would be flushed after this instruction anyway.
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