diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.h b/Source/Core/Core/Src/PowerPC/Jit64/Jit.h index 885f7f3c4a..23d95b2852 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.h +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.h @@ -34,9 +34,9 @@ // #define INSTRUCTION_START PPCTables::CountInstruction(inst); #define INSTRUCTION_START -#define JITDISABLE(type) \ +#define JITDISABLE(setting) \ if (Core::g_CoreStartupParameter.bJITOff || \ - Core::g_CoreStartupParameter.bJIT##type##Off) \ + Core::g_CoreStartupParameter.setting) \ {Default(inst); return;} #define MEMCHECK_START \ diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp index 762b6fe5d4..310deaa9c2 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp @@ -31,7 +31,7 @@ using namespace Gen; void Jit64::sc(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) gpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL); @@ -44,7 +44,7 @@ void Jit64::sc(UGeckoInstruction inst) void Jit64::rfi(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) gpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL); @@ -64,7 +64,7 @@ void Jit64::rfi(UGeckoInstruction inst) void Jit64::bx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) // We must always process the following sentence // even if the blocks are merged by PPCAnalyst::Flatten(). @@ -107,7 +107,7 @@ void Jit64::bx(UGeckoInstruction inst) void Jit64::bcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) // USES_CR _assert_msg_(DYNA_REC, js.isLastInstruction, "bcx not last instruction of block"); @@ -155,7 +155,7 @@ void Jit64::bcx(UGeckoInstruction inst) void Jit64::bcctrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) gpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL); @@ -204,7 +204,7 @@ void Jit64::bcctrx(UGeckoInstruction inst) void Jit64::bclrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) if (!js.isLastInstruction && (inst.BO & (1 << 4)) && (inst.BO & (1 << 2))) { diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp index 87fe51382d..a04114d110 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp @@ -75,7 +75,7 @@ static const double one_const = 1.0f; void Jit64::fp_arith_s(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc) { Default(inst); return; } @@ -124,7 +124,7 @@ void Jit64::fp_arith_s(UGeckoInstruction inst) void Jit64::fmaddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc) { Default(inst); return; } @@ -181,7 +181,7 @@ void Jit64::fmaddXX(UGeckoInstruction inst) void Jit64::fsign(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc) { Default(inst); return; } @@ -212,7 +212,7 @@ void Jit64::fsign(UGeckoInstruction inst) void Jit64::fmrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc) { Default(inst); return; } @@ -228,7 +228,7 @@ void Jit64::fmrx(UGeckoInstruction inst) void Jit64::fcmpx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (jo.fpAccurateFcmp) { Default(inst); return; // turn off from debugger } diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Integer.cpp index 54fa742148..ef69ea8c4a 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Integer.cpp @@ -236,7 +236,7 @@ void Jit64::regimmop(int d, int a, bool binary, u32 value, Operation doop, void void Jit64::reg_imm(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 d = inst.RD, a = inst.RA, s = inst.RS; switch (inst.OPCD) { @@ -309,7 +309,7 @@ void Jit64::cmpXX(UGeckoInstruction inst) { // USES_CR INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int b = inst.RB; int crf = inst.CRFD; @@ -551,7 +551,7 @@ void Jit64::cmpXX(UGeckoInstruction inst) void Jit64::boolX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, s = inst.RS, b = inst.RB; _dbg_assert_msg_(DYNA_REC, inst.OPCD == 31, "Invalid boolX"); @@ -814,7 +814,7 @@ void Jit64::boolX(UGeckoInstruction inst) void Jit64::extsbx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, s = inst.RS; if (gpr.R(s).IsImm()) @@ -842,7 +842,7 @@ void Jit64::extsbx(UGeckoInstruction inst) void Jit64::extshx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, s = inst.RS; if (gpr.R(s).IsImm()) @@ -870,7 +870,7 @@ void Jit64::extshx(UGeckoInstruction inst) void Jit64::subfic(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, d = inst.RD; gpr.Lock(a, d); gpr.BindToRegister(d, a == d, true); @@ -921,7 +921,7 @@ void Jit64::subfic(UGeckoInstruction inst) void Jit64::subfcx(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; gpr.Lock(a, b, d); gpr.BindToRegister(d, (d == a || d == b), true); @@ -953,7 +953,7 @@ void Jit64::subfcx(UGeckoInstruction inst) void Jit64::subfex(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; gpr.Lock(a, b, d); gpr.BindToRegister(d, (d == a || d == b), true); @@ -991,7 +991,7 @@ void Jit64::subfmex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, d = inst.RD; gpr.Lock(a, d); gpr.BindToRegister(d, d == a); @@ -1015,7 +1015,7 @@ void Jit64::subfzex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, d = inst.RD; gpr.Lock(a, d); @@ -1040,7 +1040,7 @@ void Jit64::subfzex(UGeckoInstruction inst) void Jit64::subfx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1090,7 +1090,7 @@ void Jit64::subfx(UGeckoInstruction inst) void Jit64::mulli(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, d = inst.RD; u32 imm = inst.SIMM_16; @@ -1137,7 +1137,7 @@ void Jit64::mulli(UGeckoInstruction inst) void Jit64::mullwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1213,7 +1213,7 @@ void Jit64::mullwx(UGeckoInstruction inst) void Jit64::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1244,7 +1244,7 @@ void Jit64::mulhwux(UGeckoInstruction inst) void Jit64::divwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1401,7 +1401,7 @@ void Jit64::divwux(UGeckoInstruction inst) void Jit64::divwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1475,7 +1475,7 @@ void Jit64::divwx(UGeckoInstruction inst) void Jit64::addx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1536,7 +1536,7 @@ void Jit64::addex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if ((d == a) || (d == b)) @@ -1573,7 +1573,7 @@ void Jit64::addex(UGeckoInstruction inst) void Jit64::addcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, d = inst.RD; if ((d == a) || (d == b)) @@ -1610,7 +1610,7 @@ void Jit64::addmex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, d = inst.RD; if (d == a) @@ -1648,7 +1648,7 @@ void Jit64::addzex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, d = inst.RD; if (d == a) @@ -1685,7 +1685,7 @@ void Jit64::addzex(UGeckoInstruction inst) void Jit64::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int s = inst.RS; if (gpr.R(s).IsImm()) @@ -1752,7 +1752,7 @@ void Jit64::rlwinmx(UGeckoInstruction inst) void Jit64::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int s = inst.RS; @@ -1838,7 +1838,7 @@ void Jit64::rlwimix(UGeckoInstruction inst) void Jit64::rlwnmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA, b = inst.RB, s = inst.RS; u32 mask = Helper_Mask(inst.MB, inst.ME); @@ -1874,7 +1874,7 @@ void Jit64::rlwnmx(UGeckoInstruction inst) void Jit64::negx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int d = inst.RD; @@ -1912,7 +1912,7 @@ void Jit64::negx(UGeckoInstruction inst) void Jit64::srwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int b = inst.RB; int s = inst.RS; @@ -1964,7 +1964,7 @@ void Jit64::srwx(UGeckoInstruction inst) void Jit64::slwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int b = inst.RB; int s = inst.RS; @@ -2030,7 +2030,7 @@ void Jit64::srawx(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int b = inst.RB; int s = inst.RS; @@ -2087,7 +2087,7 @@ void Jit64::srawx(UGeckoInstruction inst) void Jit64::srawix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int s = inst.RS; int amount = inst.SH; @@ -2134,7 +2134,7 @@ void Jit64::srawix(UGeckoInstruction inst) void Jit64::cntlzwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int s = inst.RS; @@ -2170,7 +2170,7 @@ void Jit64::cntlzwx(UGeckoInstruction inst) void Jit64::twx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) s32 a = inst.RA; diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStore.cpp index 53ab412070..87a58415a1 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStore.cpp @@ -24,7 +24,7 @@ void Jit64::lXXx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) int a = inst.RA, b = inst.RB, d = inst.RD; @@ -224,7 +224,7 @@ void Jit64::lXXx(UGeckoInstruction inst) void Jit64::dcbst(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) // If the dcbst instruction is preceded by dcbt, it is flushing a prefetched // memory location. Do not invalidate the JIT cache in this case as the memory @@ -240,7 +240,7 @@ void Jit64::dcbst(UGeckoInstruction inst) void Jit64::dcbz(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) Default(inst); return; @@ -262,7 +262,7 @@ void Jit64::dcbz(UGeckoInstruction inst) void Jit64::stX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) int s = inst.RS; int a = inst.RA; @@ -397,7 +397,7 @@ void Jit64::stX(UGeckoInstruction inst) void Jit64::stXx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) int a = inst.RA, b = inst.RB, s = inst.RS; if (!a || a == s || a == b) @@ -439,7 +439,7 @@ void Jit64::stXx(UGeckoInstruction inst) void Jit64::lmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) #ifdef _M_X64 gpr.FlushLockX(ECX); @@ -462,7 +462,7 @@ void Jit64::lmw(UGeckoInstruction inst) void Jit64::stmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) #ifdef _M_X64 gpr.FlushLockX(ECX); diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStoreFloating.cpp index 04085cb34a..7083d24276 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStoreFloating.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStoreFloating.cpp @@ -39,7 +39,7 @@ u32 GC_ALIGNED16(temp32); void Jit64::lfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) int d = inst.RD; int a = inst.RA; @@ -72,7 +72,7 @@ void Jit64::lfs(UGeckoInstruction inst) void Jit64::lfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } @@ -150,7 +150,7 @@ void Jit64::lfd(UGeckoInstruction inst) void Jit64::stfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } @@ -235,7 +235,7 @@ void Jit64::stfd(UGeckoInstruction inst) void Jit64::stfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) bool update = inst.OPCD & 1; int s = inst.RS; @@ -297,7 +297,7 @@ void Jit64::stfs(UGeckoInstruction inst) void Jit64::stfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) // We can take a shortcut here - it's not likely that a hardware access would use this instruction. gpr.FlushLockX(ABI_PARAM1); @@ -317,7 +317,7 @@ void Jit64::stfsx(UGeckoInstruction inst) void Jit64::lfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) MOV(32, R(EAX), gpr.R(inst.RB)); if (inst.RA) diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStorePaired.cpp index e89f414150..00066f4746 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStorePaired.cpp @@ -40,7 +40,7 @@ static void WriteDual32(u64 value, u32 address) void Jit64::psq_st(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStorePaired) + JITDISABLE(bJITLoadStorePairedOff) if (js.memcheck) { Default(inst); return; } @@ -123,7 +123,7 @@ void Jit64::psq_st(UGeckoInstruction inst) void Jit64::psq_l(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStorePaired) + JITDISABLE(bJITLoadStorePairedOff) if (js.memcheck) { Default(inst); return; } diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Paired.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Paired.cpp index b028c77298..b58a140497 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Paired.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Paired.cpp @@ -29,7 +29,7 @@ const double GC_ALIGNED16(psZeroZero[2]) = {0.0, 0.0}; void Jit64::ps_mr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -44,7 +44,7 @@ void Jit64::ps_mr(UGeckoInstruction inst) void Jit64::ps_sel(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) Default(inst); return; @@ -76,7 +76,7 @@ void Jit64::ps_sel(UGeckoInstruction inst) void Jit64::ps_sign(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -113,7 +113,7 @@ void Jit64::ps_sign(UGeckoInstruction inst) void Jit64::ps_rsqrte(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -186,7 +186,7 @@ void Jit64::tri_op(int d, int a, int b, bool reversible, void (XEmitter::*op)(X6 void Jit64::ps_arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -206,7 +206,7 @@ void Jit64::ps_arith(UGeckoInstruction inst) void Jit64::ps_sum(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) // TODO: (inst.SUBOP5 == 10) breaks Sonic Colours (black screen) if (inst.Rc || (inst.SUBOP5 == 10)) { Default(inst); return; @@ -248,7 +248,7 @@ void Jit64::ps_sum(UGeckoInstruction inst) void Jit64::ps_muls(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -287,7 +287,7 @@ void Jit64::ps_muls(UGeckoInstruction inst) void Jit64::ps_mergeXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -324,7 +324,7 @@ void Jit64::ps_mergeXX(UGeckoInstruction inst) void Jit64::ps_maddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp index 9475be947b..9829f06d93 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp @@ -20,7 +20,7 @@ void Jit64::mtspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); int d = inst.RD; @@ -72,7 +72,7 @@ void Jit64::mtspr(UGeckoInstruction inst) void Jit64::mfspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); int d = inst.RD; switch (iIndex) @@ -100,7 +100,7 @@ void Jit64::mtmsr(UGeckoInstruction inst) { INSTRUCTION_START // Don't interpret this, if we do we get thrown out - //JITDISABLE(SystemRegisters) + //JITDISABLE(bJITSystemRegistersOff) if (!gpr.R(inst.RS).IsImm()) { gpr.Lock(inst.RS); @@ -139,7 +139,7 @@ void Jit64::mtmsr(UGeckoInstruction inst) void Jit64::mfmsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) //Privileged? gpr.Lock(inst.RD); gpr.BindToRegister(inst.RD, false, true); @@ -150,14 +150,14 @@ void Jit64::mfmsr(UGeckoInstruction inst) void Jit64::mftb(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) mfspr(inst); } void Jit64::mfcr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) // USES_CR int d = inst.RD; gpr.Lock(d); @@ -177,7 +177,7 @@ void Jit64::mfcr(UGeckoInstruction inst) void Jit64::mtcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) // USES_CR u32 crm = inst.CRM; @@ -216,7 +216,7 @@ void Jit64::mtcrf(UGeckoInstruction inst) void Jit64::mcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) // USES_CR if (inst.CRFS != inst.CRFD) @@ -229,7 +229,7 @@ void Jit64::mcrf(UGeckoInstruction inst) void Jit64::mcrxr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) // USES_CR @@ -245,7 +245,7 @@ void Jit64::mcrxr(UGeckoInstruction inst) void Jit64::crXXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) _dbg_assert_msg_(DYNA_REC, inst.OPCD == 19, "Invalid crXXX"); // USES_CR diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h index 34290d4567..30371311a3 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h @@ -32,9 +32,9 @@ // #define INSTRUCTION_START PPCTables::CountInstruction(inst); #define INSTRUCTION_START -#define JITDISABLE(type) \ +#define JITDISABLE(setting) \ if (Core::g_CoreStartupParameter.bJITOff || \ - Core::g_CoreStartupParameter.bJIT##type##Off) \ + Core::g_CoreStartupParameter.setting) \ {Default(inst); return;} #ifdef _M_X64 diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_FloatingPoint.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_FloatingPoint.cpp index 9a0207f85c..6277933e4e 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_FloatingPoint.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_FloatingPoint.cpp @@ -17,7 +17,7 @@ void JitIL::fp_arith_s(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21 && inst.SUBOP5 != 26)) { Default(inst); return; @@ -60,7 +60,7 @@ void JitIL::fp_arith_s(UGeckoInstruction inst) void JitIL::fmaddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc) { Default(inst); return; } @@ -88,7 +88,7 @@ void JitIL::fmaddXX(UGeckoInstruction inst) void JitIL::fmrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) if (inst.Rc) { Default(inst); return; } @@ -100,7 +100,7 @@ void JitIL::fmrx(UGeckoInstruction inst) void JitIL::fcmpx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) IREmitter::InstLoc lhs, rhs, res; lhs = ibuild.EmitLoadFReg(inst.FA); rhs = ibuild.EmitLoadFReg(inst.FB); @@ -113,7 +113,7 @@ void JitIL::fcmpx(UGeckoInstruction inst) void JitIL::fsign(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) Default(inst); return; diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp index 0734bea7e0..4ff8361dab 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp @@ -27,7 +27,7 @@ static void ComputeRC(IREmitter::IRBuilder& ibuild, void JitIL::reg_imm(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int d = inst.RD, a = inst.RA, s = inst.RS; IREmitter::InstLoc val, test, c; switch (inst.OPCD) @@ -95,7 +95,7 @@ void JitIL::reg_imm(UGeckoInstruction inst) void JitIL::cmpXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc lhs, rhs, res; lhs = ibuild.EmitLoadGReg(inst.RA); if (inst.OPCD == 31) { @@ -120,7 +120,7 @@ void JitIL::cmpXX(UGeckoInstruction inst) void JitIL::boolX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc a = NULL; IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS); @@ -173,7 +173,7 @@ void JitIL::boolX(UGeckoInstruction inst) void JitIL::extsbx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitSExt8(val); ibuild.EmitStoreGReg(val, inst.RA); @@ -184,7 +184,7 @@ void JitIL::extsbx(UGeckoInstruction inst) void JitIL::extshx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitSExt16(val); ibuild.EmitStoreGReg(val, inst.RA); @@ -195,7 +195,7 @@ void JitIL::extshx(UGeckoInstruction inst) void JitIL::subfic(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc nota, lhs, val, test; nota = ibuild.EmitXor(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst(-1)); @@ -214,7 +214,7 @@ void JitIL::subfic(UGeckoInstruction inst) void JitIL::subfcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) if (inst.OE) PanicAlert("OE: subfcx"); IREmitter::InstLoc val, test, lhs, rhs; lhs = ibuild.EmitLoadGReg(inst.RB); @@ -231,7 +231,7 @@ void JitIL::subfcx(UGeckoInstruction inst) void JitIL::subfex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) if (inst.OE) PanicAlert("OE: subfex"); IREmitter::InstLoc val, test, lhs, rhs, carry; rhs = ibuild.EmitLoadGReg(inst.RA); @@ -252,7 +252,7 @@ void JitIL::subfex(UGeckoInstruction inst) void JitIL::subfx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) if (inst.OE) PanicAlert("OE: subfx"); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB); val = ibuild.EmitSub(val, ibuild.EmitLoadGReg(inst.RA)); @@ -264,7 +264,7 @@ void JitIL::subfx(UGeckoInstruction inst) void JitIL::mulli(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA); val = ibuild.EmitMul(val, ibuild.EmitIntConst(inst.SIMM_16)); ibuild.EmitStoreGReg(val, inst.RD); @@ -273,7 +273,7 @@ void JitIL::mulli(UGeckoInstruction inst) void JitIL::mullwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB); val = ibuild.EmitMul(ibuild.EmitLoadGReg(inst.RA), val); ibuild.EmitStoreGReg(val, inst.RD); @@ -284,7 +284,7 @@ void JitIL::mullwx(UGeckoInstruction inst) void JitIL::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc a = ibuild.EmitLoadGReg(inst.RA); IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB); @@ -322,7 +322,7 @@ void JitIL::divwux(UGeckoInstruction inst) { void JitIL::addx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB); val = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), val); ibuild.EmitStoreGReg(val, inst.RD); @@ -333,7 +333,7 @@ void JitIL::addx(UGeckoInstruction inst) void JitIL::addzex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc lhs = ibuild.EmitLoadGReg(inst.RA), val, newcarry; val = ibuild.EmitAdd(lhs, ibuild.EmitLoadCarry()); @@ -347,7 +347,7 @@ void JitIL::addzex(UGeckoInstruction inst) void JitIL::addex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc a = ibuild.EmitLoadGReg(inst.RA); IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB); @@ -370,7 +370,7 @@ void JitIL::addex(UGeckoInstruction inst) void JitIL::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) unsigned mask = Helper_Mask(inst.MB, inst.ME); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitRol(val, ibuild.EmitIntConst(inst.SH)); @@ -384,7 +384,7 @@ void JitIL::rlwinmx(UGeckoInstruction inst) void JitIL::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) unsigned mask = Helper_Mask(inst.MB, inst.ME); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitRol(val, ibuild.EmitIntConst(inst.SH)); @@ -400,7 +400,7 @@ void JitIL::rlwimix(UGeckoInstruction inst) void JitIL::rlwnmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) unsigned int mask = Helper_Mask(inst.MB, inst.ME); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitRol(val, ibuild.EmitLoadGReg(inst.RB)); @@ -413,7 +413,7 @@ void JitIL::rlwnmx(UGeckoInstruction inst) void JitIL::negx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA); val = ibuild.EmitSub(ibuild.EmitIntConst(0), val); ibuild.EmitStoreGReg(val, inst.RD); @@ -424,7 +424,7 @@ void JitIL::negx(UGeckoInstruction inst) void JitIL::srwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), samt = ibuild.EmitLoadGReg(inst.RB), corr; @@ -443,7 +443,7 @@ void JitIL::srwx(UGeckoInstruction inst) void JitIL::slwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), samt = ibuild.EmitLoadGReg(inst.RB), corr; @@ -462,7 +462,7 @@ void JitIL::slwx(UGeckoInstruction inst) void JitIL::srawx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) // FIXME: We can do a lot better on 64-bit IREmitter::InstLoc val, samt, mask, mask2, test; val = ibuild.EmitLoadGReg(inst.RS); @@ -488,7 +488,7 @@ void JitIL::srawx(UGeckoInstruction inst) void JitIL::srawix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), test; val = ibuild.EmitSarl(val, ibuild.EmitIntConst(inst.SH)); ibuild.EmitStoreGReg(val, inst.RA); @@ -505,7 +505,7 @@ void JitIL::srawix(UGeckoInstruction inst) void JitIL::cntlzwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitCntlzw(val); ibuild.EmitStoreGReg(val, inst.RA); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp index 70ccb9d509..98b6726227 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStore.cpp @@ -25,7 +25,7 @@ void JitIL::lhax(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB); if (inst.RA) @@ -38,7 +38,7 @@ void JitIL::lhax(UGeckoInstruction inst) void JitIL::lXz(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); if (inst.RA) @@ -58,7 +58,7 @@ void JitIL::lXz(UGeckoInstruction inst) void JitIL::lbzu(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) const IREmitter::InstLoc uAddress = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst((int)inst.SIMM_16)); const IREmitter::InstLoc temp = ibuild.EmitLoad8(uAddress); ibuild.EmitStoreGReg(temp, inst.RD); @@ -68,7 +68,7 @@ void JitIL::lbzu(UGeckoInstruction inst) { void JitIL::lha(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst((s32)(s16)inst.SIMM_16); @@ -82,7 +82,7 @@ void JitIL::lha(UGeckoInstruction inst) void JitIL::lXzx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB); if (inst.RA) { @@ -104,7 +104,7 @@ void JitIL::lXzx(UGeckoInstruction inst) void JitIL::dcbst(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) // If the dcbst instruction is preceded by dcbt, it is flushing a prefetched // memory location. Do not invalidate the JIT cache in this case as the memory @@ -145,7 +145,7 @@ void JitIL::dcbz(UGeckoInstruction inst) void JitIL::stX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), value = ibuild.EmitLoadGReg(inst.RS); @@ -165,7 +165,7 @@ void JitIL::stX(UGeckoInstruction inst) void JitIL::stXx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), value = ibuild.EmitLoadGReg(inst.RS); @@ -185,7 +185,7 @@ void JitIL::stXx(UGeckoInstruction inst) void JitIL::lmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); if (inst.RA) @@ -201,7 +201,7 @@ void JitIL::lmw(UGeckoInstruction inst) void JitIL::stmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); if (inst.RA) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStoreFloating.cpp index 8f8297706c..c2bcc4baa1 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStoreFloating.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStoreFloating.cpp @@ -29,7 +29,7 @@ void JitIL::lfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val; if (inst.RA) @@ -43,7 +43,7 @@ void JitIL::lfs(UGeckoInstruction inst) void JitIL::lfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val; if (inst.RA) @@ -58,7 +58,7 @@ void JitIL::lfd(UGeckoInstruction inst) void JitIL::stfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val = ibuild.EmitLoadFReg(inst.RS); @@ -74,7 +74,7 @@ void JitIL::stfd(UGeckoInstruction inst) void JitIL::stfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val = ibuild.EmitLoadFReg(inst.RS); @@ -91,7 +91,7 @@ void JitIL::stfs(UGeckoInstruction inst) void JitIL::stfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val = ibuild.EmitLoadFReg(inst.RS); @@ -106,7 +106,7 @@ void JitIL::stfsx(UGeckoInstruction inst) void JitIL::lfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) if (js.memcheck) { Default(inst); return; } IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val; if (inst.RA) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStorePaired.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStorePaired.cpp index 1ff392d731..33b81623c1 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStorePaired.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_LoadStorePaired.cpp @@ -23,7 +23,7 @@ void JitIL::psq_st(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStorePaired) + JITDISABLE(bJITLoadStorePairedOff) if (js.memcheck) { Default(inst); return; } if (inst.W) {Default(inst); return;} IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val; @@ -39,7 +39,7 @@ void JitIL::psq_st(UGeckoInstruction inst) void JitIL::psq_l(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStorePaired) + JITDISABLE(bJITLoadStorePairedOff) if (js.memcheck) { Default(inst); return; } if (inst.W) {Default(inst); return;} IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val; diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Paired.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Paired.cpp index 671e022b31..fcbb26a3c2 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Paired.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Paired.cpp @@ -35,7 +35,7 @@ void JitIL::ps_rsqrte(UGeckoInstruction inst) void JitIL::ps_arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc || (inst.SUBOP5 != 21 && inst.SUBOP5 != 20 && inst.SUBOP5 != 25)) { Default(inst); return; } @@ -68,7 +68,7 @@ void JitIL::ps_sum(UGeckoInstruction inst) // TODO: ps_sum breaks Sonic Colours (black screen) Default(inst); return; INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc || inst.SUBOP5 != 10) { Default(inst); return; } @@ -87,7 +87,7 @@ void JitIL::ps_sum(UGeckoInstruction inst) void JitIL::ps_muls(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -112,7 +112,7 @@ void JitIL::ps_muls(UGeckoInstruction inst) void JitIL::ps_mergeXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } @@ -145,7 +145,7 @@ void JitIL::ps_mergeXX(UGeckoInstruction inst) void JitIL::ps_maddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) if (inst.Rc) { Default(inst); return; } diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp index 0fb9d68f81..cb3ab91b32 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp @@ -21,7 +21,7 @@ void JitIL::mtspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); switch(iIndex) { case SPR_TL: @@ -57,7 +57,7 @@ void JitIL::mtspr(UGeckoInstruction inst) void JitIL::mfspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); switch (iIndex) { @@ -102,21 +102,21 @@ void JitIL::mtmsr(UGeckoInstruction inst) void JitIL::mfmsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) ibuild.EmitStoreGReg(ibuild.EmitLoadMSR(), inst.RD); } void JitIL::mftb(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) mfspr(inst); } void JitIL::mfcr(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) IREmitter::InstLoc d = ibuild.EmitIntConst(0); for (int i = 0; i < 8; ++i) @@ -130,7 +130,7 @@ void JitIL::mfcr(UGeckoInstruction inst) void JitIL::mtcrf(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS); for (int i = 0; i < 8; ++i) @@ -148,7 +148,7 @@ void JitIL::mtcrf(UGeckoInstruction inst) void JitIL::mcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) if (inst.CRFS != inst.CRFD) { diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h index 264ec588e3..2f9287c80e 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h +++ b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h @@ -43,9 +43,9 @@ // #define INSTRUCTION_START Default(inst); return; // #define INSTRUCTION_START PPCTables::CountInstruction(inst); #define INSTRUCTION_START -#define JITDISABLE(type) \ +#define JITDISABLE(setting) \ if (Core::g_CoreStartupParameter.bJITOff || \ - Core::g_CoreStartupParameter.bJIT##type##Off) \ + Core::g_CoreStartupParameter.setting) \ {Default(inst); return;} #define PPCSTATE_OFF(elem) ((s32)STRUCT_OFF(PowerPC::ppcState, elem) - (s32)STRUCT_OFF(PowerPC::ppcState, spr[0])) class JitArm : public JitBase, public ArmGen::ARMXCodeBlock diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp index 5a1a4659a6..b1a63aece6 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Branch.cpp @@ -43,7 +43,7 @@ using namespace ArmGen; void JitArm::sc(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) gpr.Flush(); fpr.Flush(); @@ -62,7 +62,7 @@ void JitArm::sc(UGeckoInstruction inst) void JitArm::rfi(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) gpr.Flush(); fpr.Flush(); @@ -110,7 +110,7 @@ void JitArm::rfi(UGeckoInstruction inst) void JitArm::bx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) // We must always process the following sentence // even if the blocks are merged by PPCAnalyst::Flatten(). if (inst.LK) @@ -155,7 +155,7 @@ void JitArm::bx(UGeckoInstruction inst) void JitArm::bcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) // USES_CR _assert_msg_(DYNA_REC, js.isLastInstruction, "bcx not last instruction of block"); @@ -216,7 +216,7 @@ void JitArm::bcx(UGeckoInstruction inst) void JitArm::bcctrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) gpr.Flush(); fpr.Flush(); @@ -283,7 +283,7 @@ void JitArm::bcctrx(UGeckoInstruction inst) void JitArm::bclrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Branch) + JITDISABLE(bJITBranchOff) if (!js.isLastInstruction && (inst.BO & (1 << 4)) && (inst.BO & (1 << 2))) { if (inst.LK) diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_FloatingPoint.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_FloatingPoint.cpp index c553397708..3dcaf902d1 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_FloatingPoint.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_FloatingPoint.cpp @@ -41,7 +41,7 @@ void JitArm::Helper_UpdateCR1(ARMReg value) void JitArm::fabsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vD = fpr.R0(inst.FD); ARMReg vB = fpr.R0(inst.FB); @@ -54,7 +54,7 @@ void JitArm::fabsx(UGeckoInstruction inst) void JitArm::faddsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vA = fpr.R0(inst.FA); ARMReg vB = fpr.R0(inst.FB); @@ -69,7 +69,7 @@ void JitArm::faddsx(UGeckoInstruction inst) void JitArm::faddx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vD = fpr.R0(inst.FD); ARMReg vA = fpr.R0(inst.FA); @@ -82,7 +82,7 @@ void JitArm::faddx(UGeckoInstruction inst) void JitArm::fsubsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vA = fpr.R0(inst.FA); ARMReg vB = fpr.R0(inst.FB); @@ -97,7 +97,7 @@ void JitArm::fsubsx(UGeckoInstruction inst) void JitArm::fsubx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vD = fpr.R0(inst.FD); ARMReg vA = fpr.R0(inst.FA); @@ -110,7 +110,7 @@ void JitArm::fsubx(UGeckoInstruction inst) void JitArm::fmulsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vA = fpr.R0(inst.FA); ARMReg vC = fpr.R0(inst.FC); @@ -125,7 +125,7 @@ void JitArm::fmulsx(UGeckoInstruction inst) void JitArm::fmulx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vD0 = fpr.R0(inst.FD); ARMReg vA = fpr.R0(inst.FA); @@ -137,7 +137,7 @@ void JitArm::fmulx(UGeckoInstruction inst) void JitArm::fmrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(FloatingPoint) + JITDISABLE(bJITFloatingPointOff) ARMReg vD = fpr.R0(inst.FD); ARMReg vB = fpr.R0(inst.FB); diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp index 572ee6aae7..672fd6edfd 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp @@ -129,7 +129,7 @@ u32 Xor(u32 a, u32 b) {return a ^ b;} void JitArm::arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 a = inst.RA, b = inst.RB, d = inst.RD, s = inst.RS; ARMReg RA, RB, RD, RS; @@ -517,7 +517,7 @@ void JitArm::arith(UGeckoInstruction inst) void JitArm::addex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 a = inst.RA, b = inst.RB, d = inst.RD; Default(inst); return; ARMReg RA = gpr.R(a); @@ -534,7 +534,7 @@ void JitArm::addex(UGeckoInstruction inst) void JitArm::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 a = inst.RA, b = inst.RB, d = inst.RD; @@ -549,7 +549,7 @@ void JitArm::mulhwux(UGeckoInstruction inst) void JitArm::extshx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 a = inst.RA, s = inst.RS; if (gpr.IsImm(s)) @@ -569,7 +569,7 @@ void JitArm::extshx(UGeckoInstruction inst) void JitArm::extsbx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 a = inst.RA, s = inst.RS; if (gpr.IsImm(s)) @@ -589,7 +589,7 @@ void JitArm::extsbx(UGeckoInstruction inst) void JitArm::cmp (UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int crf = inst.CRFD; u32 a = inst.RA, b = inst.RB; @@ -609,7 +609,7 @@ void JitArm::cmp (UGeckoInstruction inst) void JitArm::cmpi(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 a = inst.RA; int crf = inst.CRFD; if (gpr.IsImm(a)) @@ -632,7 +632,7 @@ void JitArm::cmpi(UGeckoInstruction inst) void JitArm::cmpl(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) ARMReg RA = gpr.R(inst.RA); ARMReg RB = gpr.R(inst.RB); @@ -654,7 +654,7 @@ void JitArm::cmpl(UGeckoInstruction inst) void JitArm::cmpli(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) ARMReg RA = gpr.R(inst.RA); ARMReg rA = gpr.GetReg(); @@ -684,7 +684,7 @@ void JitArm::cmpli(UGeckoInstruction inst) void JitArm::negx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) ARMReg RA = gpr.R(inst.RA); ARMReg RD = gpr.R(inst.RD); @@ -703,7 +703,7 @@ void JitArm::negx(UGeckoInstruction inst) void JitArm::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 mask = Helper_Mask(inst.MB,inst.ME); ARMReg RA = gpr.R(inst.RA); @@ -731,7 +731,7 @@ void JitArm::rlwimix(UGeckoInstruction inst) void JitArm::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) u32 mask = Helper_Mask(inst.MB,inst.ME); ARMReg RA = gpr.R(inst.RA); @@ -754,7 +754,7 @@ void JitArm::rlwinmx(UGeckoInstruction inst) void JitArm::srawix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Integer) + JITDISABLE(bJITIntegerOff) int a = inst.RA; int s = inst.RS; int amount = inst.SH; diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp index b3f8a3cbb1..391f7b0537 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp @@ -313,7 +313,7 @@ void JitArm::SafeLoadToReg(bool fastmem, u32 dest, s32 addr, s32 offsetReg, int void JitArm::lXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) u32 a = inst.RA, b = inst.RB, d = inst.RD; s32 offset = inst.SIMM_16; u32 accessSize = 0; @@ -477,7 +477,7 @@ void JitArm::lmw(UGeckoInstruction inst) void JitArm::dcbst(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStore) + JITDISABLE(bJITLoadStoreOff) // If the dcbst instruction is preceded by dcbt, it is flushing a prefetched // memory location. Do not invalidate the JIT cache in this case as the memory diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp index 66a0912a18..2559c9f49e 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp @@ -35,7 +35,7 @@ void JitArm::lfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); @@ -78,7 +78,7 @@ void JitArm::lfs(UGeckoInstruction inst) void JitArm::lfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); @@ -120,7 +120,7 @@ void JitArm::lfd(UGeckoInstruction inst) void JitArm::stfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(LoadStoreFloating) + JITDISABLE(bJITLoadStoreFloatingOff) ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Paired.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Paired.cpp index 148e2f086b..e6a084716a 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Paired.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Paired.cpp @@ -30,7 +30,7 @@ void JitArm::ps_add(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) u32 a = inst.FA, b = inst.FB, d = inst.FD; if (inst.Rc){ @@ -52,7 +52,7 @@ void JitArm::ps_add(UGeckoInstruction inst) void JitArm::ps_madd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) Default(inst); return; @@ -89,7 +89,7 @@ void JitArm::ps_madd(UGeckoInstruction inst) void JitArm::ps_sum0(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; @@ -110,7 +110,7 @@ void JitArm::ps_sum0(UGeckoInstruction inst) void JitArm::ps_sub(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) u32 a = inst.FA, b = inst.FB, d = inst.FD; if (inst.Rc){ @@ -131,7 +131,7 @@ void JitArm::ps_sub(UGeckoInstruction inst) void JitArm::ps_mul(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(Paired) + JITDISABLE(bJITPairedOff) u32 a = inst.FA, c = inst.FC, d = inst.FD; if (inst.Rc){ diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp index 0c58b43ff3..e1f27560a3 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp @@ -30,7 +30,7 @@ void JitArm::mtspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); @@ -75,13 +75,13 @@ void JitArm::mtspr(UGeckoInstruction inst) void JitArm::mftb(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) mfspr(inst); } void JitArm::mfspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); ARMReg RD = gpr.R(inst.RD); @@ -102,7 +102,7 @@ void JitArm::mtmsr(UGeckoInstruction inst) { INSTRUCTION_START // Don't interpret this, if we do we get thrown out - //JITDISABLE(SystemRegisters) + //JITDISABLE(bJITSystemRegistersOff) STR(gpr.R(inst.RS), R9, PPCSTATE_OFF(msr)); @@ -114,7 +114,7 @@ void JitArm::mtmsr(UGeckoInstruction inst) void JitArm::mfmsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(SystemRegisters) + JITDISABLE(bJITSystemRegistersOff) LDR(gpr.R(inst.RD), R9, PPCSTATE_OFF(msr)); }