From d05e205a241f7673659f38ff75fcbf7ef6419712 Mon Sep 17 00:00:00 2001
From: Tillmann Karras <tilkax@gmail.com>
Date: Sun, 9 Mar 2014 15:21:50 +0100
Subject: [PATCH] FPURoundMode: revert use of enums in bit-fields

The workaround of using fixed underlying types produces lots of warnings
in GCC because now the bit-fields are too small for the value range used
for conversion semantics.
---
 Source/Core/Common/FPURoundMode.h                 | 15 ++++++++++-----
 Source/Core/Common/GenericFPURoundMode.cpp        |  6 +++---
 Source/Core/Common/x64FPURoundMode.cpp            |  6 +++---
 Source/Core/Core/PowerPC/Gekko.h                  |  3 +--
 .../Interpreter/Interpreter_SystemRegisters.cpp   |  2 +-
 5 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/Source/Core/Common/FPURoundMode.h b/Source/Core/Common/FPURoundMode.h
index 7971c009f9..aa64dac23e 100644
--- a/Source/Core/Common/FPURoundMode.h
+++ b/Source/Core/Common/FPURoundMode.h
@@ -8,24 +8,29 @@
 
 namespace FPURoundMode
 {
-	enum RoundModes : u32
+	// TODO: MSVC currently produces broken code:
+	// https://connect.microsoft.com/VisualStudio/feedback/details/828892/vc-2013-miscompilation-with-enums-and-bit-fields
+	// Once that is fixed, change types in SetRoundMode(), SetSIMDMode(), and in UReg_FPSCR to 'RoundMode'.
+
+	enum RoundMode
 	{
 		ROUND_NEAR = 0,
 		ROUND_CHOP = 1,
 		ROUND_UP   = 2,
 		ROUND_DOWN = 3
 	};
-	enum PrecisionModes : u32
+	enum PrecisionMode
 	{
 		PREC_24 = 0,
 		PREC_53 = 1,
 		PREC_64 = 2
 	};
-	void SetRoundMode(RoundModes mode);
 
-	void SetPrecisionMode(PrecisionModes mode);
+	void SetRoundMode(int mode);
 
-	void SetSIMDMode(RoundModes rounding_mode, bool non_ieee_mode);
+	void SetPrecisionMode(PrecisionMode mode);
+
+	void SetSIMDMode(int rounding_mode, bool non_ieee_mode);
 
 /*
  * There are two different flavors of float to int conversion:
diff --git a/Source/Core/Common/GenericFPURoundMode.cpp b/Source/Core/Common/GenericFPURoundMode.cpp
index 61343514a5..a1a9e6acd2 100644
--- a/Source/Core/Common/GenericFPURoundMode.cpp
+++ b/Source/Core/Common/GenericFPURoundMode.cpp
@@ -21,13 +21,13 @@
 // Generic, do nothing
 namespace FPURoundMode
 {
-	void SetRoundMode(RoundModes mode)
+	void SetRoundMode(int mode)
 	{
 	}
-	void SetPrecisionMode(PrecisionModes mode)
+	void SetPrecisionMode(PrecisionMode mode)
 	{
 	}
-	void SetSIMDMode(RoundModes rounding_mode, bool non_ieee_mode)
+	void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
 	{
 	}
 	void SaveSIMDState()
diff --git a/Source/Core/Common/x64FPURoundMode.cpp b/Source/Core/Common/x64FPURoundMode.cpp
index b3dc669523..5d5261346e 100644
--- a/Source/Core/Common/x64FPURoundMode.cpp
+++ b/Source/Core/Common/x64FPURoundMode.cpp
@@ -18,7 +18,7 @@ namespace FPURoundMode
 	static u32 saved_sse_state = _mm_getcsr();
 	static const u32 default_sse_state = _mm_getcsr();
 
-	void SetRoundMode(RoundModes mode)
+	void SetRoundMode(int mode)
 	{
 		// Set FPU rounding mode to mimic the PowerPC's
 		#ifdef _M_X86_32
@@ -49,7 +49,7 @@ namespace FPURoundMode
 		#endif
 	}
 
-	void SetPrecisionMode(PrecisionModes mode)
+	void SetPrecisionMode(PrecisionMode mode)
 	{
 		#ifdef _M_X86_32
 			// sets the floating-point lib to 53-bit
@@ -75,7 +75,7 @@ namespace FPURoundMode
 		#endif
 	}
 
-	void SetSIMDMode(RoundModes rounding_mode, bool non_ieee_mode)
+	void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
 	{
 		// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
 		const u32 EXCEPTION_MASK = 0x1F80;
diff --git a/Source/Core/Core/PowerPC/Gekko.h b/Source/Core/Core/PowerPC/Gekko.h
index 7855cee809..4141d074c7 100644
--- a/Source/Core/Core/PowerPC/Gekko.h
+++ b/Source/Core/Core/PowerPC/Gekko.h
@@ -8,7 +8,6 @@
 #pragma once
 
 #include "Common/Common.h"
-#include "Common/FPURoundMode.h"
 
 // --- Gekko Instruction ---
 
@@ -390,7 +389,7 @@ union UReg_FPSCR
 	struct
 	{
 		// Rounding mode (towards: nearest, zero, +inf, -inf)
-		FPURoundMode::RoundModes RN : 2;
+		u32 RN      : 2;
 		// Non-IEEE mode enable (aka flush-to-zero)
 		u32 NI      : 1;
 		// Inexact exception enable
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
index db278e262f..9b8cf91a1b 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
@@ -49,7 +49,7 @@ static void FPSCRtoFPUSettings(UReg_FPSCR fp)
 	}
 
 	// Set SSE rounding mode and denormal handling
-	FPURoundMode::SetSIMDMode(FPSCR.RN, FPSCR.NI);
+	FPURoundMode::SetSIMDMode(fp.RN, fp.NI);
 }
 
 void Interpreter::mtfsb0x(UGeckoInstruction _inst)