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[ARM32] Removes conditional execution from ARMv7's Jit function.

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This commit is contained in:
Ryan Houdek 2014-11-29 02:11:25 +00:00
parent c2e5715034
commit e358696d46
1 changed files with 4 additions and 4 deletions
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8
Source/Core/Core/PowerPC/JitArm32/Jit.cpp
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@ -385,13 +385,13 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo
// Downcount flag check, Only valid for linked blocks // Downcount flag check, Only valid for linked blocks
{ {
SetCC(CC_MI); FixupBranch no_downcount = B_CC(CC_PL);
ARMReg rA = gpr.GetReg(false); ARMReg rA = gpr.GetReg(false);
MOVI2R(rA, js.blockStart); MOVI2R(rA, js.blockStart);
STR(rA, R9, PPCSTATE_OFF(pc)); STR(rA, R9, PPCSTATE_OFF(pc));
MOVI2R(rA, (u32)asm_routines.doTiming); MOVI2R(rA, (u32)asm_routines.doTiming);
B(rA); B(rA);
SetCC(); SetJumpTarget(no_downcount);
} }
const u8 *normalEntry = GetCodePtr(); const u8 *normalEntry = GetCodePtr();
@ -409,7 +409,7 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo
MOVI2R(C, js.blockStart); // R3 MOVI2R(C, js.blockStart); // R3
LDR(A, R9, PPCSTATE_OFF(msr)); LDR(A, R9, PPCSTATE_OFF(msr));
TST(A, Shift); TST(A, Shift);
SetCC(CC_EQ); FixupBranch no_fpe = B_CC(CC_NEQ);
STR(C, R9, PPCSTATE_OFF(pc)); STR(C, R9, PPCSTATE_OFF(pc));
LDR(A, R9, PPCSTATE_OFF(Exceptions)); LDR(A, R9, PPCSTATE_OFF(Exceptions));
@ -422,7 +422,7 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo
MOVI2R(A, (u32)asm_routines.dispatcher); MOVI2R(A, (u32)asm_routines.dispatcher);
B(A); B(A);
SetCC(); SetJumpTarget(no_fpe);
gpr.Unlock(A, C); gpr.Unlock(A, C);
} }