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https://github.com/dolphin-emu/dolphin.git
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zelda disasm: minor commenting/formatting
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3518 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
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aecaf271f1
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@ -1,7 +1,7 @@
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/* ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/* ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/* ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/* ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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All code is now wrapped in void Function() {} - the upcoming new DSP LLE debugger
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All code is now wrapped in void Function() {} - the new DSP LLE debugger
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can parse this file and auto read symbols using those.
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can parse this file and auto read symbols using those.
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BIG Questions:
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BIG Questions:
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@ -10,6 +10,9 @@ BIG Questions:
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- What does 00eb_Unk_BufferMultWithDest??
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- What does 00eb_Unk_BufferMultWithDest??
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- Why is a PB-Transfer from RAM to DMEM 0xC0 shorts long but DMEM to RAM just 0x80
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- Why is a PB-Transfer from RAM to DMEM 0xC0 shorts long but DMEM to RAM just 0x80
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DSP functionality to test:
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- CR
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- Interrupts (7)
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// */
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// */
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//
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//
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@ -171,8 +174,8 @@ There's definitely a bunch of sample data stored in each PB but I don't know exa
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// reset vector
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// reset vector
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void 0012_ResetVector()
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void 0012_ResetVector()
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{
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{
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// 0012 1205 sbclr #0x05
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// 0012 1205 sbclr #0x05
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// 0013 02bf 0057 call 0x0057
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// 0013 02bf 0057 call 0x0057
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@ -515,7 +518,7 @@ void 00eb_Unk_BufferMultWithDest(_Src=($AR0), _Dest($AR3), _size($AC1.M), _facto
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// Clears the 0d00 and 0d60 buffers, plus a lot of other intermediate buffers.
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// Clears the 0d00 and 0d60 buffers, plus a lot of other intermediate buffers.
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// Also does some other things.
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// Also does some other things.
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void 0102_PrepareFrameBuffers()
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void 0102_PrepareFrameBuffers()
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{
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{
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// 0102 8100 clr $ACC0
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// 0102 8100 clr $ACC0
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// 0103 8900 clr $ACC1
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// 0103 8900 clr $ACC1
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@ -833,7 +836,7 @@ void 022a_Copy_XXX_From_RAM_To_0x03a8()
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// 0232 02df ret
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// 0232 02df ret
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}
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}
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void 0233_Increase_32BitAddress_InMem(_MemAddr(AR0), _Bytes(AX0.L))
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void 0233_Increase_32BitAddress_InMem(_MemAddr(AR0), _Bytes(AX0.L))
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{
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{
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@ -1465,7 +1468,9 @@ void 041d_Unk() {
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0472 193c lrri $AC0.L, @$AR1
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0472 193c lrri $AC0.L, @$AR1
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0473 009f 0400 lri $AC1.M, #0x0400
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0473 009f 0400 lri $AC1.M, #0x0400
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0475 00c0 0345 lr $AR0, @0x0345
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0475 00c0 0345 lr $AR0, @0x0345
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0477 02bf 0555 call 0x0555
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// 0477 02bf 0555 call 0x0555 // ReadFromMysteryReg
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0555_UnknownReadFromMysteryReg(ARAMAddress(ACC0), DestBuffer(AC1.M), Length(AC0.M)) {
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0479 0081 0348 lri $AR1, #0x0348
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0479 0081 0348 lri $AR1, #0x0348
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047b 193e lrri $AC0.M, @$AR1
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047b 193e lrri $AC0.M, @$AR1
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047c 193c lrri $AC0.L, @$AR1
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047c 193c lrri $AC0.L, @$AR1
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@ -1532,7 +1537,9 @@ void 04c0_UnknownInit()
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void 04d0_Unk() {
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void 04d0_Unk() {
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04d0 02bf 04e1 call 0x04e1
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// 04d0 02bf 04e1 call 0x04e1
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04e1_Read0x40WordsFromZeroTo0b00()
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// 04fb is incremented when you reset a voice
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// 04fb is incremented when you reset a voice
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04d2 00df 04fb lr $AC1.M, @0x04fb
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04d2 00df 04fb lr $AC1.M, @0x04fb
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04d4 009e 0b00 lri $AC0.M, #0x0b00
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04d4 009e 0b00 lri $AC0.M, #0x0b00
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@ -1550,16 +1557,15 @@ void 04d0_Unk() {
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04e0 02df ret
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04e0 02df ret
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}
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}
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void 04e1_Strange() {
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void 04e1_Read0x40WordsFromZeroTo0b00() {
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04e1 0092 00ff lri $CR, #0x00ff
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04e1 0092 00ff lri $CR, #0x00ff
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04e3 8100 clr $ACC0
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04e3 8100 clr $ACC0
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04e4 009f 0b00 lri $AC1.M, #0x0b00
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04e4 009f 0b00 lri $AC1.M, #0x0b00
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04e6 0080 0040 lri $AR0, #0x0040
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04e6 0080 0040 lri $AR0, #0x0040
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04e8 029f 0555 jmp 0x0555
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// 04e8 029f 0555 jmp 0x0555
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GOTO 0555_UnknownReadFromMysteryReg
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GOTO 0555_UnknownReadFromMysteryReg(ARAMAddress(ACC0), DestBuffer(AC1.M), Length(AR0)) {
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}
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}
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void 04ea_Call0573With0b00And0050() {
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void 04ea_Call0573With0b00And0050() {
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04ea 8100 clr $ACC0
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04ea 8100 clr $ACC0
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04eb 009f 0b00 lri $AC1.M, #0x0b00
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04eb 009f 0b00 lri $AC1.M, #0x0b00
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@ -1570,9 +1576,9 @@ void 04ea_Call0573With0b00And0050() {
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}
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}
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void 04f1_strange() {
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void 04f1_Read0x40WordsFromZeroTo0b00() {
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04f1 02bf 04e1 call 0x04e1
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// 04f1 02bf 04e1 call 0x04e1
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04e1_Strange();
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04e1_Read0x40WordsFromZeroTo0b00();
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}
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}
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void 04f3_strange() {
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void 04f3_strange() {
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@ -1679,7 +1685,7 @@ void 0536_WaitForDMATransfer()
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}
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}
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// Can't find any calls to this one.
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// Can't find any calls to this one.
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void 053c_Unk() {
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void 053c_Unk_Unused() {
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053c 193e lrri $AC0.M, @$AR1
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053c 193e lrri $AC0.M, @$AR1
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053d 193c lrri $AC0.L, @$AR1
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053d 193c lrri $AC0.L, @$AR1
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053e 00ff ffcd sr @DSPA, $AC1.M
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053e 00ff ffcd sr @DSPA, $AC1.M
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@ -1706,9 +1712,9 @@ void 0553_UnknownReadFromMysteryReg_Unused() {
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// continues...
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// continues...
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void 0555_UnknownReadFromMysteryReg(ARAMAddress(ACC0), DestBuffer(AC1.M), Length(AC0.M)) {
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void 0555_UnknownReadFromMysteryReg(ARAMAddress(ACC0), DestBuffer(AC1.M), Length(AC0.M)) {
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// 0555 0240 7fff andi $AC0.M, #0x7fff // Don't know the purpose of this and
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// 0555 0240 7fff andi $AC0.M, #0x7fff
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// 0557 02bf 0561 call 0x0561
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// 0557 02bf 0561 call 0x0561
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0561_SetupAcceleratorForMysteryRead(ACC0, AR0, AC1.M);
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0561_SetupAcceleratorForMysteryAccess(ACC0 & 0x7FFFFFFF, AR0, AC1.M);
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// After that, length is now in AX0.H
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// After that, length is now in AX0.H
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// 0559 007a 055f bloop $AX0.H, 0x055f
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// 0559 007a 055f bloop $AX0.H, 0x055f
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@ -1723,7 +1729,7 @@ void 0555_UnknownReadFromMysteryReg(ARAMAddress(ACC0), DestBuffer(AC1.M), Length
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// 0560 02df ret
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// 0560 02df ret
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}
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}
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void 0561_SetupAcceleratorForMysteryRead(ARAMAddress(ACC0), DestBuffer(AC1.M), Length(AR0)) {
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void 0561_SetupAcceleratorForMysteryAccess(ARAMAddress(ACC0), DestBuffer(AC1.M), Length(AR0)) {
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0561 1c3f mrr $AR1, $AC1.M
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0561 1c3f mrr $AR1, $AC1.M
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0562 0f0a lris $AC1.M, #0x0a
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0562 0f0a lris $AC1.M, #0x0a
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0563 2fd1 srs @SampleFormat, $AC1.M
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0563 2fd1 srs @SampleFormat, $AC1.M
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@ -1748,9 +1754,10 @@ void 0571_Mystery_Write_FirstLoadTwoRegs_Unused() {
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0571 193e lrri $AC0.M, @$AR1
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0571 193e lrri $AC0.M, @$AR1
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0572 193c lrri $AC0.L, @$AR1
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0572 193c lrri $AC0.L, @$AR1
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void 0573_Mystery_Write(InBuffer($AR1), _COUNT(AX0.H)) {
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void 0573_Mystery_Write(InBuffer($AR1), SourceBuffer(AC1.M), _COUNT(AX0.H)) {
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0573 0090 0001 lri $AC0.H, #0x0001
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0573 0090 0001 lri $AC0.H, #0x0001
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0575 02bf 0561 call 0x0561
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// 0575 02bf 0561 call 0x0561
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0561_SetupAcceleratorForMysteryAccess(ACC0, AR0, AC1.M);
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0577 007a 057e bloop $AX0.H, 0x057e
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0577 007a 057e bloop $AX0.H, 0x057e
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0579 193e lrri $AC0.M, @$AR1
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0579 193e lrri $AC0.M, @$AR1
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057a 2ed3 srs @Unk Zelda, $AC0.M
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057a 2ed3 srs @Unk Zelda, $AC0.M
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@ -1762,7 +1769,7 @@ void 0573_Mystery_Write(InBuffer($AR1), _COUNT(AX0.H)) {
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}
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}
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void 0095_COMMAND_04()
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void 0095_COMMAND_04()
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{
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{
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// commando looks buggy...
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// commando looks buggy...
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// it copies data to the switch casement data address... sounds like BS
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// it copies data to the switch casement data address... sounds like BS
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@ -1795,7 +1802,7 @@ void 0573_Mystery_Write(InBuffer($AR1), _COUNT(AX0.H)) {
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}
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}
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void 05A4_ResetAccelerator()
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void 05A4_ResetAccelerator()
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{
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{
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05a4 0092 00ff lri $CR, #0x00ff
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05a4 0092 00ff lri $CR, #0x00ff
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05a6 009e ffff lri $AC0.M, #0xffff
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05a6 009e ffff lri $AC0.M, #0xffff
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@ -1807,7 +1814,7 @@ void 0573_Mystery_Write(InBuffer($AR1), _COUNT(AX0.H)) {
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}
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}
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void 05ad_SetupAccelerator(_accleratorH(AC0.M), _accleratorL(AC0.L), _format(AC1.M))
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void 05ad_SetupAccelerator(_accleratorH(AC0.M), _accleratorL(AC0.L), _format(AC1.M))
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{
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{
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05ad 00ff ffd1 sr @SampleFormat, $AC1.M
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05ad 00ff ffd1 sr @SampleFormat, $AC1.M
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05af 0340 0003 andi $AC1.M, #0x0003
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05af 0340 0003 andi $AC1.M, #0x0003
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@ -1818,7 +1825,7 @@ void 0573_Mystery_Write(InBuffer($AR1), _COUNT(AX0.H)) {
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05b7 02df ret
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05b7 02df ret
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}
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}
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void 05b8_NewMail()
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void 05b8_NewMail()
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{
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{
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# 05b8 1205 sbclr #0x05
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# 05b8 1205 sbclr #0x05
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# 05b9 8e00 set16
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# 05b9 8e00 set16
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@ -1912,7 +1919,7 @@ EndOfMailException:
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05ef 02ff rti
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05ef 02ff rti
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}
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}
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void 05f0_HaltUCode()
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void 05f0_HaltUCode()
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{
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{
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05f0 009a 0002 lri $AX0.H, #0x0002
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05f0 009a 0002 lri $AX0.H, #0x0002
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05f2 00fa 03a3 sr @0x03a3, $AX0.H
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05f2 00fa 03a3 sr @0x03a3, $AX0.H
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@ -2052,7 +2059,7 @@ void 065e_WaitForCPUMailBox_AC0()
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0667 029c 0664 jlnz 0x0664
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0667 029c 0664 jlnz 0x0664
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0669 02df ret
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0669 02df ret
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void SendMB_DCD1(_low)
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void SendMB_DCD1(_low)
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{
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{
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// 066a 02bf 0682 call 0x0682
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// 066a 02bf 0682 call 0x0682
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WaitForEmptyDSPMailBox_ovAC1();
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WaitForEmptyDSPMailBox_ovAC1();
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@ -2096,7 +2103,7 @@ void SendMB_F355(_low)
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0681 02df ret
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0681 02df ret
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void WaitForEmptyDSPMailBox_ovAC1.M()
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void WaitForEmptyDSPMailBox_ovAC1.M()
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{
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{
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// 0682 27fc lrs $AC1.M, @DMBH
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// 0682 27fc lrs $AC1.M, @DMBH
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// 0683 03c0 8000 andcf $AC1.M, #0x8000
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// 0683 03c0 8000 andcf $AC1.M, #0x8000
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@ -2173,7 +2180,7 @@ void 0688_InitCommandBlock()
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}
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}
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void 06c5_CopyCommandBlock()
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void 06c5_CopyCommandBlock()
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{
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{
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// 06c5 00c0 0351 lr $AR0, @0x0351
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// 06c5 00c0 0351 lr $AR0, @0x0351
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short srcCommandQueueAddr = *0x0351
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short srcCommandQueueAddr = *0x0351
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@ -2278,7 +2285,7 @@ void 0688_InitCommandBlock()
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}
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}
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void 06f9_Unk_PrepareSampleDecode()
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void 06f9_Unk_PrepareSampleDecode()
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{
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{
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06f9 8100 clr $ACC0
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06f9 8100 clr $ACC0
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06fa 0e10 lris $AC0.M, #0x10
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06fa 0e10 lris $AC0.M, #0x10
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@ -2315,7 +2322,7 @@ void 0688_InitCommandBlock()
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}
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}
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// Here, CR is 0x04 and thus these are not hw regs.
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// Here, CR is 0x04 and thus these are not hw regs.
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void 0717_InitializeDecoderState() // 0xff88 to 0xff8B
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void 0717_InitializeDecoderState() // 0xff88 to 0xff8B
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{
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{
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// 0717 00de 04fb lr $AC0.M, @0x04fb
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// 0717 00de 04fb lr $AC0.M, @0x04fb
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// 0719 7400 incm $AC0.M
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// 0719 7400 incm $AC0.M
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@ -2528,8 +2535,6 @@ void 073d_DECODE_0x05_0x09(_dest($AR3), _numberOfSamples($AC1.M), _len(AX1)) /
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07c0 2380 lrs $AX1.H, @0xff80
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07c0 2380 lrs $AX1.H, @0xff80
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07c1 2688 lrs $AC0.M, @0xff88
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07c1 2688 lrs $AC0.M, @0xff88
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07c2 2489 lrs $AC0.L, @0xff89
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07c2 2489 lrs $AC0.L, @0xff89
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@ -2579,175 +2584,169 @@ void 073d_DECODE_0x05_0x09(_dest($AR3), _numberOfSamples($AC1.M), _len(AX1)) /
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return
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return
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}
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}
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}
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}
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void 07eb_AFCDecoder(_numberOfSample(AC0.M))
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void 07eb_AFCDecoder(_numberOfSample(AC0.M))
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{
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{
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// 07eb 00ff 0360 sr @0x0360, $AC1.M
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// 07eb 00ff 0360 sr @0x0360, $AC1.M
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// 07ed 00fe 0361 sr @0x0361, $AC0.M
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// 07ed 00fe 0361 sr @0x0361, $AC0.M
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// 07ef 2638 lrs $AC0.M, @0x0038
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// 07ef 2638 lrs $AC0.M, @0x0038
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// 07f0 2439 lrs $AC0.L, @0x0039
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// 07f0 2439 lrs $AC0.L, @0x0039
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// 07f1 0f05 lris $AC1.M, #0x05
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// 07f1 0f05 lris $AC1.M, #0x05
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// 07f2 02bf 05ad call 0x05ad
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// 07f2 02bf 05ad call 0x05ad
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05ad_SetupAccelerator(AC0.M, AC0.L, AC1.M)
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05ad_SetupAccelerator(AC0.M, AC0.L, AC1.M)
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// 07f4 2638 lrs $AC0.M, @0x0038
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// 07f4 2638 lrs $AC0.M, @0x0038
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// 07f5 2439 lrs $AC0.L, @0x0039
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// 07f5 2439 lrs $AC0.L, @0x0039
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// 07f6 8900 clr $ACC1
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// 07f6 8900 clr $ACC1
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// 07f7 00df 0361 lr $AC1.M, @0x0361
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// 07f7 00df 0361 lr $AC1.M, @0x0361
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// 07f9 2280 lrs $AX0.H, @0xff80
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// 07f9 2280 lrs $AX0.H, @0xff80
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// 07fa d000 mulc $AC1.M, $AX0.H
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||||||
// 07fa d000 mulc $AC1.M, $AX0.H
|
// 07fb 6f00 movp $ACC1
|
||||||
// 07fb 6f00 movp $ACC1
|
// 07fc 4c00 add $ACC0, $AC1.L
|
||||||
// 07fc 4c00 add $ACC0, $AC1.L
|
// 07fd 2e38 srs @0x0038, $AC0.M
|
||||||
// 07fd 2e38 srs @0x0038, $AC0.M
|
// 07fe 2c39 srs @0x0039, $AC0.L
|
||||||
// 07fe 2c39 srs @0x0039, $AC0.L
|
//inrease sample offset in ARAM
|
||||||
//inrease sample offset in ARAM
|
AC0 = (*0x0038 << 16) | *0x0039
|
||||||
AC0 = (*0x0038 << 16) | *0x0039
|
AC1 = _numberOfSample * *0x0480 // bytes per sample
|
||||||
AC1 = _numberOfSample * *0x0480 // bytes per sample
|
*0x0038 = AC0.M
|
||||||
*0x0038 = AC0.M
|
*0x0039 = AC0.L
|
||||||
*0x0039 = AC0.L
|
|
||||||
|
|
||||||
|
// 07ff 8100 clr $ACC0
|
||||||
// 07ff 8100 clr $ACC0
|
// 0800 00de 0361 lr $AC0.M, @0x0361
|
||||||
// 0800 00de 0361 lr $AC0.M, @0x0361
|
//0802 007e 086b bloop $AC0.M, 0x086b
|
||||||
//0802 007e 086b bloop $AC0.M, 0x086b
|
for (int i = 0; i < _numberOfSample; i++)
|
||||||
for (int i=0; i<_numberOfSample; i++)
|
{
|
||||||
{
|
// Look for the lrrn below to find the ARAM reads.
|
||||||
0804 0080 ffd3 lri $AR0, #0xffd3
|
|
||||||
0806 0084 0000 lri $IX0, #0x0000
|
// FFD3 seems to be some interface to do plain single byte reads
|
||||||
0808 199e lrrn $AC0.M, @$AR0
|
// from ARAM with no ADPCM fanciness or similar.
|
||||||
0809 8900 clr $ACC1
|
|
||||||
080a 1ffe mrr $AC1.M, $AC0.M
|
// It loads through AR0 loaded with immediate #ffd3, not through
|
||||||
080b 1401 lsl $ACC0, #1
|
// lrs, so CR doesn't affect the effective address.
|
||||||
080c 0240 001e andi $AC0.M, #0x001e
|
|
||||||
080e 0200 0300 addi $AC0.M, #0x0300 // AFC COEF Table
|
0804 0080 ffd3 lri $AR0, #0xffd3
|
||||||
0810 1c3e mrr $AR1, $AC0.M
|
0806 0084 0000 lri $IX0, #0x0000
|
||||||
0811 157c lsr $ACC1, #-4
|
0808 199e lrrn $AC0.M, @$AR0
|
||||||
0812 0340 000f andi $AC1.M, #0x000f
|
0809 8900 clr $ACC1
|
||||||
0814 0a11 lris $AX0.H, #0x11
|
080a 1ffe mrr $AC1.M, $AC0.M
|
||||||
0815 5500 subr $ACC1, $AX0.H
|
080b 1401 lsl $ACC0, #1
|
||||||
|
080c 0240 001e andi $AC0.M, #0x001e
|
||||||
|
080e 0200 0300 addi $AC0.M, #0x0300 // AFC COEF Table
|
||||||
// 0816 8100 clr $ACC0
|
0810 1c3e mrr $AR1, $AC0.M
|
||||||
// 0817 2680 lrs $AC0.M, @0xff80
|
0811 157c lsr $ACC1, #-4
|
||||||
// 0818 0605 cmpis $ACC0, #0x05
|
0812 0340 000f andi $AC1.M, #0x000f
|
||||||
// 0819 0295 0832 jz 0x0832
|
0814 0a11 lris $AX0.H, #0x11
|
||||||
if (*0x480 == 0x09)
|
0815 5500 subr $ACC1, $AX0.H
|
||||||
{
|
|
||||||
081b 009a 00f0 lri $AX0.H, #0x00f0
|
// 0816 8100 clr $ACC0
|
||||||
081d 0b0f lris $AX1.H, #0x0f
|
// 0817 2680 lrs $AC0.M, @0xff80
|
||||||
081e 0082 0364 lri $AR2, #0x0364
|
// 0818 0605 cmpis $ACC0, #0x05
|
||||||
0820 1998 lrrn $AX0.L, @$AR0
|
// 0819 0295 0832 jz 0x0832
|
||||||
0821 6000 movr $ACC0, $AX0.L
|
if (*0x480 != 0x5) // ( == 0x09)
|
||||||
|
|
||||||
// Unpack the nibbles
|
|
||||||
0822 1107 0829 bloopi #0x07, 0x0829
|
|
||||||
for (int j=0; j<7; j++)
|
|
||||||
{
|
|
||||||
0824 3400 andr $AC0.M, $AX0.H
|
|
||||||
0825 1408 lsl $ACC0, #8
|
|
||||||
0826 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
|
||||||
0827 3644 andr'ln $AC0.M, $AX1.H : $AX0.L, @$AR0
|
|
||||||
0828 140c lsl $ACC0, #12
|
|
||||||
0829 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
|
||||||
}
|
|
||||||
082a 3400 andr $AC0.M, $AX0.H
|
|
||||||
082b 1408 lsl $ACC0, #8
|
|
||||||
082c 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
|
||||||
082d 3600 andr $AC0.M, $AX1.H
|
|
||||||
082e 140c lsl $ACC0, #12
|
|
||||||
082f 1b5e srri @$AR2, $AC0.M
|
|
||||||
0830 029f 0852 jmp 0x0852
|
|
||||||
}
|
|
||||||
else // (*0x480 == 5?)
|
|
||||||
{
|
{
|
||||||
0832 009a c000 lri $AX0.H, #0xc000
|
081b 009a 00f0 lri $AX0.H, #0x00f0
|
||||||
0834 0082 0364 lri $AR2, #0x0364
|
081d 0b0f lris $AX1.H, #0x0f
|
||||||
0836 1998 lrrn $AX0.L, @$AR0
|
081e 0082 0364 lri $AR2, #0x0364
|
||||||
0837 6000 movr $ACC0, $AX0.L
|
0820 1998 lrrn $AX0.L, @$AR0
|
||||||
|
0821 6000 movr $ACC0, $AX0.L
|
||||||
// Unpack half nibbles (half quality, ~half space)
|
|
||||||
//0838 1103 0845 bloopi #0x03, 0x0845
|
// Unpack 14 of the nibbles..
|
||||||
for (j=0; j<3; j++)
|
0822 1107 0829 bloopi #0x07, 0x0829
|
||||||
{
|
for (int j=0; j<7; j++)
|
||||||
083a 1408 lsl $ACC0, #8
|
{
|
||||||
083b 3400 andr $AC0.M, $AX0.H
|
0824 3400 andr $AC0.M, $AX0.H
|
||||||
083c 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
0825 1408 lsl $ACC0, #8
|
||||||
083d 140a lsl $ACC0, #10
|
0826 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
083e 3400 andr $AC0.M, $AX0.H
|
|
||||||
083f 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
0827 3644 andr'ln $AC0.M, $AX1.H : $AX0.L, @$AR0
|
||||||
0840 140c lsl $ACC0, #12
|
0828 140c lsl $ACC0, #12
|
||||||
0841 3400 andr $AC0.M, $AX0.H
|
0829 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
0842 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
}
|
||||||
0843 140e lsl $ACC0, #14
|
// Then do the last two ..
|
||||||
0844 3444 andr'ln $AC0.M, $AX0.H : $AX0.L, @$AR0
|
082a 3400 andr $AC0.M, $AX0.H
|
||||||
0845 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
082b 1408 lsl $ACC0, #8
|
||||||
}
|
082c 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
082d 3600 andr $AC0.M, $AX1.H
|
||||||
0846 1408 lsl $ACC0, #8
|
082e 140c lsl $ACC0, #12
|
||||||
0847 3400 andr $AC0.M, $AX0.H
|
082f 1b5e srri @$AR2, $AC0.M
|
||||||
0848 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
|
||||||
0849 140a lsl $ACC0, #10
|
0830 029f 0852 jmp 0x0852
|
||||||
084a 3400 andr $AC0.M, $AX0.H
|
}
|
||||||
084b 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
else // (*0x480 == 5)
|
||||||
084c 140c lsl $ACC0, #12
|
{
|
||||||
084d 3400 andr $AC0.M, $AX0.H
|
0832 009a c000 lri $AX0.H, #0xc000
|
||||||
084e 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
0834 0082 0364 lri $AR2, #0x0364
|
||||||
084f 140e lsl $ACC0, #14
|
0836 1998 lrrn $AX0.L, @$AR0
|
||||||
0850 3400 andr $AC0.M, $AX0.H
|
0837 6000 movr $ACC0, $AX0.L
|
||||||
0851 1b5e srri @$AR2, $AC0.M
|
|
||||||
|
// Unpack half nibbles (half quality, ~half space)
|
||||||
|
//0838 1103 0845 bloopi #0x03, 0x0845
|
||||||
|
for (j=0; j<3; j++)
|
||||||
|
{
|
||||||
|
083a 1408 lsl $ACC0, #8
|
||||||
|
083b 3400 andr $AC0.M, $AX0.H
|
||||||
|
083c 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
083d 140a lsl $ACC0, #10
|
||||||
|
083e 3400 andr $AC0.M, $AX0.H
|
||||||
|
083f 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
0840 140c lsl $ACC0, #12
|
||||||
|
0841 3400 andr $AC0.M, $AX0.H
|
||||||
|
0842 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
0843 140e lsl $ACC0, #14
|
||||||
|
0844 3444 andr'ln $AC0.M, $AX0.H : $AX0.L, @$AR0
|
||||||
|
0845 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
}
|
||||||
|
|
||||||
|
0846 1408 lsl $ACC0, #8
|
||||||
|
0847 3400 andr $AC0.M, $AX0.H
|
||||||
|
0848 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
0849 140a lsl $ACC0, #10
|
||||||
|
084a 3400 andr $AC0.M, $AX0.H
|
||||||
|
084b 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
084c 140c lsl $ACC0, #12
|
||||||
|
084d 3400 andr $AC0.M, $AX0.H
|
||||||
|
084e 6032 movr's $ACC0, $AX0.L : @$AR2, $AC0.M
|
||||||
|
084f 140e lsl $ACC0, #14
|
||||||
|
0850 3400 andr $AC0.M, $AX0.H
|
||||||
|
0851 1b5e srri @$AR2, $AC0.M
|
||||||
}
|
}
|
||||||
|
|
||||||
0852 8f00 set40
|
0852 8f00 set40
|
||||||
0853 1f7f mrr $AX1.H, $AC1.M
|
0853 1f7f mrr $AX1.H, $AC1.M
|
||||||
0854 2066 lrs $AX0.L, @0x0066
|
0854 2066 lrs $AX0.L, @0x0066
|
||||||
0855 2767 lrs $AC1.M, @0x0067
|
0855 2767 lrs $AC1.M, @0x0067
|
||||||
0856 193a lrri $AX0.H, @$AR1
|
0856 193a lrri $AX0.H, @$AR1
|
||||||
0857 1939 lrri $AX1.L, @$AR1
|
0857 1939 lrri $AX1.L, @$AR1
|
||||||
0858 0080 0364 lri $AR0, #0x0364
|
0858 0080 0364 lri $AR0, #0x0364
|
||||||
085a 1c80 mrr $IX0, $AR0
|
085a 1c80 mrr $IX0, $AR0
|
||||||
085b a000 mulx $AX0.L, $AX1.L
|
085b a000 mulx $AX0.L, $AX1.L
|
||||||
085c ea70 maddc'l $AC1.M, $AX1.L : $AC0.M, @$AR0
|
085c ea70 maddc'l $AC1.M, $AX1.L : $AC0.M, @$AR0
|
||||||
|
|
||||||
// ADPCM decoding main loop.
|
// ADPCM decoding main loop.
|
||||||
085d 1108 0866 bloopi #0x08, 0x0866
|
085d 1108 0866 bloopi #0x08, 0x0866
|
||||||
for (int i=0; i<8; i++)
|
for (int i=0; i<8; i++)
|
||||||
{
|
{
|
||||||
085f 3a93 orr'sl $AC0.M, $AX1.H : $AC1.M, $AX1.L
|
085f 3a93 orr'sl $AC0.M, $AX1.H : $AC1.M, $AX1.L
|
||||||
0860 a478 mulxac'l $AX0.L, $AX1.L, $ACC0 : $AC1.M, @$AR0
|
0860 a478 mulxac'l $AX0.L, $AX1.L, $ACC0 : $AC1.M, @$AR0
|
||||||
0861 1485 asl $ACC0, #5
|
0861 1485 asl $ACC0, #5
|
||||||
0862 e833 maddc's $AC0.M, $AX1.L : @$AR3, $AC0.M
|
0862 e833 maddc's $AC0.M, $AX1.L : @$AR3, $AC0.M
|
||||||
0863 3b92 orr'sl $AC1.M, $AX1.H : $AC0.M, $AX1.L
|
0863 3b92 orr'sl $AC1.M, $AX1.H : $AC0.M, $AX1.L
|
||||||
0864 a570 mulxac'l $AX0.L, $AX1.L, $ACC1 : $AC0.M, @$AR0
|
0864 a570 mulxac'l $AX0.L, $AX1.L, $ACC1 : $AC0.M, @$AR0
|
||||||
0865 1585 asl $ACC1, #5
|
0865 1585 asl $ACC1, #5
|
||||||
0866 ea3b maddc's $AC1.M, $AX1.L : @$AR3, $AC1.M
|
0866 ea3b maddc's $AC1.M, $AX1.L : @$AR3, $AC1.M
|
||||||
}
|
}
|
||||||
0867 2f67 srs @0x0067, $AC1.M
|
0867 2f67 srs @0x0067, $AC1.M
|
||||||
0868 8e00 set16
|
0868 8e00 set16
|
||||||
0869 1ff8 mrr $AC1.M, $AX0.L
|
0869 1ff8 mrr $AC1.M, $AX0.L
|
||||||
086a 2f66 srs @0x0066, $AC1.M
|
086a 2f66 srs @0x0066, $AC1.M
|
||||||
086b 8900 clr $ACC1
|
086b 8900 clr $ACC1
|
||||||
}
|
}
|
||||||
086c 00df 0360 lr $AC1.M, @0x0360
|
086c 00df 0360 lr $AC1.M, @0x0360
|
||||||
086e 02df ret
|
086e 02df ret
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -2793,7 +2792,7 @@ void 07eb_AFCDecoder(_numberOfSample(AC0.M))
|
|||||||
|
|
||||||
|
|
||||||
//////////////////////////////////////////// DEFAULT DECODER
|
//////////////////////////////////////////// DEFAULT DECODER
|
||||||
void 087c_DefaultDecoder()
|
void 087c_DefaultDecoder()
|
||||||
{
|
{
|
||||||
087c 8100 clr $ACC0
|
087c 8100 clr $ACC0
|
||||||
087d 1f5e mrr $AX0.H, $AC0.M
|
087d 1f5e mrr $AX0.H, $AC0.M
|
||||||
@ -3154,6 +3153,7 @@ void 09f9_UsedBy08Decoder() {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void 0a0a_UsedBy08Decoder() {
|
void 0a0a_UsedBy08Decoder() {
|
||||||
|
// Read from ARAM.
|
||||||
0a0a 0080 ffd3 lri $AR0, #0xffd3
|
0a0a 0080 ffd3 lri $AR0, #0xffd3
|
||||||
0a0c 0084 0000 lri $IX0, #0x0000
|
0a0c 0084 0000 lri $IX0, #0x0000
|
||||||
0a0e 007a 0a12 bloop $AX0.H, 0x0a12
|
0a0e 007a 0a12 bloop $AX0.H, 0x0a12
|
||||||
@ -3783,6 +3783,9 @@ void 0c1c_Unk()
|
|||||||
0c59 008b 009f lri $WR3, #0x009f // 0xa0 wrap
|
0c59 008b 009f lri $WR3, #0x009f // 0xa0 wrap
|
||||||
0c5b 0080 0a00 lri $AR0, #0x0a00
|
0c5b 0080 0a00 lri $AR0, #0x0a00
|
||||||
0c5d 0900 lris $AX1.L, #0x00
|
0c5d 0900 lris $AX1.L, #0x00
|
||||||
|
|
||||||
|
// This is the loop that used to go crazy in the LLE emulation
|
||||||
|
// before we fixed addarn to obey the wrapping register.
|
||||||
|
|
||||||
// 0c5e 1150 0c65 bloopi #0x50, 0x0c65
|
// 0c5e 1150 0c65 bloopi #0x50, 0x0c65
|
||||||
for (int i = 0; i < 0x50; i++) {
|
for (int i = 0; i < 0x50; i++) {
|
||||||
@ -3804,7 +3807,7 @@ void 0c1c_Unk()
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void 0c71_Unk()
|
void 0c71_Unk()
|
||||||
{
|
{
|
||||||
// 0c71 0f50 lris $AC1.M, #0x50
|
// 0c71 0f50 lris $AC1.M, #0x50
|
||||||
// 0c72 0080 0a00 lri $AR0, #0x0a00
|
// 0c72 0080 0a00 lri $AR0, #0x0a00
|
||||||
|
Loading…
x
Reference in New Issue
Block a user