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JIT: fix incredibly silly mistake in fmul rounding patch

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Fiora 2014-08-25 10:10:28 -07:00
parent 9ff7125786
commit f04e362721
1 changed files with 2 additions and 1 deletions
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Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp
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@ -130,7 +130,8 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
fpr.Lock(a, b, c, d);
MOVSD(XMM0, fpr.R(c));
Force25BitPrecision(XMM0, XMM1);
if (single_precision)
Force25BitPrecision(XMM0, XMM1);
switch (inst.SUBOP5)
{
case 28: //msub